Temperature-stabilised oscillator circuit
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23 claims: 12 independent, 11 dependent
- 1Translation of claims of equivalent WO 03047108 A2 Claims 1. Temperature stabilized oscillator circuit (1, 2) which is based on cyclic charging and discharging of a charge store (C2), with a first circuit part, which has a first electrical property with a first temperature dependence, and a second circuit part, which has a corresponding second electrical property with a second temperature dependence, which is opposite or at least different from the first temperature dependence, in each case either in one of the two circuit parts or in another part of the oscillator circuit (1, 2) are included:- the charge storage device (C2), - a controllable integration power source (T2) for charging the charge storage device (C2), - a controllable termination power source (TB3, T9) for discharging the charge storage device (C2), - a first resistor (R2) , and - a second resistor (Rl), wherein - the two resistors (Rl, R2) have substantially the same temperature coefficients.
- 1212th Temperature stabilized oscillator circuit (1, 2) according to one or more of claims 3 to 11, characterized, in that the first circuit branch and the second circuit branch and in particular at least one further circuit branch of the oscillator circuit (1, 2) each have, at least temporarily, a sum or a difference of two superimposed partial streams with different temperature dependencies, that the partial flows are adjustable or adjusted in such a way, that linear terms and quadratic terms and in particular higher-order terms of the temperature dependence of the oscillator frequency are substantially minimized, and - that the partial currents are generated in particular by the bandgap reference circuit (BGR).
- 1414th Temperature stabilized oscillator circuit (1, 2) according to one or more of claims 3 to 13, characterized in that - in the first circuit branch, a first MOS transistor (T2) as a controllable Aufintegrations current source, a second MOS transistor (TS2) for switching on or off the Aufintegrationsvorgangs and the charge storage (C2) are connected in series.
- 1515th Temperature stabilized oscillator circuit (1, 2) according to one or more of claims 3 to 14, characterized, in the second circuit branch, the comparator is in the form of a third MOS transistor (TCl), whose gate terminal is connected to the charge storage (C2), with the second resistor (Rl), over which a differential voltage (VR1) drops, which is formed from the difference between the upper comparator threshold (VCH) and the lower comparator threshold (VCL), is connected in series.
- 1616th Temperature stabilized oscillator circuit (1, 2) according to one or more of the preceding claims, characterized in that - the controllable termination current source in the form of a bipolar transistor (TB3) or a fourth MOS transistor (T9), a fifth MOS transistor (TS3 ) for turning on and off the Abeingationsvorgangs and the charge storage (C2) are connected in series.
- 1717th Temperature-stabilized oscillator circuit (1, 2) according to one or more of the preceding claims, characterized in that - the charge storage device is at least partially formed as a gate oxide capacitance (C2).
- 2020th Temperature stabilized oscillator circuit (1, 2) according to one or more of the preceding claims, characterized in that - the first resistor (R2) and the second resistor (Rl) have low variations in their temperature coefficient and / or low variations in their absolute value.
- 2121st Temperature-stabilized oscillator circuit (1, 2) according to one or more of the preceding claims, characterized in that - all the resistances (R1, R2, R3, R4, R5) of the oscillator circuit (1, 2) have substantially the same temperature coefficients and in particular of the same resistance type.
- 2222nd Temperature stabilized oscillator circuit (1, 2) according to one or more of the preceding claims, characterized in that - the components of the oscillator circuit (1, 2) are monolithically integrated on a common solid substrate.
Independent claims12
94 paragraphs in 2 sections, as filed
Translation of description of equivalent WO 03047108 A2
description
Temperature-stabilized oscillator circuit
The invention relates to an oscillator circuit, which is based on cyclic charging and discharging of a charge store. In particular, the invention relates to an oscillator circuit that provides a duty cycle for appliances in standby mode.
Integrated circuits derive their power stroke during normal operation, as a rule by a quartz oscillator. During the standby mode (standby mode) integrated circuits often supplied by an oscillator circuit or a phase shifter oscillator circuit with the working cycle, since these circuits are characterized by low power consumption.
Oscillator circuits have a Ladungsspeieher, is which alternately charged and discharged by a Aufintegrations power source or from a Abintegrations power source. The charge storage is further connected to a comparator which measures the charge state of the charge storage device and switches on reaching a predetermined upper Komparatorschwel- le of the charge into the discharging. Accordingly disabled in a decrease in the charge level to a lower predetermined comparator threshold, the discharge process and instead activates charging.
Such oscillator circuits that are suitable for integration into an integrated circuit is, for example, described in the articles "A 1.2-micron CMOS Current-Controlled Oscillator" by Michael P. Flynn and Sverre U. Lidholm, published in IEEE Journal of Solid State Circuits, Vol. 27, No. 7, July 1992, pages 982-987, and "A Novel CMOS Multivib- generator" of IM Filanovsky and H. Baltes, published in analog Integrated Circuits and signal Processing, Volume 2, 1992, Pages 217-222, and "A novel low voltage low power oscillator as a capacitive sensor interface for portable applications" by Giuseppe Ferri and Pierpaolo De Laurentiis, published in Sensors and Actuators, Vol 76, 1999, pages 437-441. The in these articles featured oscillator circuits is provided as a charge storage each a capacitor.
The oscillator circuits underlying principle of a one-shot in Figure 6:50 on page 618 of the book "Semiconductor Circuit Technology" by Ulrich Tietze and Christoph Schenk, published by Springer-Verlag, Berlin, 1999, 11th edition presented.
For applications of an oscillator circuit in telecommunications nikationsbereich high frequency stability is required. Therefore, the free-running frequency of an oscillator circuit with the crystal frequency is adjusted by digital divider ratios. In addition to the frequency generated by an oscillator circuit tuations largely independent of temperature, its operating voltage fluctuations, phase noise as well as technology spreads. In addition to the oscillator circuit will need a low operating voltage, have a low operating voltage dependence, consume little chip area and be implemented in an integrated circuit.
The abovementioned quality requirements oscillator circuits are also suitable for applications in sensors. However, in such applications, adjustment to a highly accurate quartz frequency is usually not necessary.
To achieve the greatest possible stability of the oscillator frequency to temperature fluctuations, it is known to provide oscillator circuits with resistors having varying temperature coefficient. A disadvantage of such a compensation of temperature variations, however, that technologically related variations of both the Temperature coefficient and the absolute values of the resistors used cause only low temperature stability of the oscillator frequency.
It is also known to effect temperature stability of the oscillator frequency by additional external components such as external resistors, low temperature coefficient, or by a balance on the wafer by means of an EEPROM or by Zener zapping. These known measures is a great production effort with the associated high costs in common.
The object of the invention is to provide an oscillator circuit, through which the temperature coefficient of the oscillator latorfrequenz to a predetermined value is adjustable and is achieved through which particular high temperature stability of the oscillator frequency, an operating voltage suppression and a low 1 / f noise.
The task underlying the invention is solved by the features of claim 1. Advantageous developments and refinements of the invention are indicated in the dependent claims.
An inventive temperature-stabilized oscillator circuit operates according to the principle of the cyclical charging and discharging of a charge store. For this purpose, the oscillator circuit comprises a first circuit portion having a first electrical characteristic, which is characterized by a first temperature ature dependence, and a second
Circuit portion having a corresponding second electrical property, which is characterized by a second temperature dependence. The two temperature dependences have an opposed or at least different behavior. Among the electric characteristics of the circuit components, for example, currents or voltages can be understood. Further comprising the oscillator Circuit as the charge storage elements, a controllable Aufintegrations-current source for charging the charge storage device, a controllable Abintegrations-current source for discharging the charge storage device, a first resistor and a second resistor. The components listed above of the oscillator circuit may be included respectively in the first circuit part or in the second circuit part or in another part of the oscillator circuit. Furthermore, the two resistors have substantially equal temperature coefficients and are also preferably of the same type of resistor. In this case, the temperature coefficient indicates the change of the resistance value with a temperature change. Under a resistor type is the type of resistance, such as a carbon film resistor or a metal tallschichtwiderstand understood.
A temperature change is, in the oscillator circuit according to the invention by the counter-rotating or at least different temperature dependencies of the circuit of the oscillator circuit device parts compensated. If the temperature changes, so increase the electrical property by which a circuit component is determined, and the other electrical property, which determines the other circuit part falls, or rises simultaneously with different temperature coefficients. Overall, this process equalizes the two electrical properties, so for example, the sum or the difference or the product of the electrical properties over a certain temperature range remain constant. Thereby, the temperature dependencies of those sizes can ultimately be adjusted, which determine the oscillator frequency. Thus, the temperature coefficient of the oscillator frequency can be set to a predetermined value and, in particular, a high temperature stability of the oscillator frequency can be obtained. Further, in the invention, the oscillator circuit of advantage that the two resistors have substantially the same temperature coefficient and are in particular also from the same type of resistor. Thus, the temperature dependence of the oscillator frequency is further minimized. In some prior art oscillator circuits the opposite principle is applied, that is, are resistors with different or opposite temperature coefficients used for the purpose of temperature compensation. Through technological variations of the resistors but overall a poorer temperature compensation than by the present invention is achieved thereby.
Advantageously, the inventive oscillator circuit comprises a comparator, a first circuit branch and a second circuit branch. The comparator controls the Aufintegrations- and Abintegrations power sources. This control results in the comparator function of the charge state of the charge store, a predetermined lower communication paratorschwelle and a predetermined upper comparator threshold by. The first circuit branch containing the controllable Aufintegrations-current source, and the second circuit branch containing the comparator and / or used to generate the lower and the upper comparator threshold.
According to a preferred embodiment of the invention to flow through the first circuit branch and / or the second circuit branch each at least temporarily two mutually superposed partial currents, different Temperaturabhängigkei- th possess. For example, it may be provided that in the circuit branches in each of the two partial streams a sum or difference is formed. Furthermore, the two partial flows can have preferably in opposite direction or at least different temperature dependencies. By such partial streams whose temperature dependencies compensate each other, the desired temperature coefficient of the oscillator frequency can easily be technologically adjusted independently. Furthermore, can be achieved by these measures an arrangement for compensation of temperature dependencies with only a small footprint and low power consumption realized.
Advantageously, the inventive oscillator circuit comprises a bandgap reference circuit which provides a reference voltage. By the bandgap reference circuit may be preferably at least one of the partial flows are provided. Further, it is advantageous if the band gap reference circuit is connected to the first and / or the second circuit branch via at least one current mirror. The bandgap reference circuit may for example also contain the first resistor, UI via which drops the reference voltage generated by the bandgap reference circuit. An advantage of the related to the bandgap reference circuit measures that a partial stream may be generated by the bandgap reference circuit, which counteracts another partial flow in its temperature dependence and thus causes an overall compensation of temperature dependencies. The other partial flow can for example be defined and used as a charging current of the charge storage or for generating the comparator thresholds.
It is also advantageous when adapted at least one current mirror for a dynamic component replacement (dynamic element matching). The devices exchange can for example be controlled by a control unit and be clocked with the stroke provided by the oscillator circuit. As are largely suppressed by this measure Matching- error between the components, resulting in an even higher accuracy and temperature stability of the oscillator frequency.
In order to obtain a temperature-stable oscillator frequency as possible, it is advantageous for the superposed partial currents in the first and to dimension the second circuit branch and in particular also partial flows in at least one further circuit branch so that linear and quadratic terms and in particular higher-order terms of the temperature dependence of the oscillator frequency can be compensated. This curvature of the temperature response of the oscillator frequency can be reduced. The partial currents can be generated, for example, in the band-gap reference circuit.
Another particularly advantageous embodiment of the invention is characterized in that the inventive oscillator circuit includes at least one current mirror is connected to the first and / or the second circuit branch fed and at whose output was a third resistor which on the output side. The third resistor has in particular the same temperature coefficient and / or the same resistance as the first and the second resistor.
The circuit arrangement described above is based on the principle of a source degeneration circuit. In such a circuit is used, a current mirror, which is in principle independent of temperature, is detuned by adding one resistor, whereby the current mirror with a temperature dependency is acted upon. Overall, it can be achieved by the Sourcedegenerations- circuit a compensation of temperature dependencies. Furthermore, additional current mirror can be saved by this measure may that described above serve to generate further partial streams. By saving the further sub-streams the power consumption of the oscillator circuit is reduced.
Advantageously, the first circuit branch includes a first MOS transistor as controllable Aufintegrations- current source, a second MOS transistor for turning on or off the Aufintegrationsvorgangs and the charge storage. The aforementioned components are connected in the first circuit branch in series.
A further advantageous embodiment provides that in the second circuit branch of the comparator a third MOS transistor having its gate terminal connected to the charge storage. Further, the comparator with the second resistor in series connected. Via the second resistance falls from a voltage difference, the threshold is the difference between the upper and lower comparator results.
Furthermore, it is advantageous to realize the controllable Abintegrati- ons-current source having a bipolar transistor, or a fourth MOS transistor, and provide a fifth MOS transistor for turning on or off of the Abintegrationsvor- passage. The bipolar transistor and the fourth MOS transistor and said fifth MOS transistor are arranged in series with the charge storage.
In a further advantageous embodiment of the invention, the charge storage is at least partially designed as a gate oxide capacitance. A gate oxide capacitance has a particularly small chip area required.
A further particularly advantageous embodiment of the invention provides that a sixth MOS transistor and the third MOS transistor are connected via their drain-source paths connected in series. By this circuit arrangement, is added to the main time constant by which the oscillator frequency would be determined without the sixth MOS transistor has a second time constant. The second time constant may have a deviating from the main time constant temperature coefficient and thus contribute to a compensation of the temperature dependence of the oscillator circuit. Further, by the sixth MOS transistor, in particular the same conductivity type as the third MOS having transistor achieved a better operating voltage suppression, since both MOS transistors refer to the same supply line. Advantageously, the sixth MOS transistor is wired as a diode.
The first and the second resistor may advantageously be designed such that they have low scattering of their temperature coefficient and / or low scattering of their absolute value. In this case, a low scattering of the temperature coefficient draws a low temperature coefficient of the oscillator frequency to and is advantageous in the implementation of the oscillator circuit according to the invention in a telecommunications chip. In contrast is more important for sensors of the absolute value of the oscillator frequency than the temperature dependence of the oscillator frequency in use of the oscillator circuit. It is therefore advantageous in the implementation of the oscillator circuit in a sensor to be used for the two resistors a resistance type with only a small scattering of his absolute lutwerts.
Advantageously, all resistors of the oscillator circuit is substantially the same temperature coefficient and in particular of the same resistance state type. This ensures an optimal stability of the oscillator frequency to temperature variations is assured.
The inventive oscillator circuit is advantageously for implementation in an inte- grated circuit. Advantageously allows the integrated circuit to the oscillator circuit by CMOS (complementary metal oxide semiconductor) manufacturing technology.
The invention is explained by means of embodiments with reference to the drawings. Show it: Fig. 1 is a circuit diagram of a first embodiment of the temperature-stabilized oscillator circuit according to the invention; and 5
Fig. 2 is a circuit diagram of a second embodiment of the temperature-stabilized oscillator circuit according to the invention.
L0 in Fig. 1 is shown as a first embodiment of the invention is a circuit diagram of a temperature-stabilized oscillator circuit 1. The oscillator circuit 1 includes a charge storage on C2, which on the one hand with a common fixed potential, in particular a mass
L5 VSS, and the other connected to a node K is. To the node K Further, the gate terminal of a MOS transistor TC1 is connected. The node K can be powered by a circuit branch Aufintegrations- which the node K via the drain-source paths of MOS transistors TS2 and T2
20 connects a supply voltage VDD. A further circuit branch, which is formed by the drain-source path of a MOS transistor TS3, the collector-emitter path of a bipolar transistor TB3 as well as the drain-source path of a MOS transistor TS4, is used for current drain from the
25 knots K. This circuit branch leading from the current drawn to the ground VSS.
The drain-source path of the MOS transistor TC1 is by a comparator / reference voltage circuit branch, on the one
connected 30 via a resistor R to the ground VSS and connected to the other via the drain-source path of a MOS transistor Tl with the supply voltage VDD. Parallel with the resistor Rl, a MOS transistor TS1 is arranged. To the connection path of the MOS transistors Tl and TC1 is the
35 connected drain terminal of a MOS transistor T5. The gate terminal of the MOS transistor T5 is connected to its drain terminal and the source terminal of the MOS Transistor T5 is supplied with the ground VSS. Between the MOS transistors Tl and the input of an inverting amplifier TC1 IV1 is further connected. The inverting amplifier IV1 downstream serial inverting amplifier IV2, IV3 and IV4. The output of the inverting amplifier IV3 is connected to the gate terminals of the MOS transistors TS1, TS2, TS3 and TS4. The output of the inverting amplifier IV4 is the output OUT of the oscillator circuit. 1
The oscillator circuit 1 contains a bandgap reference circuit BGR, which is T3 and T4, bipolar TBL and TB2 and a resistor R2 is formed of MOS transistors. The gate terminals of the MOS transistors T3 and T4 as well as the base terminals of the bipolar transistors TBL and TB2 are connected to each other. The drain-source path of the MOS transistor T3 or T4 is acted upon on the one hand to the supply voltage VDD and the other connected to the collector terminal of the bipolar transistor TBL and TB2 respectively con- nected. Furthermore, the drain terminal of the MOS transistor T3 is connected to its gate terminal. The emitter terminal of the bipolar transistor TBL is applied to the ground VSS. Between the emitter terminal of the bipolar transistor TB2 and the ground VSS, the resistor R2 is arranged.
The MOS transistor T3 constitutes the input transistor of a current source bank, which is used for power generation in the drain-source paths of the MOS transistors Tl, T2 and T4. For this, the gate terminal of the MOS transistor T3 is coupled to the gate terminals of the MOS transistors Tl, T2 and T4.
A MOS transistor T6 is connected to a resistor R3 in series between supply voltage VDD and the ground VSS. The gate terminal of the MOS transistor T6 is connected to the drain terminal of the MOS transistor T4. Further the gate terminal of the MOS transistor T6 to the gate terminals of MOS transistors T7 and T8 is connected. The source terminals of the MOS transistors T6, T7 and T8 are supplied with the supply voltage VDD. The drain terminal of the MOS transistor T7 is connected to the drain terminal of the MOS transistor Tl. The drain terminal of the MOS transistor T8 is connected to the drain terminal of the MOS transistor T2. Between the gate terminal of the MOS transistor T6 and the supply voltage VDD, a capacitor Cl is arranged.
The base terminals of the bipolar transistors TBL and TB2 are connected to the link between the MOS transistor T6 and resistor R3 and connected to the base terminal of the bipolar transistor TB3.
In the present oscillator circuit 1, the MOS transistors TC1, TS1, TS3, TS4, and T5 are n-channel MOSFETs. The MOS transistors TS2, Tl, T2, T3, T4, T6, T7 and T8 are implemented by p-channel MOSFETs. The bipolar TBL, TB2 and TB3 are designed as NPN transistors.
The function of the oscillator circuit 1 to the charge storage C2 cyclically load and unload is. The constituted by the MOS transistors T2 and TS2 Aufintegrations- branch circuit serves to charge the charge storage device C2. The MOS transistor T2 provides a Aufintegrations- current source. The current flow from the MOS transistor T2 in the charge storage C2 can be switched through the MOS transistor TS2. For discharging the charge storage device C2 of the circuit branch formed by the bipolar transistor TB3, and the transistors TS3 and TS4 MOS is used. The bipolar transistor TB3 is in this case a Abintegrations- power source, which can be connected through the MOS transistors TS3 and TS4 to the charge storage C2 and the ground VSS. The up and Abintegrations current sources, to obtain a referenced current, with their control terminals each connected to the bandgap reference circuit BGR.
To switch between charging and discharging of the charge accumulator C2, a comparator is used in the form of the MOS transistor TC1, which detects with its gate terminal the charge state of the charge storage device C2. The bandgap reference circuit BGR produced across the resistance R2, a reference voltage VREF, which is mirrored by means of the MOS transistors T3 and Tl comprising the current mirror such that a voltage proportional to the reference voltage VREF voltage VR1 developed across the resistor Rl. The voltage VR1 is the difference of an upper comparator threshold voltage VCH and a lower Komparatorschwellen- voltage VCL. The lower comparator threshold voltage VCL is calculated from the sum of the threshold voltage of the MOS transistor TC1 and the effective gate-source voltage of the MOS transistor TC1. The upper comparator threshold voltage VCH is calculated from the sum of the lower comparator ratorSchwellenspannung VCL and the voltage VR1.
The inverting amplifier IV1, IV2 and IV3 control the MOS transistors TS2 and TS3, which are intended for turning on or off the charge or discharge. The Abintegra- tion of the charge storage C2 after reaching the upper comparator threshold voltage VCH, while the upward integration is performed on the charge storage C2 after reaching the lower comparator threshold voltage VCL. About the charge storage C2 thereby forming a triangular voltage. The frequency of this oscillator-delta voltage is 1 / (2 • R • C2), where R indicates the resistance of the resistor Rl and the capacity C2 of the charge store C2.
Via the inverting amplifier IV1, IV2 and IV3 Further, the MOS transistors are controlled TS1 and TS4. In this case, the resistor R, the MOS transistor TS1 switched on briefly at the down integration of the charge store C2. The MOS Transistor TS4 is reduced, the base currents of the bipolar transistors TBL and TB2 during the down integration of the charge store C2.
At the output OUT of the inverting amplifier IV4 an amplified signal can be tapped off, which represents the oscillator frequency.
In the present first embodiment of the invention, the charge store C2 is implemented by a gate oxide capacitance, which is preferably constructed as vertical MOS transistor TC1.
The time required for the operation of the charge store C2 bias voltage is equal to the sum of the threshold voltage of the MOS transistor TC1 and some 100 mV. Characterized in that the lower comparator threshold voltage VCL is equal to the sum of the threshold voltage and the effective gate-source voltage of the MOS transistor TC1, the specified bias voltage for the charge store C2 is always ensured.
The comparator / reference voltage circuit branch formed by the MOS transistors Tl and TC1, and the resistor Rl simultaneously satisfies three requirements. So this circuit is used for realizing the line branch Komparatorschwellenspannungen VCL and VCH, for implementing the comparator and to generate the required for the charge storage C2 bias.
In the present first embodiment is carried out, the
Temperature stabilization of the oscillation frequency by the addition of suitable currents. In each case, two streams are superimposed on one another, which have different, or even opposite temperature dependencies or temperature coefficient. The superimposed currents can flow static or be connected to the oscillator clock. Overall, this results in a compensation of Temperaturabhängigkei- th, so that the oscillation frequency becomes a predetermined temperature coefficient or a substantially temperature independent value.
The resistor R is directly included in the value of the oscillator frequency and has, according to equation (1) has a temperature dependence, which is to be compensated by means of the invention:
R = RIO • (1 + a • (T - TO) + b • (T - TO)<sup>2</sup>), (1)
where T is the temperature, a temperature coefficient, which relates the linear temperature term, and b specify the quadratic temperature coefficients. RIO represents the resistance value of the resistor R at a reference temperature TO of for example 25 ° C.
In the oscillator circuit 1 by the equation (1) described temperature dependence of the resistor Rl is determined by the addition of the currents that are generated by the MOS transistors Tl and T7, compensated. The current flowing through the MOS transistor Tl current is generated in the bandgap reference circuit BGR and mirrored through the MOS transistor T3 in the MOS transistor Tl. The current flowing through the MOS transistor T3 current is proportional to a PTAT (proportional to absolute temperature) voltage, which is proportional to the temperature in Kelvin. This corresponds to a positive temperature coefficient. Since a current mirror having no temperature dependence even in the ideal case, also the current through the MOS transistor Tl is proportional to a PTAT voltage. In contrast, the current is generated by the MOS transistor T7 by mirroring the current flowing through the MOS transistor T6 current. The current which flows through the MOS transistor T6 is proportional due to the arrangement of the bipolar transistor TB2 to a base-emitter voltage. Thus, the same is true for the MOS transistor T7, and this accordingly has a negative temperature coefficient.
This resulted overall in a superposition of two cur- rents flowing through the resistor R and their temperature coefficients are associated with different signs. For the voltage drop across the resistor R voltage VR1 thus follows from the known Bandabstandsgieichungen:
VR1 = kl • (T / TO) - k2 • (1 - (VGO - V BE0) / VG0) • (T / TO), (2)
where kl and k2 represent current mirror ratios and VGO or VBEO gate or base-emitter voltages indicate. The first term in equation (2) increases with temperature, while the second term drops with increasing temperature. Since kl and k2 are only current mirror ratios, can be generated across the resistor Rl technology independently a correction voltage. The thus corrected voltage can be set to the same temperature coefficient as the resistor Rl.
The gate oxide capacitance of the charge storage device C2 affected because of their relatively low thermal coefficient of the oscillator frequency is very little.
Furthermore, the invention provides that the resistors Rl and R2, and preferably also the resistance R3 have same temperature coefficient and preferably also the same resistance values. In particular, in the implementation of the oscillator circuit 1 in a telecommunications chip, it is advantageous if its temperature coefficient is used for the resistors Rl, R2 R3 and a resistance type with only a small technological diversification. This optimum temperature stability of Os results zillatorfrequenz, and it eliminates a technological diversification that would be caused by the use of different resistors. In comparison, have well-known oscillator circuits, it is attempted in which, to achieve temperature stability due to mixing ratios of resistors, a fundamental temperature dependence, which is caused by technological resistance variations. For two resistors Rl and R2 having the temperature coefficients al and a2 is this dependence of the temperature coefficient about (al - a2) • R / (R + R2). This means that at a difference of the two temperature coefficients al and a2, for example, 3000 ppm / K and at similarly large resistance values of the resistors Rl and R2 by 20% sheet resistance change of the temperature coefficient changes already to 250 ppm / K.
The above-described measure for compensating the temperature dependence of the comparator / voltage reference circuit branch, in the present first embodiment of the invention in an analogous manner used for the Aufin- tegrations-circuit branch. For this purpose, according to the MOS transistor T7, the MOS transistor T8 is used, which is also traversed by a mirrored from the MOS transistor T6, and thereby also having a proportionality to the base-emitter voltage. The current flowing through the MOS transistor T2 current is in turn proportional to a PTAT voltage, so that there is a temperature compensation in the same manner as previously described.
((N - 1 + a) • k • • In (T / TO) T / q) At currents which are proportional to a base-emitter voltage, according to the Bandabstandsgieichungen the nonlinear units by the term are / VGO given where n is a technology parameter is. The non-linear portions of a PTAT current are essentially given by the term 1 + b. Through the mixing of currents through the MOS transistors T7 and T8, the non-linear portions are enlarged or reduced, resulting in the possibility of compensation of the square portion of the resistor Rl. To make the temperature compensation described above and reproducible chen not cause through matching error in the current mirrors of error temperature coefficient, it is advantageous to compensate for the respective transistors in a current mirror by dynamic elements exchange.
In the shown in FIG. 1, the first embodiment of the invention is shown in a further option for temperature compensation, which can be possibly also implemented independently of the mixing currents through the MOS transistors T7 and T8. This possibility arises from the arrangement of the MOS transistor T5 at the drain terminal of the MOS transistor TCI. Thus, the pole frequency is increased at the output of the comparator and simultaneously generates a second very short and well-defined time constant, which contributes next to the main time constant formed from the Term 2 • R • C2 to the oscillator frequency.
The generated by the MOS transistor T5 second time constant is determined by the transconductance gm of the transistor T5. The mutual conductance gm is given by equations (3) and (4):
gm = ^ (3:
W ß = μ-C<sub>ox</sub> • - (4)
L
In equations (3) and (4), all parameters refer to the MOS transistor T5. Specifically are ß for
Slope coefficients I<sub>D</sub> for the drain current, W and L of the channel width or length, μ the mobility of the charge carriers in the channel and C<sub>ox</sub> for the capacitance of the gate oxide of the MOS transistor T5. The temperature coefficient of the mobility μ and the drain current I<sub>D</sub> for example, be -5000 ppm / K or 3000 ppm / K. As a result of the temperature coefficient of the transconductance gm a value of approximately -1000 ppm / K, whereas the resistor R may have a TCR of 200 ppm / K. It will be appreciated that a summation of the primary time constant with the second time constant makes a compensation of the temperature dependence of the overall time constant and thus the oscillator frequency possible.
A further advantage of the MOS transistor T5 is that the voltage swing is defined at the output of the comparator by its arrangement at the drain terminal of the MOS transistor Tcl.
Both MOS transistors TCI and T5 preferably have the same conductivity type and refer to the same supply line. These measures have the advantage that the potentials at the input and output of the comparator independent of the supply voltage VDD.
Another way to compensate for the temperature dependence is given by a source degeneration circuit. In this case, the MOS transistors Tl and / or T2 resistors are connected, for example, to the drain terminals of which have the same resistance values as the resistors Rl and R2. Through these resistors, the current mirror formed by the MOS transistors T3 and Tl, T3 and T2 are detuned. Basically have current mirror to a temperature-peraturunabhängiges behavior. By detuning the current mirror said current mirrors are however impressed temperature coefficient to compensate others can be used r temperature coefficient. An advantage of this measure is that the MOS transistors T7 and T8 can be saved, whereby the power consumption of the oscillator circuit 1 is reduced. The output current I a disgruntled with Sourcedegenerations- circuit current mirror is given by equations (5) and (6):
IIN, IOUT = r (5)
1 + ^ 2 • ß (T) • R<sub>SD</sub>(T)<sup>2</sup> -Iin
W SS (T) = μ (T) -C<sub>ox</sub> • - (6)
L
IIN is in equation (5) the input current of the current mirror, and R<sub>SD</sub> represents the arranged at the output of the current mirror resistance. The other parameters are defined in a manner analogous to equation (4).
For the temperature-dependent oscillator frequency f (t) it follows that:
(7) <img id="imgf000022_0001" he="14" wi="124" file="imgf000022_0001.tif" img-format="tif" img-content="drawing" orientation="portrait" inline="no" />
The mobility μ (T) and the Steilheitskoeffi- are coefficient ß (T) very well defined parameters with an error of each typically ± 5%. If the temperature coefficient of resistance type used is small enough, the temperature compensation is insensitive to variations in the absolute values of resistors.
In an alternative embodiment of the present invention, the bipolar TBL can be TB2 and TB3 replaced by MOS transistors, which are operated in the weak inversion region.
The MOS transistors TS1, TS2, TS3 and TS4 can also be formed by other switches. Instead of inverting amplifier IV1, IV2, IV3 and IV4 can be provided digital gates.
By the MOS transistors Tl and T2 are each a GE-mirrored PTAT current which is generated in the bandgap reference circuit BGR flows. Characterized a signal generated in the bandgap reference circuit BGR noise is also superimposed on these currents. An increased by noise increased current through the MOS transistor Tl both the lower comparator torschwellenspannung VCL and the upper comparator threshold voltage VCH. In a likewise increased by noise current through the circuit branch Aufintegrations the oscillator frequency remains unaffected. However, the two Komparatorschwellenspannungen VCL and VCH increase only at low frequency noise to the same extent. This means that low-frequency 1 / f noise does not increase the frequency quenzjitters.
The first embodiment shown in Fig. 1 of the invention fertil has more than a threshold voltage of a MOS transistor or more than one base-emitter voltage of a bipolar transistor in series in any circuit path between the supply voltage VDD and the ground VSS. Therefore, the present embodiment for very low supply voltages VDD is suitable. The fact that the comparator tor / reference voltage circuit branch is designed jointly for the comparator, the generation of Komparatorschwellenspannungen VCL and VCH and the bias voltage for the charge storage C2, the oscillator circuit 1 is GR gen the resulting very low power consumption for generating a working cycle during the standby mode particularly well suited. In addition, the oscillator circuit 1 has a small chip surface area requirement on.
In FIG. 2 is illustrated as a second embodiment of the invention, a circuit diagram of a temperature-stabilized oscillator circuit 2. The oscillator circuit 2 corresponds in many parts of the circuit shown in Fig. 1 the oscillator circuit 1. Therefore, the same or similar functional elements by the same reference numerals.
In the oscillator circuit 2 of the charge store C2 is a capacitor, one terminal of which is supplied with the supply voltage VDD instead of the ground VSS. Accordingly, the reference potentials of the other components in the oscillator circuit 2 are modified compared to the oscillator circuit. 1
The Abintegrations-current source is implemented in the oscillator circuit 2 by a MOS transistor T9 having a p-doped channel. Further, the oscillator circuit includes two operational amplifiers OP1 and OP2, respectively for applying the gate potentials of the MOS transistors T3 and T4 or T6.
The oscillator circuit 2 includes MOS transistors T10, TU, T12, T13 and T14, whose channel is p-doped, and the MOS transistors T15, T16, T17 and T18, whose channel is n-doped. Some of these MOS transistors and some of their connecting lines to the other components are drawn with dashed lines in Fig. 2. This indicates that the respective MOS transistors can optionally be included in the oscillator circuit 2, or may be designed switchable.
The current flowing through the MOS transistor T6 has in Fig. 2 because of the wiring of the MOS transistor T6 to a proportionality to a CTAT (complementary to absolute temperature) voltage. Accordingly, the temperature coefficient of this stream is negative. it is mirrored in the MOS transistors TU, T12, T13 and T14 through current mirror arrangements. Due to the basic temperature independence of a current mirror have also mentioned by the MOS Transistors currents flowing an offsetting the temperature behavior.
The T3 and T4 flowing through the MOS transistors currents are proportional to a PTAT voltage. By current mirroring a current is generated, for example, also in the MOS transistor T10, which is proportional to the temperature.
By dashed lines in Fig. 2 drawn MOS transistors differences or sums with existing streams can be formed, whereby temperature dependencies are compensated. Specifically, the MOS transistor T12 is used for forming the difference from that produced by the MOS transistor Tl current in the comparator tor / reference voltage circuit branch. The MOS transistors T13 and T14 create currents that are subtracted from that produced by the current in the MOS transistor T2 Aufintegrations- circuit branch respectively. The generated from the MOS transistors T16 and T18 flows each form a sum with the generated from the MOS transistors Tl and T2, respectively currents in the comparator / voltage reference or Aufin- tegrations-circuit branch.
Contents2
10 members in 5 offices
Priority claims9
| Document | Office | Kind | Date |
|---|---|---|---|
| 10157292 | Germany | A | |
| 10157292 | Germany | A | |
| 10157292 | Germany | – | |
| 0203907 | Germany | W | |
| 0203907 | Germany | W | |
| 10157292 | – | – | – |
| DE2001157292 | – | – | – |
| DE2002003907 | – | – | – |
| WO2002DE03907 | – | – | – |
Members10
| Document | Office | Kind | |
|---|---|---|---|
| DE10157292A1 | Germany | A1 | |
| WO03047108A2 | World Intellectual Property Organization (WIPO) | A2 | |
| WO03047108A3 | World Intellectual Property Organization (WIPO) | A3 | |
| EP1446884A2This record | European Patent Office (EPO) | A2 | |
| US2004251980A1 | United States of America | A1 | |
| CN1589528A | China | A | |
| EP1446884B1 | European Patent Office (EPO) | B1 | |
| US6992533B2 | United States of America | B2 | |
| DE50205477D1 | Germany | D1 | |
| CN100409571C | China | C |
15 legal events, as 2 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal feeWithdrawnR119 | R119 | DE | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| No opposition filedOpposition26N | 26N | EP | |
| No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE | PLBE | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA | STAA | EP | |
| Corresponds to:REF | REF | EP | |
| Designated contracting statesAK | AK | EP | |
| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
| Grant fee paidORIGINAL CODE: EPIDOSNIGR3GRAS | GRAS | EP | |
| Despatch of communication of intention to grant a patentORIGINAL CODE: EPIDOSNIGR1GRAP | GRAP | EP | |
| First examination report despatched17Q | 17Q | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 1446884
- Publication, DOCDB
- 1446884
- Publication, EPODOC
- EP1446884
- Application
- 2776822
- Application, DOCDB
- 02776822
- Application, EPODOC
- EP20020776822
Titles3
- German
- TEMPERATURSTABILISIERTER OSZILLATOR-SCHALTKREIS
- English
- TEMPERATURE-STABILISED OSCILLATOR CIRCUIT
- French
- CIRCUIT OSCILLATEUR STABILISE EN TEMPERATURE
Classification
- CPC, 3
- H03K3/011
- H03K3/0231
- H03K3/354
- IPC, 3
- H03K3 011
- H03K3 0231
- H03K3 354
Designated states1
- Contracting states, 1
- Sweden