Nova Patents
EP1369997A3

Input/output buffer

Abstract

An input/output buffer that protects a circuit from voltage signals provided from an external device. The input/output buffer includes a reference power generation circuit (16) connected to a high voltage power supply and a low voltage power supply to convert the voltage of an external voltage signal and generate reference power. The reference power generation circuit (16) has a protection circuit (17) including a plurality of MOS transistors (Ptll-Ptl5) for decreasing the voltage of the external voltage signal to a predetermined voltage when the input/output buffer is not supplied with the voltage of the high voltage power supply. Each of the MOS transistors has a back gate connected to a predetermined node at which the voltage is less than the voltage of the high voltage power supply and greater than the voltage of the low voltage power supply.

EP1369997A3, drawing sheet 1
Sheet 1 of 1

Term

Term ended

Projected expiry passed 18 February 2023, 3.6 years ago.

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