Semiconductor device
Abstract
A gate electrode 12 is formed on a silicon substrate 10 via a gate insulating film 11. The gate insulating film 11 includes a high dielectric constant film 11a made of a hafnium oxide film containing silicon, and a lower barrier film 11b formed below the high dielectric constant film 11a and made of a silicon oxynitride film containing hafnium.

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31 claims: 3 independent, 28 dependent
- 1A semiconductor device, characterized by comprising:a gate insulating film formed on a substrate;and a gate electrode formed on the gate insulating film;the gate insulating film comprising: a high dielectric constant film containing a metal, oxygen and silicon;and a lower barrier film formed below the high dielectric constant film and containing the metal, oxygen, silicon and nitrogen.
- 7A method for producing a semiconductor device, characterized by comprising the steps of:forming a high dielectric constant film containing a metal, oxygen and a predetermine substance on a substrate;performing a heat treatment with respect to the high dielectric constant film to diffuse silicon from the side of the substrate into the high dielectric constant film, thereby forming a silicon-containing high dielectric constant film;and forming a conductive film for serving as a gate electrode on the silicon-containing high dielectric constant film.
- 20A method for producing a semiconductor device, characterized by comprising the steps of:forming a high dielectric constant film containing a metal, oxygen and hydrogen on a substrate;performing a heat treatment with respect to the high dielectric constant film to diffuse silicon from the side of the substrate into the high dielectric constant film, thereby forming a silicon-containing high dielectric constant film;and forming a conductive film for serving as a gate electrode on the silicon-containing high dielectric constant film.
Independent claims3
130 paragraphs in 5 sections, as filed
TECHNICAL FIELD
0001The present invention relates to a semiconductor device and a method for producing the same, in particular, a high dielectric constant film used for a gate insulating film.
BACKGROUND ART
0002With recent technological advance with respect to high integration and high speed in semiconductor devices, miniaturization of MOSFETs has been under development. When the thickness of a gate insulating film is being reduced to achieve the miniaturization, problems such as an increase of a gate leak current due to tunneling current are caused. In order to suppress this problem, there has been research on an approach to increase a physical thickness while realizing a small SiO<sub>2</sub> equivalent thickness (hereinafter, referred to as "EOT") by using gate insulating films made of high dielectric constant material such as hafnium oxide (HfO<sub>2</sub>) and zirconium oxide (ZrO<sub>2</sub>) (hereinafter, referred to as "high-k gate insulating films").
0003For example, a method for forming a conventional high-k gate insulating film described in USP6013553 is as follows. First, an oxide layer such as a SiO<sub>2</sub> layer is formed on a silicon substrate, and then a metal film made of zirconium or hafnium is deposited on the oxide layer by sputtering or plasma CVD. Thereafter, the metal film is subjected to an oxynitridation treatment with gas such as NO to form a high-k gate insulating film made of zirconium oxynitride (ZrO<sub>x</sub>N<sub>y</sub>) or hafnium oxynitride (HfO<sub>x</sub>N<sub>y</sub>).
0004However, in the conventional high-k gate insulating film, when heat history is applied by a high temperature treatment during the production process, the high dielectric constant material constituting the gate insulating film is crystallized, so that the electrical conductivity via the resultant crystal grain boundaries or the defect level increases leak current. That is to say, the thermal stability of the conventional high-k gate insulating film is insufficient.
DISCLOSURE OF INVENTION
0005Therefore, with the foregoing in mind, it is an object of the present invention to provide a semiconductor device employing a thermally stable gate insulating film having a high relative dielectric constant.
0006In order to achieve the object, a semiconductor device of the present invention includes a gate insulating film formed on a substrate; and a gate electrode formed on the gate insulating film, and the gate insulating film includes a high dielectric constant film containing a metal, oxygen and silicon; and a lower barrier film formed below the high dielectric constant film and containing the metal, oxygen, silicon and nitrogen.
0007According to the semiconductor of the present invention, the high dielectric constant film constituting the gate insulating film contains silicon, so that the high dielectric constant film is prevented from being crystallized by a high temperature treatment in the production process (e.g., a heat treatment for activating impurities at about 900°C). Therefore, in a finished semiconductor device, the high dielectric constant film remains mostly amorphous, so that leak current can be suppressed from occurring in the high-k gate insulating film. Consequently, the thermal stability of the high-k gate insulating film can be improved, and therefore a semiconductor device having excellent heat resistance can be realized, and the process margin in the production of a semiconductor device can be increased.
0008According to the semiconductor of the present invention, the lower barrier film is present below the high dielectric constant film in the gate insulating film, so that the high dielectric constant film can be prevented from reacting with the substrate. Moreover, the lower barrier film contains the same metal as in the high dielectric constant film, so that the relative dielectric constant of the lower barrier film can be increased, and thus the relative dielectric constant of the entire gate insulting film can be increased.
0009In the semiconductor device of the present invention, it is preferable that the gate insulating film includes an upper barrier film formed above the high dielectric constant film, and the upper barrier film contains the metal, oxygen and nitrogen.
0010This prevents the gate electrode material and the high dielectric constant film material from being diffused to each other. Moreover, the upper barrier film contains the same metal as in the high dielectric constant film, so that the relative dielectric constant of the upper barrier film can be increased, and thus the relative dielectric constant of the gate insulting film as a whole can be increased.
0011In the semiconductor device of the present invention, it is preferable to satisfy<maths id="math0001"><math display="block"><mrow><mtext>0.23 ≦ y/(x+y) ≦ 0.90</mtext></mrow></math><img file="EP1363333A1_D0001.tif" /></maths> when the composition of the high dielectric constant film is expressed as M<sub>x</sub>Si<sub>y</sub>O, where M, O and Si represent the metal, oxygen and silicon, respectively, and x > 0 and y >0.
0012This ensures the thermal stability of the high-k gate insulating film against a heat treatment at about 900°C while keeping the relative dielectric constant of the high-k gate insulting film sufficient.
0013In the semiconductor device of the present invention, it is preferable to satisfy<maths id="math0002"><math display="block"><mrow><mtext>0.23 ≦ y/(x+y) ≦ 0.30</mtext></mrow></math><img file="EP1363333A1_D0002.tif" /></maths> when the composition of the high dielectric constant film is expressed as M<sub>x</sub>Si<sub>y</sub>O, where M, O and Si represent the metal, oxygen and silicon, respectively, and x > 0 and y >0.
0014This ensures the thermal stability of the high-k gate insulating film against a heat treatment at about 900°C while keeping the reliability life of the high-k gate insulting film sufficient.
0015In the semiconductor device of the present invention, it is preferable to satisfy<maths id="math0003"><math display="block"><mrow><mtext>x/(x+y) ≧ 0.10</mtext></mrow></math><img file="EP1363333A1_D0003.tif" /></maths> when the metal is hafnium or zirconium, and the composition of the lower barrier film is expressed as M<sub>x</sub>Si<sub>y</sub>ON, where M, O, Si and N represent the metal, oxygen, silicon and nitrogen, respectively, and x> 0 and y >0.
0016This ensures that the relative dielectric constant of the lower barrier film can be increased.
0017In the semiconductor device of the present invention, the gate electrode may be a metal gate electrode.
0018A first method for producing a semiconductor device of the present invention includes the steps of forming a high dielectric constant film containing a metal, oxygen and a predetermine substance on a substrate; performing a heat treatment with respect to the high dielectric constant film to diffuse silicon from the side of the substrate into the high dielectric constant film, thereby forming a silicon-containing high dielectric constant film; and forming a conductive film for serving as a gate electrode on the silicon-containing high dielectric constant film.
0019According to the first method for producing a semiconductor device, a predetermined substance can be desorbed from the high dielectric constant film by performing a heat treatment with respect to the high dielectric constant film containing the predetermined substance, so that silicon is diffused in the high dielectric constant film through the thus formed vacancies and thus a silicon-containing high dielectric constant film can be formed. Therefore, silicon can be contained in the high dielectric constant film efficiently, and the vacancies eventually disappear, so that the silicon-containing high dielectric constant film can become dense. The silicon-containing high dielectric constant film hardly is crystallized by a high temperature treatment in the production process, so that the silicon-containing high dielectric constant film remains mostly amorphous after a device is complete. As a result, leak current can be suppressed from occurring in the gate insulating film including the silicon-containing high dielectric constant film, that is, the high-k gate insulating film. Consequently, the thermal stability of the high-k gate insulating film can be improved, and therefore a semiconductor device having excellent heat resistance can be realized, and the process margin in the production of a semiconductor device can be increased.
0020In the first semiconductor method of the present invention, it is preferable the predetermined substance is hydrogen.
0021This ensures that silicon can be diffused in the high dielectric constant film.
0022It is preferable that the first semiconductor method includes forming an insulating film containing silicon, nitrogen and the predetermined substance on the substrate before the step of forming the high dielectric constant film; and that the step of performing a heat treatment with respect to the high dielectric constant film comprises diffusing silicon contained in the insulating film into the high dielectric constant film, and forming a lower barrier film by diffusing the metal contained in the high dielectric constant film into the insulating film.
0023This ensures that silicon can be diffused in the high dielectric constant film. Furthermore, the high dielectric constant film or the silicon-containing high dielectric constant film can be prevented from reacting with the substrate. Moreover, the lower barrier film contains the same metal as in the silicon-containing high dielectric constant film, so that the relative dielectric constant of the lower barrier film can be increased, and thus the relative dielectric constant of the gate insulting film as a whole can be increased.
0024In the first method for producing a semiconductor device, it is preferable that the step of forming a high dielectric constant film comprises forming a high dielectric constant film by CVD employing a source precursor containing the metal and the predetermined substance.
0025Thus ensures that a high dielectric constant film containing the predetermined substance is formed.
0026In the first method for producing a semiconductor device, it is preferable that the step of forming the high dielectric constant film includes forming the high dielectric constant film by CVD employing a source precursor containing the metal and a source gas containing the predetermined substance.
0027Thus ensures that a high dielectric constant film containing the predetermined substance is formed.
0028In the first method for producing a semiconductor device, it is preferable that the step of forming the high dielectric constant film includes forming the high dielectric constant film by PVD employing a target containing the metal in an atmosphere containing the predetermined substance.
0029Thus ensures that a high dielectric constant film containing the predetermined substance is formed.
0030A second method for producing a semiconductor device of the present invention includes the steps of forming a high dielectric constant film containing a metal, oxygen and hydrogen on a substrate; performing a heat treatment with respect to the high dielectric constant film to diffuse silicon from the side of the substrate into the high dielectric constant film, thereby forming a silicon-containing high dielectric constant film; and forming a conductive film for serving as a gate electrode on the silicon-containing high dielectric constant film.
0031According to the second method for producing a semiconductor device, hydrogen can be desorbed from the high dielectric constant film by performing a heat treatment with respect to the high dielectric constant film containing hydrogen, so that silicon is diffused in the high dielectric constant film through the thus formed vacancies and thus a silicon-containing high dielectric constant film can be formed. Therefore, silicon can be contained in the high dielectric constant film efficiently, and the vacancies eventually disappear, so that the silicon-containing high dielectric constant film can become dense. The silicon-containing high dielectric constant film hardly is crystallized by a high temperature treatment in the production process, so that the silicon-containing high dielectric constant film remains mostly amorphous after a device is complete. As a result, leak current can be suppressed from occurring in the gate insulating film including the silicon-containing high dielectric constant film, that is, the high-k gate insulating film. Consequently, the thermal stability of the high-k gate insulating film can be improved, and therefore a semiconductor device having excellent heat resistance can be realized, and the process margin in the production of a semiconductor device can be increased.
0032It is preferable that the second method for producing a semiconductor device includes forming an insulating film containing silicon, nitrogen and hydrogen on the substrate before the step of forming the high dielectric constant film; and that the step of performing a heat treatment with respect to the high dielectric constant film includes diffusing silicon contained in the insulating film into the high dielectric constant film, and forming a lower barrier film by diffusing the metal contained in the high dielectric constant film into the insulating film.
0033This ensures that silicon can be diffused in the high dielectric constant film. Furthermore, the high dielectric constant film or the silicon-containing high dielectric constant film can be prevented from reacting with the substrate. Moreover, the lower barrier film contains the same metal as in the silicon-containing high dielectric constant film, so that the relative dielectric constant of the lower barrier film can be increased, and thus the relative dielectric constant of the entire gate insulting film can be increased.
0034In the second method for producing a semiconductor device, it is preferable that the step of forming the high dielectric constant film includes forming the high dielectric constant film by CVD employing a source precursor containing the metal and hydrogen.
0035Thus ensures that a high dielectric constant film containing hydrogen can be formed.
0036In the second method for producing a semiconductor device, it is preferable that the step of forming the high dielectric constant film includes forming the high dielectric constant film by CVD employing a source precursor containing the metal and a source gas containing hydrogen.
0037Thus ensures that a high dielectric constant film containing hydrogen can be formed.
0038In the second method for producing a semiconductor device, it is preferable that the step of forming the high dielectric constant film includes forming the high dielectric constant film by PVD employing a target containing the metal in an atmosphere containing hydrogen.
0039Thus ensures that a high dielectric constant film containing hydrogen can be formed.
0040In the first or the method for producing a semiconductor device, it is preferable that the metal is hafnium or zirconium.
0041This ensures that the relative dielectric constant of the silicon-containing high dielectric constant film can be increased.
0042In the first or the second method for producing a semiconductor device, it is preferable that the method includes the step of forming an upper barrier by nitriding a surface of the silicon-containing high dielectric constant film between the step of performing a heat treatment with respect to the high dielectric constant film and the step of forming a conductive film.
0043This prevents the gate electrode material and the high dielectric constant film material from being diffused to each other. Moreover, the upper barrier film contains the same metal as in the high dielectric constant film, so that the relative dielectric constant of the upper barrier film can be increased, and thus the relative dielectric constant of the entire gate insulting film can be increased.
0044In the first or the second method for producing a semiconductor device, it is preferable that the method includes the step of forming an upper barrier by nitriding a surface of the high dielectric constant film between the step of forming a high dielectric constant film and the step of performing a heat treatment with respect to the high dielectric constant film.
0045This prevents the gate electrode material and the high dielectric constant film material from being diffused to each other. Moreover, the upper barrier film contains the same metal as in the high dielectric constant film, so that the relative dielectric constant of the upper barrier film can be increased, and thus the relative dielectric constant of the entire gate insulting film can be increased.
0046In the first or the second method for producing a semiconductor device, it is preferable that the temperature for the heat treatment in the step of performing the heat treatment with respect to the high dielectric constant film is 600°C or more and 850°C or less.
0047This ensures that the predetermined substance or hydrogen can be desorbed from the high dielectric constant film, and that silicon can be diffused in the high dielectric constant film.
0048In the first or the second method for producing a semiconductor device, it is preferable to satisfy T ≦6.69 ·y/(x +y) + 749.4, when the composition of the silicon-containing high dielectric constant film is expressed as M<sub>x</sub>Si<sub>y</sub>O, where M, O and Si represent the metal, oxygen and silicon, respectively, and x > 0 and y >0, and the maximum temperature in the production process is expressed as T [°C].
0049This ensures the thermal stability of the high-k gate insulating film having the silicon-containing high dielectric constant film.
0050In this case, it is preferable that the gate electrode is made of a material containing silicon, and y/(x +y) ≦ 0.30 is satisfied.
0051This enables a sufficient reliability life for the high-k gate insulating film having the silicon-containing high dielectric constant film.
0052In the first or the second method for producing a semiconductor device, it is preferable that the gate electrode is a metal gate electrode, and the method includes the step of performing a heat treatment with respect to the substrate after the step of forming a conductive film.
0053This allows the defects in the high-k gate insulating film having the silicon-containing high dielectric constant film to be reduced further.
BRIEF DESCRIPTION OF THE DRAWINGS
0054<ul id="ul0001" list-style="none" compact="compact"><li>Figure <b>1</b> is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention.</li><li>Figure <b>2</b> is a graph showing the relationship between the amount of Si added to HfO<sub>2</sub> and the crystallization temperature of HfO<sub>2</sub> and the temperature that guarantees thermal stability of HfO<sub>2.</sub></li><li>Figure <b>3</b> is a diagram showing the allowable range of the composition of Hf silicate that can maintain the thermal stability obtained corresponding to various maximum process temperatures.</li><li>Figure <b>4</b> is a graph showing the relationship between the amount of Si added to a HfO<sub>2</sub> film and the relative dielectric constant of the HfO<sub>2</sub> film.</li><li>Figure <b>5</b> is a graph showing the relationship between the amount of Si added to a HfO<sub>2</sub> film and the reliability life of the HfO<sub>2</sub> film.</li><li>Figure <b>6</b> is a graph showing the relationship between the amount of Si added to a HfO<sub>2</sub> film and the thermal stability and the reliability of the HfO<sub>2</sub> film.</li><li>Figures <b>7A</b> to <b>7C</b> are cross-sectional views showing the processes in a method for producing a semiconductor device according to a second embodiment of the present invention.</li><li>Figures <b>8A</b> to <b>8C</b> are cross-sectional views showing the processes in a method for producing the semiconductor device according to the second embodiment of the present invention.</li><li>Figures <b>9A</b> to <b>9D</b> are views illustrating the behavior resulted from PDA in the method for producing the semiconductor device according to the second embodiment of the present invention.</li><li>Figure <b>10</b> is a graph showing the results of measurement by TDS regarding hydrogen being desorbing from the HfO<sub>2</sub> film due to a heat treatment.</li><li>Figure <b>11</b> is a graph showing the results of C-V measurement after a heat treatment with respect to a H-containing HfO<sub>2</sub> film formed by CVD using Hf-t-butoxide in the method for producing a semiconductor device according to the second embodiment of the present invention.</li><li>Figure <b>12</b> is a graph showing the result of C-V measurement after a heat treatment with respect to a H-free HfO<sub>2</sub> film formed by CVD using a source that does not contain hydrogen as a comparative example.</li><li>Figure <b>13</b> is a graph showing the results of a comparison in the thermal stability between the case where the H-containing HfO<sub>2</sub> film (the second embodiment of the present invention) is used and the case where the H-free HfO<sub>2</sub> film (comparative example) is used in a MOS capacitor having a layered structure of Si substrate / SiN film / HfO<sub>2</sub> film / polysilicon film.</li><li>Figure <b>14</b> is a graph showing the relationship between the physical thickness of a HfO<sub>2</sub> film that has just formed and the leak current after a MOS capacitor is complete in the case where PDA in the method for producing a semiconductor device of the second embodiment of the present invention is performed with respect to the HfO<sub>2</sub> film, which is an insulating film of the MOS capacitor.</li></ul>
BEST MODE FOR CARRYING OUT THE INVENTION
First Embodiment
0055Hereinafter, a semiconductor device of a first embodiment of the present invention, more specifically, a MISFET will be described with reference to the accompanying drawings.
0056Figure <b>1</b> shows the cross-sectional structure of a semiconductor device of a first embodiment.
0057As shown in Figure <b>1,</b> a gate electrode <b>12</b> is formed on a silicon substrate <b>10</b> via a gate insulating film <b>11.</b> An impurity diffusion layer <b>13</b> serving as a source region or a drain region is formed on both sides of the gate electrode <b>12</b> in the silicon substrate <b>10.</b> The gate insulating film <b>11</b> includes a high dielectric constant film <b>11a</b> made of insulative metal oxide, a lower barrier film <b>11b</b> formed below the high dielectric constant film <b>11a</b>, and an upper barrier film <b>11c</b> formed above the high dielectric constant film <b>11a</b>
0058More specifically, the high dielectric constant film <b>11a</b> is formed of a substance in which silicon is contained in hafnium oxide (HfO<sub>2</sub>) having a high relative dielectric constant, that is, a silicon-containing hafnium oxide (Hf<sub>x</sub>Si<sub>y</sub>O<sub>2</sub>, where x > y > 0). The lower barrier film <b>11b</b> for preventing a reaction between the silicon substrate <b>10</b> and the high dielectric constant film <b>11a</b> is made of, for example, a silicon oxynitride film containing hafnium. The upper barrier film <b>11c</b> for preventing a reaction between the high dielectric constant film <b>11a</b> and the gate electrode <b>12</b> is made of, for example, a silicon-containing hafnium oxide film containing nitrogen. That is to say, the lower barrier film <b>11b</b> and the upper barrier film <b>11c</b> are high dielectric constant barrier films. The gate electrode <b>12</b> is made of, for example, a polysilicon film doped with phosphorus.
0059The high dielectric constant film <b>11a</b> may contain nitrogen. When the physical thickness of the gate insulating film <b>11</b> is about 4 nm, the physical thickness of the high dielectric constant film <b>11a</b> is about 2 nm, the physical thickness of the lower barrier film <b>11b</b> is slightly smaller than 1 nm, and the physical thickness of the upper barrier film <b>11c</b> is slightly larger than 1 nm. All of the high dielectric constant film <b>11a</b> the lower barrier film <b>11b,</b> and the upper barrier film <b>11c</b> are amorphous.
0060In this embodiment, silicon is contained in the HfO<sub>2</sub> film that serves as the high dielectric constant film <b>11a</b> for the purpose of ensuring the thermal stability of the high dielectric constant film <b>11a.</b> In other words, the high dielectric constant film <b>11a</b> containing silicon is hardly crystallized (or is only partially crystallized and remains amorphous) when being subjected to a heat treatment at a high temperature, so that an increase of leak current due to crystal grain boundaries or defect level can be suppressed. Hereinafter, this embodiment will be described more specifically with reference to the accompanying drawings.
0061Figure <b>2</b> shows the relationship between the amount of silicon (Si) added to HfO<sub>2</sub> and the crystallization temperature of HfO<sub>2</sub> and the thermal stability guarantee temperature of HfO<sub>2</sub>. The crystallization temperature refers to the temperature at which an amorphous state started to change into a crystalline state. In other words, since a change of the state starts at the crystallization temperature, the entire substance (HfO<sub>2</sub>) is not necessarily crystallized immediately even if the temperature exceeds the crystallization temperature.
0062In Figure <b>2,</b> the horizontal axis shows the ratio X<sub>1</sub> (% representation) of the number of Si atoms contained in HfO<sub>2</sub> per unit volume (hereinafter, referred to as "Si concentration") to the sum of the Si concentration and the number of Hf atoms contained in HfO<sub>2</sub> per unit volume (hereinafter, referred to as "Hf concentration"). In other words, the far left end in the horizontal axis (X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration )) × 100 = 0%) indicates HfO<sub>2</sub> that contains no Si, and the far right end in the horizontal axis (X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration )) × 100 = 100%) indicates SiO<sub>2</sub> that contains no Hf. The vertical axis shows the temperature.
0063As shown in Figure <b>2,</b> the crystallization temperature and the thermal stability guarantee temperature of HfO<sub>2</sub> increase with the ratio X<sub>1</sub>, that is, the amount of added Si. In other words, the addition of silicon to HfO<sub>2</sub> increases the thermal stability of HfO<sub>2</sub>. This is because an increase of the Si amount makes it easy that Si-containing HfO<sub>2</sub>, that is, a Hf silicate material remains amorphous, and as a result, the entire HfO<sub>2</sub> film hardly is crystallized and remains amorphous.
0064Herein, the thermal stability guarantee temperature refers to the annealing temperature at which a drastic increase of leak current starts to occur in an insulating film made of HfO<sub>2</sub> when an annealing treatment is performed with respect to a MOS capacitor structure having the insulating film for 30 seconds in N<sub>2</sub> gas at 1 atm with a rapid thermal process (RTP) apparatus. Therefore, at temperatures below the thermal stability guarantee temperature, the leak current and the capacitance in the MOS capacitor structure employing the Si-containing HfO<sub>2</sub> film indicates an ideal value. On the other hand, at temperatures above the thermal stability guarantee temperature, the leak current in the MOS capacitor structure increases by about three orders due to a drastic increase of defects locally occurring in the Si-containing HfO<sub>2</sub> film. At this point, the capacitance in an accumulation state in a C-V (capacitance-voltage) measurement diverges, and therefore it becomes impossible to measure the capacitance of the MOS capacitor. In other words, at temperatures above the thermal stability guarantee temperature, the MOS capacitor structure employing the Si-containing HfO<sub>2</sub> film cannot serve as a capacitor.
0065When the ratio X<sub>1</sub> is 70% or more, the substantially entire Si-containing HfO<sub>2</sub> film can be kept amorphous even at high temperatures, so that even if the film is subjected to a high temperature process at 1200°C, leak current can be suppressed. If the ratio X<sub>1</sub> is at least 23%, the crystals produced when the Si-containing HfO<sub>2</sub> film is crystallized are microcrystalline, and the film as a whole is predominantly in the amorphous state. Therefore, leak current can be suppressed even if the film is subjected to a high temperature process of 900°C. Herein, the case where the material to be used is mostly amorphous, or the case where the material to be used contains crystallites to the extent that makes substantially no influence on the thermal stability, that is, the heat resistance, is also regarded as being amorphous.
0066As shown in Figure <b>2</b>, the straight line showing the range of the process temperature that can be used in the process for producing a semiconductor device and the range of the Si concentration in the Si-containing HfO<sub>2</sub> film can be defined as T = 6.69 · X<sub>1</sub> + 749.4, where X<sub>1</sub> represents the Si concentration /(Si concentration + Hf concentration) × 100 and T [°C] represents the thermal stability guarantee temperature (more specifically, when a polysilicon electrode is used). In other words, it is necessary that the process temperature and the Si concentration are in the range below T = 6.69 · X<sub>1</sub> + 749.4. More specifically, when the value of X<sub>1</sub>, that is, the composition of the Si-containing HfO<sub>2</sub> is determined, the process temperature has to be in the temperature range of not more than the thermal stability guarantee temperature T corresponding to the predetermined value of X<sub>1</sub>. On the other hand, when the maximum temperature of the process is determined, it is necessary to select a Si-containing HfO<sub>2</sub> film, that is, a Hf silicate film to which Si is added such that X<sub>1</sub> is larger than a value of X<sub>1</sub> when the maximum temperature is used as the thermal stability guarantee temperature T. In the case of the structure of the semiconductor device of this embodiment shown in Figure <b>1,</b> the Si concentration can be determined as described above, with respect to, for example, either the entire gate insulating film <b>11</b> or a region about 2nm below the interface with the gate electrode <b>12</b> in the gate insulating film <b>11</b> in view of a contact with the gate electrode <b>12.</b>
0067Figure <b>3</b> shows the allowable range of the composition (X<sub>1</sub>) of Hf silicate that can ensure the thermal stability, which was obtained corresponding to various maximum process temperatures based on the relationship (experiment results) shown in Figure <b>2</b>. As shown in Figure <b>3,</b> for example, when the maximum process temperature is about 900°C (e.g., in the process in which polysilicon is used as the electrode material), X<sub>1</sub> should be at least 23% in order to prevent a drastic increase of leak current due to defects or the like and ensures the thermal stability.
0068Figure <b>4</b> shows the relationship between the amount of Si added to the HfO<sub>2</sub> film and the relative dielectric constant of the HfO<sub>2</sub> film. In Figure <b>4,</b> the upper horizontal axis shows X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 as described above, which indicates the Si amount. The lower horizontal axis shows X<sub>2</sub> = (Hf concentration / (Si concentration + Hf concentration)) × 100 as described above, which indicates the Hf amount. The vertical axis shows the relative dielectric constant of the HfO<sub>2</sub> film. □ shows the value obtained by an actual measurement of the relative dielectric constant.
0069As shown in Figure <b>4</b>, when X<sub>1</sub> is 0% (that is, when the film is the HfO<sub>2</sub> film, which contains no Si), the relative dielectric constant of the HfO<sub>2</sub> film is about 24, which is the maximum. The relative dielectric constant decreases as the Si amount in the HfO<sub>2</sub> film increases, but the relative dielectric constant is substantially constantly about 11 when X<sub>1</sub> is between 30% and 90%. When the Si amount in the HfO<sub>2</sub> film further increases and exceeds 90%, the relative dielectric constant gradually decreases again, and the relative dielectric constant is about 3.9 when X<sub>1</sub> is 100% (that is, when the film is the SiO<sub>2</sub> film, which contains no Hf). Therefore, when X<sub>1</sub> is 90% or less, that is, when X<sub>2</sub> is 10% or more, a Hf silicate film having a comparatively high and stable relative dielectric constant can be realized.
0070According to the results shown in Figures <b>2</b> to <b>4</b> described above, it is important to set X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 in the high dielectric constant film <b>11a</b> made of silicon-containing HfO<sub>2</sub> to 23% or more and 90% or less in order that the high dielectric constant film <b>11a</b> (which may be a stacked structure of a combination of the high dielectric constant film <b>11a,</b> the lower barrier film <b>11b</b> and/or the upper barrier film <b>11c,</b> instead of the high dielectric constant film <b>11a</b>) has the thermal stability while having a high relative dielectric constant.
0071X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 has the same meaning as (y / (x + y)) × 100 when the composition of the high dielectric constant <b>11a</b> is represented as Hf<sub>x</sub>Si<sub>y</sub>O (where x>0, and y>0). Similarly, X<sub>2</sub> = (Hf concentration / (Si concentration + Hf concentration)) × 100 has the same meaning as (x / (x + y)) × 100. X<sub>1</sub> and X<sub>2</sub> show the relationship between the Si concentration and the Hf concentration, so that also when Hf silicate to be used contains N in the form of Hf silicate nitride, or when it contains other elements such as Cl, F and H, the above description employing X<sub>1</sub> and X<sub>2</sub> is effective.
0072Figure <b>5</b> shows the relationship between the amount of Si added to the HfO<sub>2</sub> film and the reliability life of the HfO<sub>2</sub> film (period of time until breakdown occurs). In Figure <b>5</b>, the upper horizontal axis shows X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 as described above, which indicates the Si amount. The lower horizontal axis shows X<sub>2</sub> = (Hf concentration / (Si concentration + Hf concentration)) × 100 as described above, which indicates the Hf amount. The vertical axis shows the reliability life of the HfO<sub>2</sub> film. □ shows the value obtained by an actual measurement of the reliability life.
0073More specifically, various samples of MOS capacitors having Hf silicate films having different compositions are prepared, and a TDDB (time dependent dielectric breakdown measurement) test is performed to estimate the long term reliability life of the Hf silicate films under the conditions of an incidence of failure of 100 ppm, an insulating film area (MOS area) of 0.1 cm<sup>2</sup>, a temperature of 100°C, an applied voltage V<sub>G</sub> = -1V, and EOT (SiO<sub>2</sub> equivalent thickness) = 1.5 nm. The results are shown in Figure <b>5</b>. Herein, the composition of the Hf silicate in each sample varies in the range from SiO<sub>2</sub>, which contains no Hf, to HfO<sub>2</sub>, which contains no Si. Each sample is formed on a p-type substrate, and a constant negative stress voltage is applied to the electrodes, setting 0 V on the substrate side.
0074More specifically, the insulating film area of each sample used in the TDDB test is in the range from 3 × 10<sup>-7</sup> cm<sup>2</sup> to 5 × 10<sup>-5</sup> cm<sup>2</sup>. To obtain the reliability life at an insulating film area of 0.1 cm<sup>2</sup>, the following equation based on the assumption that defects in the insulating film are distributed according to the Poisson distribution was used:
0075The reliability life of the insulating film area 1 = the reliability life of the insulating film area 2 × (insulating film area 2 / insulating film area 1) <sup>(1/β)</sup>, where β is a Weibull gradient. The temperature during the TDDB test is in the range from room temperature to 100°C. To obtain the reliability life at a temperature of 100°C, activation energy of the reliability life obtained in advance with respect to a temperature change was used. To obtain the reliability life at an incidence of failure of 100 ppm, a Weibull gradient β was obtained based on a Weibull plot obtained by the TDDB test, and then the approximate straight line of an intrinsic breakdown was extended. Furthermore, in the TDDB test, V<sub>G</sub> larger than 1 V as an absolute value is used, whereas in order to obtain the reliability life at V<sub>G</sub> = - I V, experiment data of the reliability life corresponding to a real electric field Eox (real) that is obtained from an equation of (V<sub>G</sub> (at the time of the TDDB test) -Vfb)/Tph, where Vfb is a flat band voltage, and Tph is the physical thickness of the entire insulating film, were extended by the straight-line approximation.
0076According to the results shown in Figure <b>5</b> obtained using the above-described method, when X<sub>1</sub> (upper horizontal axis) is 30% or less, that is, when X<sub>2</sub> is 70% or more, the reliability life of the Hf silicate film is 10 years or more. The results shown in Figure <b>5</b> are those obtained by estimating the reliability life on the lower voltage side with respect to the real electric field Eox (real). The results obtained by estimating the reliability life on the lower voltage side with respect to the V<sub>G</sub> itself at the time of the TDDB test or the effective electric field Eox (effective) obtained by an equation of (V<sub>G</sub> (at the time of TDDB test) -Vfb) / EOT exhibit the similar tendency.
0077According to the results shown in Figures <b>2</b> to <b>4,</b> when thermal stability and a high relative dielectric constant are targeted, it is preferable to set X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 to 23% or more and 90% or less. On the other hand, according to the results shown in Figure <b>5,</b> when X<sub>1</sub> is 30% or less, the reliability life of 10 years or more can be obtained. That is to say, when reliability as well as thermal stability and a high relative dielectric constant are targeted, the preferable range of X<sub>1</sub> is 23% or more and 30% or less. However, in the case of a process that does not require a high temperature treatment after a gate insulating film is formed, such as a replacement gate process (process that allows a gate electrode to be formed after formation of source and drain regions by using a dummy gate), more specifically, in the case of a process that does not require a heat treatment at 750°C or more after a gate electrode is formed, it is sufficient to target only reliability, so that the preferable range of X<sub>1</sub> is 30% or less.
0078Figure <b>6</b> shows the relationship between the amount of Si added to the HfO<sub>2</sub> film and the thermal stability and the reliability of the HfO<sub>2</sub> film.
0079As shown in Figure <b>6,</b> the preferable range of the structure (composition) of the high-k gate insulating film made of a HfO<sub>2</sub> film containing Si or the process temperature can be divided roughly into three regions. To be specific, when only thermal stability is targeted, the preferable range is below T = 6.69 · X<sub>1</sub> + 749.4. In order to obtain a comparatively high relative dielectric constant in the maximum process temperature of 900°C as well, X<sub>1</sub> has to be set to 23% or more and 90% or less. In the case of a process that does not require a high temperature treatment after a gate insulating film is formed, such as a case using a replacement gate, it is sufficient to target only reliability, so that it is sufficient to set X<sub>1</sub> to 30% or less. Furthermore, in a conventional Si process, when a high-k material is used as the gate insulating film material instead of SiON, and Poly-Si or SiGe or the like is used as the gate electrode material, that is, when annealing for activating impurities is performed at a comparatively high temperature after a gate insulating film is formed, it is necessary to target both thermal stability and reliability, so that the range that is below T = 6.69 · X<sub>1</sub> + 749.4 and satisfies that X<sub>1</sub> is 30% or less is preferable. In this case, when the maximum process temperature is 900°C, X<sub>1</sub> has to be set to 23% or more and 30% or less. It should be noted that 900 °C is a typical temperature in annealing for activating impurities contained in a source region, a drain region or an electrode.
0080As described above, according to the first embodiment, the high dielectric constant film <b>11a</b> included in the gate insulating film <b>11</b> is a HfO<sub>2</sub> film containing silicon, so that the high electric constant film <b>11a</b> can be prevented from being crystallized by a high temperature treatment in the production process. Therefore, in a finished semiconductor device, the high dielectric constant film <b>11a</b> remains mostly amorphous, so that leak current can be suppressed from occurring in the gate insulating film <b>11,</b> that is, the high-k gate insulating film. Consequently, the thermal stability of the gate insulating film <b>11</b> can be improved, so that a semiconductor device having excellent heat resistance can be realized, and the process margin in the production of the semiconductor device can be increased.
0081Furthermore, according to the first embodiment, the lower barrier film <b>11b</b> containing silicon, nitrogen and oxygen is present below the high dielectric constant film <b>11a</b> in the gate insulating film <b>11,</b> so that the high dielectric constant film <b>11a</b> and the silicon substrate <b>10</b> can be prevented from being reacted with each other. Herein, the lower barrier film <b>11b</b> prevents the silicon substrate <b>10</b> from being oxidized by oxygen in the high dielectric constant film <b>11a.</b> That is to say, when an oxide film having a relative dielectric constant substantially equal to that of a SiO<sub>2</sub> film is formed on the surface of the silicon substrate <b>10</b> as an interface layer, the relative dielectric constant of the gate insulating film <b>11</b> as a whole decreases significantly, and therefore the lower barrier film <b>11b</b> is provided.
0082Furthermore, according to the first embodiment, the lower barrier film <b>11b</b> contains the same metal as in the high dielectric constant film <b>11a</b> specifically, hafnium, so that the relative dielectric constant of the lower barrier film <b>11b</b> can be higher than that of a regular silicon oxynitride film, so that the relative dielectric constant of the gate insulating film <b>11</b> as a whole can be made higher. More specifically, as shown in Figure <b>4</b>, when hafnium is introduced into the lower barrier film <b>11b</b> in a ratio of 10% or more with respect to silicon (that is X<sub>2</sub> ≧ 10%), so that the relative dielectric constant of the lower barrier film <b>11b</b> can increase effectively. On the other hand, as shown in Figure <b>4</b>, when the silicon content in the lower barrier film <b>11b</b> is too large (more specifically, X<sub>1</sub> ≧ 90%), the relative dielectric constant decreases drastically. In other words, it is very effective to set the Hf concentration in the lower barrier film <b>11b</b> to be higher than X<sub>2</sub> = 0% even to a slight extent in order to reduce the EOT of the entire gate insulating film <b>11.</b>
0083Furthermore, according to the first embodiment, the upper barrier film <b>11c</b> is present in a portion above the high dielectric constant film <b>11a</b> in the gate insulating film <b>11,</b> so that the material of the gate electrode <b>12</b> (polysilicon in this embodiment) is prevented from being mixed with the material of the high dielectric constant film <b>11a</b> (e.g., hafnium) more than necessary, and thus a reduction of the relative dielectric constant of the gate insulating film <b>11</b> can be suppressed. In this case, the barrier effect of the upper barrier film <b>11c</b> can be improved by allowing the upper barrier film <b>11c</b> to contain nitrogen. The relative dielectric constant of the upper barrier film <b>11c</b> can be increased by allowing the upper barrier film <b>11c</b> to contain the same metal, hafnium, as the high dielectric constant film <b>11a,</b> and thus the relative dielectric constant of the entire gate insulating film <b>11</b> can be increased.
0084In the first embodiment, it is preferable to set X<sub>1</sub> = (Si concentration / (Si concentration + Hf concentration)) × 100 in the high dielectric constant film <b>11a</b> (which may be a stacked structure of a combination of the high dielectric constant film <b>11a,</b> the lower barrier film <b>11b</b> and/or the upper barrier film <b>11c</b> instead of the high dielectric constant film <b>11a</b> to 23% or more and 90% or less. By doing this, the relative dielectric constant of the high dielectric constant film <b>11a</b> can be increased and even if a heat treatment at about 900°C is performed, the high dielectric constant film <b>11a</b> can be suppressed from being crystallized, so that an increase of leak current due to defects or the like can be prevented. In other words, the thermal stability of the gate insulating film <b>11</b> can be ensured while the relative dielectric constant of the gate insulating film <b>11</b> is kept sufficient. In this case, it is more preferable to set X<sub>1</sub> in the high dielectric constant film <b>11a</b> to 23% or more and 30% or less. By doing this, in addition to the above-described advantages, a sufficient reliability life of the high dielectric constant film <b>11a,</b> that is, the gate insulating film <b>11</b> can be obtained. When the maximum process temperature is reduced to be significantly low by the use of a replacement gate or the like, merely setting X<sub>1</sub> to 30% or less ensures the thermal stability of the gate insulating film <b>11</b> while ensuring sufficient relative dielectric constant and reliability life of the gate insulating film <b>11.</b>
0085In the first embodiment, HfO<sub>2</sub> is used as the high dielectric constant material included in the gate insulating film <b>11,</b> but instead of this material, ZrO<sub>2</sub>, TiO<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>, La<sub>2</sub>O<sub>3</sub>, CeO<sub>2</sub>, Al<sub>2</sub>O<sub>3</sub>, or BST (barium strontium titanium oxide) or the like can be used. Alternatively, ternary oxide such as Hf<sub>x</sub>Al<sub>y</sub>O<sub>2</sub>, where x > 0, and y > 0) can be used. Alternatively, metal silicate in which Si atoms are contained in the above-listed metal oxides can be used.
0086In the first embodiment, the lower barrier film <b>11b</b> and the upper barrier film <b>11c</b> are provided, but there may be no need of providing the lower barrier film <b>11b</b> and/or the upper barrier film <b>11c,</b> depending on the selection of the material of the gate electrode <b>12.</b>
0087In the first embodiment, a polysilicon electrode is used as the gate electrode <b>12</b>, but instead of this, a so-called metal gate electrode made of a metal film such as a stacked film of a TiN film and a Al film (TiN film as the lower film), a Ta film, a TINT film or a TaN film can be used. If a metal film such as a TiN film or TaN film is used as the metal gate electrode material, Si or Ge can be mixed with the metal film.
Second Embodiment
0088Hereinafter, a method for producing a semiconductor device of a second embodiment of the present invention, specifically, a method for producing a MISFET will be described with reference to the accompanying drawings.
0089Figures <b>7A</b> to <b>7C</b> and <b>8A to 8C</b> are cross-sectional views showing the processes of a method for producing a semiconductor device of the second embodiment.
0090First, as shown in Figure <b>7A</b>, an insulating film for isolation (not shown) is formed on a p-type silicon (100) substrate <b>20,</b> and a device forming region is segmented. Then, standard RCA cleaning and diluted HF cleaning are performed with respect to the surface of the silicon substrate <b>20.</b> Thereafter, a silicon nitride film (Si<sub>3</sub>N<sub>4</sub> film) <b>21A</b> having a thickness of about 0.7 nm is formed on the silicon substrate <b>20</b> with NH<sub>3</sub> gas at a temperature of about 700°C. In this process, sufficient hydrogen is captured in the Si<sub>3</sub>N<sub>4</sub> film <b>21A.</b> The Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> eventually becomes the lower barrier film <b>21</b> (see Figure <b>7C</b>).
0091Next, as shown in Figure <b>7B,</b> a hafnium oxide (HfO<sub>2</sub>) film <b>22A</b> having a thickness of about 5 nm is formed on the silicon substrate <b>20</b> by CVD (chemical vapor deposition) employing a source precursor containing hafnium. More specifically, nitrogen (N<sub>2</sub>) gas as a carrier gas is allowed to pass through Hf-t-butoxide (C<sub>16</sub>H<sub>36</sub>HfO<sub>4</sub>), which is a liquid Hf source, to bubble the Hf-t-butoxide to evaporate the Hf-t-butoxide. Then, a RTCVD (rapid thermal CVD) treatment is performed at a temperature of about 500 °C while the N<sub>2</sub> gas containing the evaporated Hf-t-butoxide and dry oxygen (O<sub>2</sub>) gas as an oxidizing agent are supplied to a chamber in which the silicon substrate <b>20</b> (wafer) is placed, and thus a HfO<sub>2</sub> film <b>22A</b> is formed.
0092In this process, the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> is oxidized by the O<sub>2</sub> gas as an oxidizing agent, and turns into a SiON film <b>21B.</b> The SiON film <b>21B</b> has barrier properties for preventing a reaction between the silicon substrate <b>20</b> and the HfO<sub>2</sub> film <b>22A</b> and contains sufficient hydrogen. In this embodiment, after the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> is formed on the silicon substrate <b>20,</b> the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> is oxidized during the formation of the HfO<sub>2</sub> film <b>22A</b> to form the SiON film <b>21B.</b> However, without forming the Si<sub>3</sub>N<sub>4</sub> film <b>21A,</b> the SiON film <b>21B</b> can be directly formed by nitriding the surface of the silicon substrate <b>20</b> with N<sub>2</sub>O gas before forming the HfO<sub>2</sub> film <b>22A.</b>
0093In the process shown in Figure <b>7B,</b> hydrogen (H) contained in the Hf source is spontaneously captured in the HfO<sub>2</sub> film <b>22A.</b> On the other hand, carbon (C) contained in the Hf source is oxidized by the O<sub>2</sub> gas as an oxidizing agent, so that it is exhausted in the form of CO or CO<sub>2</sub> from the chamber. In the chamber, in addition to Hf, O, C, and H, which are constituent elements of the Hf source, N<sub>2</sub> gas is present, but the N<sub>2</sub> gas is very inert at temperatures below about 500 °C, so that an influence of the N<sub>2</sub> gas can be ignored.
0094When the HfO<sub>2</sub> film <b>22A</b> was analyzed by a SIMS method (secondary ion mass spectroscopy), it was found that primary elements constituting the HfO<sub>2</sub> film <b>22A</b> were Hf and O. In the HfO<sub>2</sub> film <b>22A,</b> 3 × 10<sup>19</sup> to 4 × 10<sup>20</sup> carbon atoms/cm<sup>3</sup> and 5 × 10<sup>20</sup> to 4 × 10<sup>21</sup> hydrogen atoms/cm<sup>3</sup> were contained.
0095Next, a heat treatment (hereinafter, referred to as PDA (post deposition anneal)) is performed with respect to the HfO<sub>2</sub> film <b>22A.</b> PDA is performed, for example, in a nitrogen atmosphere at about 700°C for 30 seconds. Now, changes occurring in the stacked structure of the SiON film <b>21B</b> and the HfO<sub>2</sub> film <b>22A</b> by performing PDA will be described in detail with reference to Figures <b>9A</b> to <b>9D.</b> As described above, before performing PDA, as shown in Figure <b>9A,</b> the SiON film <b>21B</b> and the HfO<sub>2</sub> film <b>22A</b> contain hydrogen. When PDA is performed, as shown in Figure <b>9B,</b> hydrogen is desorbed from the SiON film <b>21B</b> and the HfO<sub>2</sub> film <b>22A</b> efficiently in the form of hydrogen gas. As a result, as shown in Figure <b>9C,</b> vacancies (white circles in Figure <b>9C)</b> are formed in the SiON film <b>21B</b> and the HfO<sub>2</sub> film <b>22A.</b> Then, as shown in Figure <b>9D,</b> silicon contained in the silicon substrate <b>20</b> or the SiON film <b>21B</b> is diffused into the HfO<sub>2</sub> film <b>22A</b> through the vacancies, and Hf contained in the HfO<sub>2</sub> film <b>22A</b> is diffused into the SiON film <b>21B.</b> As a result, as shown in Figure <b>7C,</b> a silicon-containing HfO<sub>2</sub> film <b>22</b> having high thermal stability is formed, and a lower barrier film <b>21</b> made of the Hf-containing SiON film having a high relative dielectric constant can be formed. The silicon-containing HfO<sub>2</sub> film <b>22</b> is formed by making the HfO<sub>2</sub> film <b>22A</b> dense by the diffusion of silicon. The specific composition of the lower barrier film <b>21</b> is the same as the lower barrier film <b>11b</b> of the first embodiment.
0096In other words, vacancies obtained by desorbing hydrogen from the HfO<sub>2</sub> film <b>22A</b> and the SiON film <b>21B</b> has the effect of promoting mutual diffusion of Hf and Si. In this case, setting the temperature for PDA to about 700 °C brings about double effects, that is, an effect of promoting hydrogen desorption to facilitate formation of vacancies and an effect of facilitating diffusion of Hf or Si. As a result, one PDA allows Si to be captured in the HfO<sub>2</sub> film <b>22A</b> to form the silicon-containing HfO<sub>2</sub> film <b>22</b> having high thermal stability, and allows Hf to be captured in the SiON film <b>21B</b> to form the lower barrier film <b>21</b> (Hf-containing SiON film) having a high relative dielectric constant. Therefore, the thermal stability of a gate insulating film <b>25</b> (see Figure <b>8C</b>) as a whole including the silicon-containing HfO<sub>2</sub> film <b>22</b> and the lower barrier film <b>21</b> can be improved, and consequently the relative dielectric constant of the gate insulating film <b>25</b> as a whole can be increased.
0097Next, the surface of the silicon-containing HfO<sub>2</sub> film <b>22</b> is nitrided lightly, so that as shown in Figure <b>8A,</b> an upper barrier film <b>23</b> with a thickness of about 2 nm having a high relative dielectric constant is formed. That is to say, the upper barrier film <b>23</b> is formed of the silicon-containing HfO<sub>2</sub> film containing nitrogen. The specific composition of the upper barrier film <b>23</b> is the same as that of the upper barrier film <b>11c</b> of the first embodiment.
0098Next, as shown in Figure <b>8B</b>, a polysilicon film <b>24</b> serving as a gate electrode is formed on the upper barrier film <b>23</b> by, for example, CVD. Thereafter, the polysilicon film <b>24,</b> the upper barrier film <b>23,</b> the silicon-containing HfO<sub>2</sub> film <b>22,</b> and the lower barrier film <b>21</b> are dry-etched sequentially, using a mask pattern (not shown) covering a gate electrode formation region. Thus, as shown in Figure <b>8C</b>, a gate electrode <b>26</b> is formed on the silicon substrate <b>20</b> via the gate insulating film <b>25</b> having a stacked structure of the lower barrier film <b>21,</b> the silicon-containing HfO<sub>2</sub> film <b>22,</b> and the upper barrier film <b>23.</b> Thereafter, ions are implanted into the silicon substrate <b>20</b> with the gate electrode <b>26</b> as a mask, so that an impurity diffusion layer <b>27</b> serving as a source region or a drain region is formed. Finally, in order to activate impurities in the impurity diffusion layers <b>27</b>, a heat treatment is performed at about 950°C for about 30 minutes. The processes described above provide a MIS electric field effect transistor having the high-k gate insulating film.
0099As described above, according to the second embodiment, the HfO<sub>2</sub> film <b>22A</b> containing hydrogen is formed on the silicon substrate <b>20,</b> and then a heat treatment (PDA) is performed with respect to the HfO<sub>2</sub> film <b>22A</b> to desorb hydrogen, and silicon is diffused in the HfO<sub>2</sub> film <b>22A</b> through the thus formed vacancies so that the silicon-containing HfO<sub>2</sub> film <b>22</b> is formed. For this reason, it is possible to allow silicon to be contained efficiently in the HfO<sub>2</sub> film <b>22A</b> and the vacancies eventually disappear so that the silicon-containing HfO<sub>2</sub> film <b>22</b> becomes dense. In this case, as described in the first embodiment, the silicon-containing HfO<sub>2</sub> film <b>22</b> is hardly crystallized by a high temperature in the production process, so that the silicon-containing HfO<sub>2</sub> film <b>22</b> remains mostly amorphous even after a device is complete. As a result, leak current can be suppressed from occurring in the gate insulating film <b>25</b> having the silicon-containing HfO<sub>2</sub> film <b>22,</b> that is, the high-k gate insulating film. Therefore, the thermal stability of the high-k gate insulating film is improved, so that a semiconductor device having excellent heat resistance can be realized and the process margin in the production of a semiconductor device can be increased.
0100Furthermore, according to the second embodiment, before forming the HfO<sub>2</sub> film <b>22A,</b> the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> containing hydrogen is formed on the silicon substrate <b>20.</b> The Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> is oxidized when forming the HfO<sub>2</sub> film <b>22A</b> and turns into the SiON film <b>21B.</b> Thereafter, when the HfO<sub>2</sub> film <b>22A</b> is subjected to PDA, silicon contained in the SiON film <b>21B</b> is diffused into the HfO<sub>2</sub> film <b>22A.</b> Moreover, hydrogen is desorbed from the SiON film <b>21B</b> to form vacancies, and Hf contained in the HfO<sub>2</sub> film <b>22A</b> is diffused into the SiON film <b>21B</b> through the vacancies, so that the lower barrier film <b>21</b> is formed. Therefore, it is ensured that silicon can be contained in the HfO<sub>2</sub> film <b>22A.</b> Furthermore, the HfO<sub>2</sub> film <b>22A</b> or the silicon-containing HfO<sub>2</sub> film <b>22</b> can be prevented from being reacted with the silicon substrate <b>20.</b> Furthermore, the lower barrier film <b>21</b> contains the same metal, Hf as in the silicon-containing HfO<sub>2</sub> film <b>22,</b> so that the relative dielectric constant of the lower barrier film <b>21</b> can be high, and thus the relative dielectric constant of the gate insulating film <b>25</b> as a whole can be high.
0101Moreover, according to the second embodiment, the upper barrier film <b>23</b> is formed by nitriding the surface of the silicon-containing HfO<sub>2</sub> film <b>22</b> in a process between the process for performing PDA to the HfO<sub>2</sub> film <b>22A</b> and the process for forming the polysilicon film <b>24</b> serving as the gate electrode <b>26.</b> Therefore, the material of the gate electrode <b>26</b> and material of the silicon-containing HfO<sub>2</sub> film <b>22</b> are prevented from diffusing each other. Furthermore, the upper barrier film <b>23</b> contains the same metal, Hf as in the silicon-containing HfO<sub>2</sub> film <b>22,</b> so that the relative dielectric constant of the upper barrier film <b>23</b> can be high, and thus the relative dielectric constant of the gate insulating film <b>25</b> as a whole can be high.
0102Furthermore, according to the second embodiment, the HfO<sub>2</sub> film <b>22A</b> is formed by CVD that employs a source precursor containing hafnium and hydrogen, so that it is ensured that hydrogen can be contained in the HfO<sub>2</sub> film <b>22A.</b>
0103Hereinafter, the features (e.g., mutual diffusion of Hf and Si by hydrogen desorption) and the effect (e.g., improvement of thermal stability) of the process of performing PDA to the HfO<sub>2</sub> film <b>22A</b> will be described with reference to the drawings showing experiment data or the like.
0104Figure <b>10</b> shows the result of measurement by TDS (thermal desorption spectroscopy) regarding hydrogen that is being desorbed from the HfO<sub>2</sub> film by a heat treatment. In Figure <b>10,</b> the horizontal axis shows the heat treatment temperature and the vertical axis shows the spectrum intensity of hydrogen gas measured by TDS. As shown in Figure <b>10,</b> when the heat treatment temperature reaches about 400°C, first, hydrogen adsorbed on the surface of the HfO<sub>2</sub> film starts to be desorbed. Thereafter, when the heat treatment temperature reaches about 700°C, hydrogen contained in the HfO<sub>2</sub> film is desorbed. The density of hydrogen molecules that was contained in the HfO<sub>2</sub> film just after deposition and eventually desorbed from the HfO<sub>2</sub> film by a heat treatment was measured and found to be as high as 5.6 × 10<sup>20</sup> molecules/cm<sup>2</sup>. According to the results shown in Figure <b>10,</b> when the heat treatment temperature is about 700°C, the detected amount of desorbed hydrogen is largest. Therefore, the optimal temperature for PDA is about 700°C, and the thus setting allows excessive hydrogen contained in the HfO<sub>2</sub> film to be desorbed so that the HfO<sub>2</sub> film can be made dense most effectively.
0105While performing a heat treatment (temperature increase rate of 10°C / min) in an ultrahigh vacuum with respect to a sample of the HfO<sub>2</sub> film formed on a Si substrate by CVD with Hf-t-butoxide, which is a liquid Hf source, the HfO<sub>2</sub> film that was being heated were subjected to in-situ observation to see its changes, using a high resolution cross-sectional TEM (transmission electron microscope), and the following was confirmed. At room temperature (immediately after the HfO<sub>2</sub> film is formed), an interface layer (corresponding to the SiON film <b>21B</b>) that contains a large number of Si atoms and a small number of Hf atoms is present on the Si substrate, and the HfO<sub>2</sub> layer that contains a small number of Si atoms and a large number of Hf atoms is present on the interface layer. Thereafter, as the temperature increases, in the temperature range from 620°C to 850°C, a mutual diffusion layer that contains a smaller number of Si atoms than that of the interface layer and a smaller number of Hf atoms than that of the HfO<sub>2</sub> layer evidently starts to appear between the interface layer and the HfO<sub>2</sub> layer. Finally, when a high temperature annealing is performed at 860°C, the total physical thickness of a stacked structure (corresponding to the silicon-containing HfO<sub>2</sub> film <b>22</b>) of the HfO<sub>2</sub> layer and the mutual diffusion layer is larger than that of the HfO<sub>2</sub> layer at the time of deposition (room temperature). That is to say, the interface layer is contracted by expansion of the mutual diffusion layer, and as a result, the relative dielectric constant of the entire Hf silicate stacked structure including the interface layer becomes high.
0106In the case of regular PDA, the temperature increase rate is as high as 50°C /sec, and the retention period at a heat treatment temperature of about 700°C is as short as 30 seconds, so that the thermal budget (thermal load) is much smaller than that from the in-situ observation during heating by the high resolution cross-sectional TEM. Therefore, oxidation of the Si substrate caused by PDA occurs only 1 nm or less, and the interface layer becomes very thin because of the mutual diffusion of Si and Hf, so that the final interface layer (corresponding to the lower barrier film <b>21</b>) is about 0.5 nm. Thus, the relative dielectric constant of the entire Hf silicate stacked structure including the interface layer becomes high, and as a result, the EOT of the stacked structure as a whole becomes very small. In other words, forming the HfO<sub>2</sub> film by CVD employing a Hf source containing hydrogen is very advantageous as a method for forming a high-k gate insulating film. On the other hand, a HfO<sub>2</sub> film is formed by CVD employing a regular Hf source free from hydrogen, and an in-situ observation during heating is performed with respect to the HfO<sub>2</sub> film with the high resolution cross-sectional TEM. Then, it was found that mutual diffusion hardly occurred between the interface layer and the HfO<sub>2</sub> layer. As a result, the thermal stability of the HfO<sub>2</sub> layer was not improved and the relative dielectric constant of the stacked structure of the interface layer and the HfO<sub>2</sub> layer was not increased.
0107Figure <b>11</b> shows the results of C-V measurement after the heat treatment with respect to the HfO<sub>2</sub> film containing hydrogen formed by CVD employing Hf-t-butoxide. More specifically, annealing for activating impurities implanted to the gate electrode was performed at 900°C, 950°C and 1050°C with respect to samples of a MOS capacitor employing a HfO<sub>2</sub> film having a physical thickness of 3.0 to 3.3 nm as the gate insulating film and polysilicon as the gate electrode. Then, a gate voltage Vg was applied with a voltage of 0 V set on the substrate side. In Figure <b>11,</b> the horizontal axis shows the gate voltage (Vg) and the vertical axis shows the capacitance. ◆ shows the measured value of the capacitance when a heat treatment was performed at 900°C, ■ shows the measured value of the capacitance when a heat treatment was performed at 950°C, and ▲ shows the measured value of the capacitance when a heat treatment was performed at 1050°C.
0108As shown in Figure <b>11,</b> when the HfO<sub>2</sub> film containing hydrogen formed of Hf-t-butoxide is used, stable C-V curve is shown even if the annealing temperature for activation is increased, and the temperature at which the sample can withstand as an ideal MOS capacitor is as high as 1050°C or more. In other words, in the HfO<sub>2</sub> film containing hydrogen, as a result of occurrence of significant mutual diffusion of Hf and Si accompanied by hydrogen desorption caused by PDA, a Si-containing layer is present on the surface side of the HfO<sub>2</sub> film. Therefore, also when polysilicon is used as the gate electrode, as shown in Figure 11, very stable heat resistance is exhibited at about 1050°C.
0109Figure <b>12</b> shows the result of C-V measurement after a heat treatment with respect to a HfO<sub>2</sub> film free from hydrogen formed by CVD employing a source free from hydrogen, specifically, Hf-nitrato (Hf(NO<sub>3</sub>)<sub>4</sub>) as a comparative example. More specifically, annealing for activating impurities implanted to the gate electrode was performed at 900°C, 950°C and 1150°C with respect to samples of a MOS capacitor employing a HfO<sub>2</sub> film having a physical thickness of 3.0 to 3.3 nm as the gate insulating film and polysilicon as the gate electrode. Then, a gate voltage Vg was applied with a voltage of 0 V set on the substrate side. In Figure <b>12,</b> the horizontal axis shows the gate voltage (Vg) and the vertical axis shows the capacitance. ■ shows the measured value of the capacitance when a heat treatment was performed at 900°C, ◆ shows the measured value of the capacitance when a heat treatment was performed at 950°C, and ▲ shows the measured value of the capacitance when a heat treatment was performed at 1150°C.
0110As shown in Figure <b>12,</b> when the HfO<sub>2</sub> film free from hydrogen formed of Hf-nitrato is used, the temperature at which the sample can withstand as an ideal MOS capacitor is at most 900°C. Taking the results shown in both Figures <b>11</b> and <b>12</b> into consideration, the thermal stability guarantee temperature when the HfO<sub>2</sub> film containing hydrogen is used is 1050°C or more, whereas the thermal stability guarantee temperature when the HfO<sub>2</sub> film free from hydrogen is used is about 900°C. In other words, using the HfO<sub>2</sub> film containing hydrogen improves the thermal stability guarantee temperature by 150°C or more.
0111Figure <b>13</b> shows the results of comparison in the thermal stability between the case where a HfO<sub>2</sub> film containing hydrogen was used and the case where a HfO<sub>2</sub> film free from hydrogen was used in a MOS capacitor having a stacked structure of Si substrate / SiN film / HfO<sub>2</sub> film / polysilicon film. More specifically, annealing for activation was performed at temperatures in the range from 900°C to 1150°C for 30 seconds in a nitrogen atmosphere with respect to each MOS capacitor sample. Then, a gate voltage (V<sub>G</sub>) of -1.0 V was applied with a voltage of 0 V set on the substrate side, and leak current J<sub>G</sub> was measured. The HfO<sub>2</sub> film containing hydrogen was formed of Hf-t-butoxide, and the HfO<sub>2</sub> film free from hydrogen was formed of a source free from hydrogen. In Figure 13, the horizontal axis shows the activation annealing temperature, and the vertical axis shows the leak current J<sub>G</sub>. ◆ shows the measured value of the leak current J<sub>G</sub> when a source free from hydrogen is used, and □ shows the measured value of the leak current J<sub>G</sub> when Hf-t-butoxide was used.
0112As shown in Figure <b>13,</b> when the HfO<sub>2</sub> film containing hydrogen formed of Hf-t-butoxide was used and the annealing temperature for activation was increased, an increase of the leak current J<sub>G</sub> could be restricted to only one order. On the other hand, in the case where the HfO<sub>2</sub> film free from hydrogen was used and the annealing temperature for activation was increased, the leak current J<sub>G</sub> was increased by about three orders, that is, about 1000 times larger than in the case of the HfO<sub>2</sub> film containing hydrogen. In other words, using the HfO<sub>2</sub> film containing hydrogen can reduce the defect production probability to about 1/1000 of that in the case where the HfO<sub>2</sub> film free from hydrogen.
0113Each of the HfO<sub>2</sub> film containing hydrogen and the HfO<sub>2</sub> film free from hydrogen was deposited on a silicon substrate to the same physical thickness (3 nm), and the EOT of the HfO<sub>2</sub> film including the interface layer was measured. The results were as follows. The EOT was 1.1 nm when the HfO<sub>2</sub> film containing hydrogen was deposited, and the EOT was 1.6 nm when the HfO<sub>2</sub> film free from hydrogen was deposited. That is to say, the relative dielectric constant when the HfO<sub>2</sub> film containing hydrogen was deposited was about 1.46 times higher than that when the HfO<sub>2</sub> film free from hydrogen was deposited. This is caused by the fact that when the HfO<sub>2</sub> film containing hydrogen was deposited, Si and Hf are diffused mutually between the interface layer and HfO<sub>2</sub> layer so that Hf is contained in the interface layer, and consequently the relative dielectric constant in the interface layer portion is reduced significantly.
0114A HfO<sub>2</sub> film containing hydrogen having a thickness of 3.5 nm was formed on a silicon substrate, and then a PDA treatment (800°C, 30 seconds) was performed with respect to the HfO<sub>2</sub> film. Thereafter, Si, O and Hf were measured from the surface side of the HfO<sub>2</sub> film by XPS (X-ray photoelectron spectroscopy) using MgKa radiation and the composition of the HfO<sub>2</sub> film after the PDA treatment was found to be 0.6 for Hf, 0.49 for Si and 2.0 for O. It should be noted that since primarily the surface of the HfO<sub>2</sub> film was observed for measurement by the XPS technique, the detection depth was set to about 2 to 3 nm by detecting photoelectrons having an escape angle of 57 degrees with respect to the surface of the substrate. The results as described above indicate that in the HfO<sub>2</sub> film after the PDA treatment, Si has been diffused up to the vicinity of the surface.
0115Figure <b>14</b> shows the relationship between the physical thickness of the HfO<sub>2</sub> film immediately after being formed and the leak current after a MOS capacitor was complete in the case where PDA was performed with respect to the HfO<sub>2</sub> film (containing hydrogen), which is the insulating film of the MOS capacitor. More specifically, after a HfO<sub>2</sub> film containing hydrogen was formed by CVD, PDA was performed to the HfO<sub>2</sub> film in a nitrogen atmosphere at pressure of about 60000 Pa (450 torr) at 800°C for 30 seconds. Thereafter, a polysilicon film that was to serve as a gate electrode was deposited. Then, after ions were implanted into the polysilicon film, annealing for activation is performed in a nitrogen atmosphere at a pressure of about 110000 Pa (760 torr) at 900°C for 30 seconds. Thereafter, a gate voltage (V<sub>G</sub>) of-1.0 V was applied with 0 V on the substrate side, and the leak current J<sub>G</sub> was measured. The physical thickness of the HfO<sub>2</sub> film immediately after being formed is measured by an ellipsometry method (polarization method). For comparison, with respect to samples of MOS capacitors obtained by omitting the process of performing PDA with respect to the HfO<sub>2</sub> film, the relationship between the physical thickness of the HfO<sub>2</sub> film immediately after being formed and the leak current after the MOS capacitor was produced was investigated.
0116As shown in Figure <b>14,</b> when PDA is performed, a smaller leak current J<sub>G</sub> is achieved than when PDA is not performed. This seems to be caused for the reason as follows: Si is diffused to the HfO<sub>2</sub> film by the PDA, which prevents the HfO<sub>2</sub> film from being crystallized by annealing for activation, therefore the HfO<sub>2</sub> film in the finished MOS capacitor remains mostly amorphous, so that the gate leak current can be suppressed from increasing. Furthermore, it seems that the gate leak current has been reduced also by the fact that a reaction between the electrode material and the material of the high dielectric constant film has been suppressed by achieving a dense silicon-containing HfO<sub>2</sub> film. As shown in Figure <b>14,</b> the effect of suppressing the gate leak current in the case where PDA is performed is exhibited more significantly as the physical thickness of the HfO<sub>2</sub> film is smaller. The above results have confirmed that it is very important to provide a process of performing PDA (post deposition anneal) with respect to the high dielectric constant film after the high dielectric constant film that will serve as a gate insulating film is deposited and before a gate electrode is formed in order to reduce the leak current effectively.
0117In the second embodiment, a polysilicon film <b>24</b> is used as the gate electrode <b>26</b>, but a metal film can be used instead. For example, the surface of the silicon-containing HfO<sub>2</sub> film <b>22</b> is nitrided, and then a TiN film and an Al film that will serve as the gate electrode <b>26</b> may be deposited sequentially by sputtering. Alternatively, after the surface of the silicon-containing HfO<sub>2</sub> film <b>22</b> is nitrided, a Ta film that will serve as the gate electrode <b>26</b> may be deposited. Alternatively, a TiN film, a TaN film or the like may be deposited without nitriding the surface of the silicon-containing HfO<sub>2</sub> film <b>22.</b> In this case, Si or Ge can be mixed with the TiN film, the TaN film or the like. When a metal film is used as the gate electrode <b>26</b> as described above, after the metal film is formed, defects in the gate insulating film <b>25</b> can be reduced further by further applying a heat treatment (PMA: post metalization anneal). When a C-V measurement is performed with respect to the thus formed MOS structure, it is confirmed that the amount of the defects in the insulating film and the corresponding hysteresis are reduced. A temperature of 700°C or more is effective as the temperature of PMA When annealing is performed in a gas containing hydrogen at 450°C for about 30 minutes, the interface state in the gate insulating film <b>25</b> can be reduced.
0118In the second embodiment, a HfO<sub>2</sub> film is used as the high dielectric constant material constituting the gate insulating film <b>25,</b> ZrO<sub>2</sub>, TiO<sub>2</sub>, Ta<sub>2</sub>O<sub>5</sub>, La<sub>2</sub>O<sub>3</sub>, CeO<sub>2</sub>, Al<sub>2</sub>O<sub>3</sub>, or BST (barium strontium titanium oxide) can be used instead. Alternatively, ternary oxide such as Hf<sub>x</sub>Al<sub>y</sub>O<sub>2</sub>, where x > 0 and y > 0) can be used. Alternatively, metal silicate in which Si atoms are contained in metal oxide as described above can be used. In any case, the effect of mutual diffusion in the high dielectric constant film containing hydrogen can be realized regardless of the composition or the constituent materials at the time of the deposition of the high dielectric constant film.
0119In the second embodiment, the HfO<sub>2</sub> film <b>22A</b> is deposited by CVD employing Hf-t-butoxide, which is a liquid Hf source precursor. However, instead of this, when CVD is used, other Hf source precursors containing hydrogen and hafnium such as tetrakis diethylamido hafnium, (TDEAH: C<sub>16</sub>H<sub>40</sub>N<sub>4</sub>Hf), tetrakis dimethylamino hafnium (TDMAH: C<sub>16</sub>H<sub>36</sub>HfO<sub>4</sub>), or tetrakis 1-methoxy-2-methyl-2-propoxy hafnium (Hf(MMP)<sub>4</sub>: Hf[OC(CH<sub>3</sub>)<sub>2</sub>CH<sub>2</sub>OCH<sub>3</sub>]<sub>4</sub>) can be used. Alternatively, a HfO<sub>2</sub> film can be formed by CVD employing a solid Hf source precursor such as Hf-nitrato (Hf(NO<sub>3</sub>)<sub>4</sub>) and a source gas containing hydrogen such as hydrogen gas. Alternatively, when PVD (physical vapor deposition) such as sputtering is used, a target containing hafnium can be used in an atmosphere containing hydrogen. More specifically, a hafnium target can be used in an atmosphere containing oxygen gas and argon gas to which hydrogen gas is added, or a hafnium oxide target can be used in an atmosphere containing argon gas to which hydrogen gas is added. Hydrogen gas is added for hydrogen to be captured in the high dielectric constant film (HfO<sub>2</sub> film).
0120In the second embodiment, hydrogen is captured in the HfO<sub>2</sub> film <b>22A</b> or the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> as a predetermined substance (substance for vacancy formation), but instead of this, for example, chlorine, fluorine, or iodine can be captured using a halogen-based gas. Any substances can be used as the substance for vacancy formation, as long as it can be desorbed from the HfO<sub>2</sub> film <b>22A</b> or the Si<sub>3</sub>N<sub>4</sub> film <b>21A</b> in the form of gas at a temperature of about 600 to 850°C and can promote the diffusion of Hf or Si through the thus formed vacancies. Furthermore, the substance for vacancy formation for the HfO<sub>2</sub> film <b>22A</b> may be different from that for the Si<sub>3</sub>N<sub>4</sub> film <b>21A.</b>
0121In the second embodiment, the Si<sub>3</sub>N<sub>4</sub> film <b>21A,</b> that is, the lower barrier film <b>21</b> can be formed by performing, for example, thermal nitridation or plasma nitridation in a gas containing nitrogen with respect to the silicon substrate <b>20.</b> Alternatively, the SiON film <b>21B</b> can be directly formed by nitriding the surface of the silicon substrate <b>20</b> with N<sub>2</sub>O gas before forming the HfO<sub>2</sub> film <b>22A</b> without forming the Si<sub>3</sub>N<sub>4</sub> film <b>21A.</b> Alternatively, the high dielectric insulating film containing nitrogen that will become the lower barrier film <b>21</b> can be directly formed on the silicon substrate <b>20</b> by introducing a gas containing nitrogen in the early stage of the formation of the HfO<sub>2</sub> film <b>22A</b> by evaporation.
0122In the second embodiment, the upper barrier film <b>23</b> can be formed by performing, for example, thermal nitridation or plasma nitridation in a gas containing nitrogen with respect to the silicon-containing HfO<sub>2</sub> film <b>22.</b> Alternatively, the upper barrier film <b>23</b> can be formed by nitriding the surface of the silicon-containing HfO<sub>2</sub> film <b>22</b> by introducing nitrogen gas in the early stage of the formation of the polysilicon film <b>24</b> that will serve as the gate electrode <b>26.</b> Alternatively, the high dielectric insulating film containing nitrogen that will become the upper barrier film <b>23</b> can be formed on the side of the surface of the HfO<sub>2</sub> film <b>22A</b> by introducing a gas containing nitrogen in the final stage of the formation of the HfO<sub>2</sub> film <b>22A</b> by evaporation.
0123In the second embodiment, PDA is performed with respect to the HfO<sub>2</sub> film <b>22A</b> to form the silicon-containing HfO<sub>2</sub> film <b>22,</b> and then the upper barrier film <b>23</b> is formed by nitriding the surface of the silicon-containing HfO<sub>2</sub> film <b>22.</b> However, instead of this, after the upper barrier film <b>23</b> is formed by nitriding the surface of the HfO<sub>2</sub> film <b>22A,</b> PDA is performed with respect to the HfO<sub>2</sub> film <b>22A</b> to form the silicon-containing HfO<sub>2</sub> film <b>22.</b>
0124In the second embodiment, the entire stacked structure of the lower barrier film <b>21,</b> the silicon-containing HfO<sub>2</sub> film <b>22</b> and the upper barrier film <b>23</b> may contain nitrogen.
0125In the second embodiment, it is preferable that in the process shown in Figure <b>7B,</b> first, a source such as evaporated Hf-t-butoxide is supplied into a chamber, and then oxygen gas is supplied to the chamber, and thereafter the temperature in the chamber is increased from room temperature and kept in a predetermined temperature range of about 300 to 500°C. This makes it possible that Hf molecules are adsorbed rapidly on the silicon substrate <b>20</b> at a low temperature, so that the HfO<sub>2</sub> film <b>22A</b> can be formed uniformly. Furthermore, the incubation time from the start of the supply of the source gas to the start of crystal growth of the HfO<sub>2</sub> film can be shortened. Furthermore, the interface layer (SiON film <b>21B</b>) formed between the HfO<sub>2</sub> film <b>22A</b> and the silicon substrate <b>20</b> can be thin.
0126In the second embodiment, it is preferable that the temperature for the heat treatment in PDA in the process shown in Figure <b>7C</b> is 600°C or more and 850°C or less. This ensures that hydrogen can be desorbed from the HfO<sub>2</sub> film <b>22A</b> and thus silicon can be diffused in the HfO<sub>2</sub> film <b>22A.</b>
0127In the second embodiment, it is preferable to satisfy T ≦6.69 · y/(x +y) + 749.4, where the composition of the silicon-containing HfO<sub>2</sub> film <b>22</b> is expressed as Hf<sub>x</sub>Si<sub>y</sub>O, where x > 0, and y >0, and the maximum temperature in the production process is expressed as T [°C]. This ensures the thermal stability of the gate insulating film <b>25</b> having the silicon-containing HfO<sub>2</sub> film <b>22.</b> When the gate electrode <b>26</b> is made of a material containing silicon, it is preferable to satisfy T ≦6.69 · y/(x +y) + 749.4, and y/(x +y) ≦ 0.30. This ensures the thermal stability and the reliability of the gate insulating film <b>25</b> having the silicon-containing HfO<sub>2</sub> film <b>22.</b>
0128The invention may be embodied in other forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed in this application are to be considered in all respects as illustrative and not limiting. The scope of the invention is indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are intended to be embraced therein.
Contents5
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| EP1548839A1 | Cited by | European Patent Office (EPO) | Search report |
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| Information related to communication of intention to grant a patent modifiedORIGINAL CODE: EPIDOSCIGR1GRAC | GRAC | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Title (correction)SEMICONDUCTOR DEVICERTI1 | RTI1 | EP | |
| Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deletedORIGINAL CODE: EPIDOSDIGR1GRAJ | GRAJ | EP | |
| Despatch of communication of intention to grant a patentORIGINAL CODE: EPIDOSNIGR1GRAP | GRAP | EP | |
| Amendment of ipc main classPREVIOUS MAIN CLASS: H01L0029780000R079 | R079 | DE | |
| First examination report despatched17Q | 17Q | EP | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | EP | |
| Supplementary search report drawn up and despatched (corrected)RA4 | RA4 | EP | |
| Supplementary search report drawn up and despatchedA4 | A4 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information on inventor provided before grant (corrected)RIN1 | RIN1 | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 1363333
- Application
- 27387265
Titles3
- German
- HALBLEITERBAUELEMENT UND VERFAHREN ZU SEINER HERSTELLUNG
- English
- SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
- French
- DISPOSITIF DE SEMI-CONDUCTEURS ET PROCEDE DE FABRICATION ASSOCIE
Classification
- CPC, 8
- H10D64/01338
- H10D30/60
- H10D64/693
- H10D64/685
- H10D64/691
- H10D64/0134
- H10D64/01344
- H10D64/01342
- IPC, 3
- H01L29 78
- H10P14 692
- H01L29 51
Designated states1
- Contracting states, 1
- Türkiye