The semiconductor led device and producing method

Description of equivalent WO 0221605 A1

THE SEMICONDUCTOR LED DEVICE AND PRODUCING METHOD

TECHNICAL FIELD

0003The present invention is related to semiconductor devices and manufacturing

0004methods thereof. More particularly, the invention relates to a semiconductor device and

0005manufacturing methods thereof with gallium nitride type crystal passivation layer and

0006manufacturing method thereof which improves the effectiveness for blocking leakage

0007current and theraial emission efficiency by using InxGal-xN crystal body instead of the

0008conventional dielectric passivation layer.

BACKGROUND ART

0010As shown in FIG. 1 , a GaN type Light Emitting Diode(LED) generally comprises a

0011buffer layer 11 on a sapphire substrate 10, a n-type GaN layer 12, a InGaN(or GaN)

0012active layer 13, a p-type GaN layer 14, a transparent electrode 15, a dielectric

0013passivation layer 16, a n-type metal electrode 17 and a p-type metal electrode 18. The

0014method of forming a GaN type Light Emitting Diode(LED) comprises the steps of

0015successively crystal growing of a buffer layer 11 on a sapphire substrate 10, a n-type

0016GaN layer 12, a InGaN(or GaN) active layer 13, and a p-type GaN layer 14 according to the Metal Organic Chemical Vapor Deposition(MOCVD) method; partly etching up to

0017a n-type GaN layer 12 in order to form a n-type metal electrode 17; forming a

0018transparent electrode 15; coating the surface with a dielectric passivation layer except

0019the electrode region; and depositing a n-type metal electrode 17 and a p-type metal

0020electrode 18.

0021FIG. 2 is a cross-section diagram which illustrates the principle of leakage current

0022occurrence for a GaN type optical semiconductor device in the absence of a dielectric

0023passivation layer.

0024As shown in FIG. 2, the leakage current flows through the surfaces and boundaries

0025when a voltage is applied to the electrode teπninals and has significant effects on the

0026performance of the device and sometimes causes destruction of the device.

0027For the case of GaN type semiconductor devices, boundaries for electrode

0028deposition of a device are fomied by Reactive Ion Etching (RIE). At this instance, the

0029boundaries are damaged due to high energy ion bombardments and leakage current

0030occurs along the damaged boundaries. Also, during the breaking or sawing of a device

0031into individual chips after the completion of the process, a lot of stress exist on the

0032cleavage boundary of the crystal growth layer and generally the boundaries become

0033very rough due to the cleave not coinciding with the crystal faces. A large amount of

0034leakage current flows along these rough boundaries.

0035Accordingly, at the conventional GaN type semiconductor, as shown on FIG. 1, the leakage current is prevented by coating the surface between the p metal electrode 18 and

0036n-GaN 12 with a dielectric passivation layer 16.

0037The dielectric passivation layer 16 cuts off the passage of the leakage current that

0038flows on the boundaries through the semiconductor surface and protects the surface of

0039the devices from external damages. This is an essential process in order to protect the

0040devices from surface damages and also secure the reliability of the devices as well as

0041improving the assembly yield. This process is also a final stage process which requires

0042an extreme caution.

0043According to a construction method of the conventional dielectric passivation layer,

0044a dielectric passivation layer such as SiO2 or Si3N4 is deposited using the PECVD or

0045Sputtering process after forming a transparent electrode and n-type & p-type basic

0046electrodes. In this case, generally plasma is used for the deposition instead of a simple

0047CVD method or thermal deposition method both of which has a weak adhesion strength

0048between the dielectric passivation layer and semiconductor surface. The plasma

0049deposition method can improve the adhesion among the dielectric passivation layer,

0050metal surface(transparent electrode) and semiconductor surface.

0051However, the deposition of a dielectric passivation layer under a plasma

0052environment might cause a damage on the performance of the devices since RF power

0053and DC bias, which is necessary for formation of plasma, are directly applied to the

0054surface of the semiconductor. Sometimes this damage on the performance of the devices might cause an eventual failure of the whole semiconductor process or a remarkable

0055drop of the performance of the device.

0056Also, since the dielectric passivation layer deposition process is the final process of

0057the device manufacturing, the total yield and performance of the devices can be

0058significantly affected by a small process variable. If an optical semiconductor device

0059were to be operated at a high output mode due to high voltage and high current, the light

0060emission efficiency of the device is lowered due to the theraial resistance

0061characteristic(very low thermal resistance) of the dielectric which reduces the amount of

0062themial emission generated by the InGaN active layer 13.

0063Especially, in case of the junction-side down method which bonds a metal frame(or

0064submount 19) with the upper face of the device for thermal emission as shown in FIG. 3,

0065an inconsistent device, where a dielectric passivation layer 16 blocks in between the

0066semiconductor device and metal frame 19, is constructed.

0067Also, the amount of leakage current on the p-n diode junction boundary is not

0068negligible and this significantly affects the reliability of the device. It is difficult to

0069sufficiently recognize the leakage current at the initial stage since it affects device yield

0070after an assembly and a long term reliability. Hence, it is required to fundamentally

0071block the leakage current between a p metal electrode and n-GaN layer.

0072DETAILED DESCRIPTION OF THE INVENTION The present invention is designed to overcome the above problems of prior art. The

0073object of the invention is to provide new structural semiconductor devices which

0074effectively blocks the leakage current between the surface & boundary of a device and a

0075pn-junction boundary, and enhances the light emission efficiency by removing the

0076conventional dielectric passivation layer accompanying several problems and using

0077InxGal-xN crystal layer instead. Namely, the GaN type optical semiconductor device

0078with a pn junction diode structure compraising a n-type electrodes, a transparent

0079electrode and p-type electrodes according to the present invention is constructed first by

0080sequentially forming a buffer layer on a substrate, a n-type GaN layer, a InGaN/GaN

0081active layer, a p-type GaN layer and a n-InxGal-xN crystal layer, afterwards fomiing a

0082n-InxGal-xN(0≤ x ≤l) crystal passivation layer with a specified thickness(t) and

0083width (w) only around the edge of the upper surface of the p-GaN layer.

0084The n-InxGal-xN(0≤ x ≤l) crystal passivation layer is grown with a thickness

0085around 0.1 nm ≤ t < 5,000 nm. The value of n-doping concentration is lxlO¹⁵ unit/cm

0086³ < n < lxlO²² unit/cm³ and the width is 0.1 μm < w < 300 μm.

0087The present invention constructed as explained so far is to provide a semiconductor

0088device and manufacturing methods thereof with gallium nitride(GaN) type crystal

0089passivation layer has a new structural semiconductor in order to be used as leakage

0090current block and device passivation layer, by using InxGal-xN crystal body is deposited at the initial crystal formation stage of the device instead of the conventional

0091dielectric passivation layer which is deposited at the final process of the device.

BRIEF DESCRIPTION OF THE DRAWINGS

0093FIG. 1 is a cross section diagram which shows a structure the conventional GaN type

0094optical semiconductor device.

0095FIG. 2 is a cross-section diagram which illustrates the principle of leakage current

0096occurrence for a GaN type optical semiconductor device.

0097FIG. 3 is a cross section diagram which shows a junction-side down type assembly

0098structure for a high output operation of the conventional GaN type optical

0099semiconductor device.

0100FIG. 4 is a cross section diagram which shows one embodiment of the construction of

0101optical semiconductor device with a n-InxGal-xN crystal passivation layer according to

0102the present invention.

0103FIG. 5a and 5b are cross-section diagrams of the main parts which illustrate the

0104principle of cutting off the leakage current and pinch-off phenomena for the optical

0105semiconductor device according to the present invention.

0106FIG. 6a to FIG. 6e are cross section diagrams which illustrate the manufacturing process

0107of the optical semiconductor device with a n-InxGal-xN crystal passivation layer according to the present invention.

0108FIG. 7 is a cross section diagram which shows the principle of the photo

0109electrochemical etching method adopted by the present invention.

0110FIG. 8 is a cross section diagram which shows other embodiment of the construction of

0111optical semiconductor device with a n-InxGal-xN crystal passivation layer according to

0112the present invention.

0113[Description of the numeric on the main parts of the drawings]

011410, 40 : Substrate

011511, 41 : Buffer Layer

011612, 42 : n-GaN Layer

011713. 43 : InGaN (or Gan) Active Layer

011814. 44 : p-GaN Layer

011915, 46 : Transparent Electrode

012016 : Dielectric Passivation Layer

012117, 47 : n Type Metal Electrode

012218, 48 : p Type Metal Electrode

012345-a : InxGal-xN Crystal Layer

012445: InxGal-xN Crystal Passivation Layer BEST MODE FOR CARRYING OUT THE INVENTION

0125In order to achieve the stated object, semiconductor device which forms the

0126gallium nitride type crystal passivation layer according to the present invention has GaN

0127type semiconductor device with a p-n junction diode structure comprises a InxGal-xN

0128crystal layer with a specified thickness and width as a pssivation layer on the top edge

0129region of a p-GaN layer which is at the upper most layer of the semiconductor device.

0130Hereinafter, preferred embodiments of the present invention will be described in

0131detail with reference to the accompanying drawings.

0132FIG. 4 shows one embodiment of the construction of optical semiconductor device

0133with a InxGal-xN crystal passivation layer according to the present invention.

0134As shown in FIG. 4, the GaN type optical semiconductor device with a pn junction

0135diode structure compraising a n-type electrodes 47, a transparent electrode 46 and

0136p-type electrodes 48 according to the present invention is constructed first by

0137sequentially forming a buffer layer 41 on a substrate 40, a n-type GaN layer 42, a

0138InGaN/GaN active layer 43, a p-type GaN layer 44 and a n-InxGal-xN crystal layer

013945-a, afterwards forming a n-InxGal-xN(0≤ x ≤ l) crystal passivation layer 45 with a

0140specified thickness(t) and width(w) only around the edge of the upper surface of the

0141p-GaN layer 44. The n-InxGal-xN(0≤ x ≤ 1) crystal passivation layer 45 is grown with a thickness

0142around 0.1 nm ≤ t < 5,000 nm. The value of n-doping concentration is lxlO¹⁵ unit/cm

0143³ < n < lxlO²² unit/cm³ nit/cm 3 and the width is 0.1 μm < w < 300 μm. .

0144The present invention constructed as explained so far is to provide a semiconductor

0145device and manufacturing methods thereof with gallium nitride(GaN) type crystal

0146passivation layer has a new structural semiconductor in order to be used as leakage

0147current block and device passivation layer, by using InxGal-xN crystal body 45-a is

0148deposited at the initial crystal formation stage of the device instead of the conventional

0149dielectric passivation layer 16 which is deposited at the final process of the device.

0150Hence, it is effective for cutting off the leakage current and is able to resolve many

0151problems that come with depositing a dielectric passivation layer at the final stage.

0152FIG. 5a and 5b illustrate the principle of cutting off the leakage current for the

0153optical semiconductor device according to the present invention.

0154As shown in FIG. 5a, if a voltage (+V) is applied to the P electrode 48, the device

0155center region (region (I)), where the n-InxGal-xN passivation layer 45 is not formed,

0156becomes p-n junction diode structure and operates normally, however, the edge of

0157device surface region (region (II)), where the n-InxGal-xN passivation layer is formed,

0158becomes n-p-n junction diode structure with n-InxGal-xN/p-GaN/n-InxGal-xN and no

0159current flows.

0160Also, as shown in FIG. 5b, if a voltage is applied to one part on the top n-InxGal-xN passivation layer, it takes a n-InxGal-xN/p-GaN/n-InGaN/n-GaN

0161structure and becomes a reverse directional junction to n-p-n junction. Also, a depletion

0162region forms on the junction of the p-GaN layer 44 due to the influence of a high

0163concentration n layer at the top and bottom and a pinch-off phenomenon occurs where

0164no hole current flows in the horizontal direction of the p-GaN layer 44 hence the

0165leakage current in the horizontal direction can be completely blocked.

0166Also, since the interface section between the p-GaN layer 44 and n-InxGal-xN

0167passivation layer 45 has a complete crystal structure such as a single crystal, the

0168leakage current can more completely be blocked in comparison to the conventional

0169dielectric passivation layer deposition.

0170Especially, in comparison to dielectric passivation layer 16, the n-InxGal-xN

0171passivation layer 45 has a much better heat transfer characteristic and is a good quality

0172crystal layer which is identical to the construction layer of the device, hence, the

0173n-InxGal-xN passivation layer type is a very effective structure for thermal emission for

0174the junction-side down type.

0175While, FIG. 6a to FIG. 6e are cross section diagrams which illustrate the

0176manufacturing process of the optical semiconductor device with a n-InxGal-xN crystal

0177passivation layer according to the present invention. As shown in FIG. 6a, the

0178manufacturing method of the optical semiconductor device with a n-InxGal-xN crystal

0179passivation layer according to the present invention comprises the steps of successively crystal growing of a buffer layer 41 on a substrate(sapphire, SiC, GaN, Si, etc) 40, a

0180n-type GaN layer 42, a InGaN/GaN active layer 43, a p-type GaN layer 44 and a

0181n-InxGal-xN crystal layer 45 according to the Metal Organic Chemical Vapor

0182Deposition(MOCVD) method.

0183As a carrier gas for growing the MOCVD crystal, high purity hydrogen gas(H2) or

0184nitrogen gas(N2) can be used. Especially, in case of growing n-InxGal-xN crystal, the

0185n-InxGal-xN crystal quality can be improved by growing in a N2 gas environment

0186which has a heavier mass value than H2.

0187Next, as shown in FIG. 6b, in order to form an n-type electrode 47, the upper right

0188end section of the device is etched down to the n-GaN layer 42.

0189Also, after the above process, a n-InxGal-xN passivation layer is fomied by

0190removing the whole n-InxGal-xN crystal layer 45-a by a etching process except the

0191specified region defined by the passivation layer of the device (around the edge of

0192device surface)(see FIG. 6c). In this way, the n-InxGal-xN passivation layer 45 forms

0193around the top edge of the p-type GaN layer 44 in the form of a square band.

0194At this instance, for the etching of the n-InxGal-xN crystal layer 45-a, RIE etching

0195method, chemical etching, or photo electrochemical etching method can be used.

0196Among the etching methods listed above, the chemical etching method is most

0197advantageous since it can minimize the damages on the device surface. Specifically, the

0198photo electro chemical etching method is capable of selectively etching the n-InxGal-xN crystal layer 45-a or p-GaN layer therefore the most suitable method for

0199the present invention.

0200While, FIG. 7 is a cross section diagram which illustrates the principle of the photo

0201electro chemical etching method adopted by the present invention.

0202As shown in FIG. 7, the standard photo electro chemical etching method generates

0203electrons and holes by exposing the subjected etching part to a light with a bigger

0204energy value than the band gap of the n-InxGal-xN crystal layer and reacts with a

0205electrolytic solution (KOH + H2O) in order to etch rapidly the hole generated part.

0206Also, according to the polarity of voltage applied to the electrolytic solution and

0207crystal layer, either n-type or p-type can selectively be etched.

0208Accordingly, by selecting the polarity of voltage and exposing the subjected etching

0209part to a light, only the n-In(x)Ga(l-x)N crystal layer 45-a can be selectively etched

0210against the p-GaN layer 44 and the etched semiconductor surface can remain in very

0211good state without any damage or stress.

0212Also, as shown in FIG. 6d, if necessary, the manufacturing process of the optical

0213semiconductor device according to the present invention is completed by depositing a

0214transparent electrode 46 or front face electrode on the upper section of the n-InxGal-xN

0215passivation layer 45 and p-GaN layer 44 and forming a n metal electrode 47 and p metal

0216electrode 48 as shown in FIG. 6e.

0217If necessary, the n-In(x)Ga(l-x)N crystal layer 45-a on the p-GaN layer 44 can form a passivation layer 45 as an insulator which does not conduct electricity by

0218intentionally dropping the doping process or undergoing a slight p-type doping.

0219FIG. 8 is a cross section diagram which shows other embodiment of the

0220construction of the optical semiconductor device with the n-InxGal-xN crystal

0221passivation layer according to the present invention.

0222As shown in FIG. 8, the optical semiconductor device can be constructed in the

0223form where p-type electrode is not applied to the n-InxGal-xN passivation layer 45 by

0224coating the transparent electrode 46 only on the p-GaN layer 44.

0225It should be understood, however, that the detailed description and specific

0226examples are given by way of illustration only, since various changes and modifications

0227within the spirit and scope of the invention will become apparent to those skilled in the

0228art from this detailed description.

INDUSTRIAL APPLICABILITY

0230According to the present invention constructed as explained so far, leakage current

0231can completely be blocked flows from the surface of the device to the boundary of

0232the device during crystal growing stage and due to n-p-n type junction structure the

0233pinch-off phenomenon is occurred on the cleavage boundary of the p-GaN layer by

0234forming a InxGal-xN on the top surface edge region of a p-GaN layer, hence the

0235reliability and the yield of the devices can be improved very greatly.

0236Also, InxGal-xN passivation layer of the present invention has very excellent

0237themial conductibility hence, to be operated at a high output mode light emission

0238efficiency and reliability of the device can be improved.

0239Also, due to n-InxGal-xN passivation layer of the present invention is formed at the

0240initial crystal formation stage of the device, the conventional dielectric deposition

0241process which is performed at the final process of the device is omitted hence, the

0242simplification of the process and the yield of the devices can be improved very greatly.