Radio receiver for receiving digital radio signals and method for receiving digital radio signals

State of the art

0001The invention relates to a radio receiver for the reception of digital broadcast signals or of a method for receiving digital broadcast signals according to the preamble of the independent claims.

0002In digital broadcasting systems such as DAB (Digital Audio Broadcasting) or DRM (Digital Radio Mondial), an audio source is sampled in the transmitter at a sampling rate, usually 48 kHz or 24 kHz. It uses pulse code modulation. Thereafter, a source coding for data reduction and a channel coding for the error protection is performed in the transmitter. The resulting digital broadcasting signals are then sent by means of an antenna to the receivers. The receivers must reproduce the audio at the clock that the transmitters are working with, otherwise audible errors may occur because there are either too few or too many samples when working with different clocks in the transmitters and the receivers. It can come to cracking noises. In order to produce this clock control, a voltage-controlled oscillator is used in conventional receivers, ie an oscillator, which is tuned in frequency by an applied voltage.

0003The older European patent application <patcit id="pcit0001" dnum="EP1096716A2"><text>EP 1096716 A2</text></patcit> describes a sampling rate conversion in case of overflowing or underflowing of a buffer by means of an interpolation or decimation device. The older European patent application<patcit id="pcit0002" dnum="EP1096715A2"><text>EP 1096715 A2</text></patcit> also discloses such sample rate conversion in a broadcast receiver. The European patent application<patcit id="pcit0003" dnum="EP401562A2"><text>EP 401562 A2</text></patcit> describes an arrangement for converting a signal at a first sampling rate into a signal at a second sampling rate. In this case, a digital filter is used for this implementation, the coefficient of which is formed as a function of the ratio of the sampling rates.

Advantages of the invention

0004The radio receiver according to the invention for the reception of digital broadcasting signals or the inventive method for receiving digital broadcasting signals with the features of the independent claims has the advantage of converting the audio signals from the transmitter to the Empfängerabtastrate by means of a digital sampling rate conversion in the receiver. This avoids the presence of too many or too few samples.

0005For this purpose, a fixed-frequency oscillator is advantageously used, which is designed cheap and simple and can be used simultaneously for the frequency generation for the analog front end, the high-frequency receiving part. A fixed frequency oscillator does not require a complex calibration like a voltage controlled oscillator.

0006It is advantageous that the buffered digital audio signals are subjected to setpoint control to make a sample rate adjustment.

0007The digital asynchronous sampling rate converter is designed such that it has an input buffer, a controller, a coefficient memory and an accumulator as well as an interpolator, so that the radio receiver according to the invention is produced by simple and thus fast hardware circuits.

0008The measures and refinements recited in the dependent claims, advantageous improvements of the specified in the independent patent claims radio receiver or method are possible.

drawing

0009Embodiments of the invention are illustrated in the drawings and are explained in more detail in the following description. It shows<figref idref="f0001">FIG. 1</figref> a block diagram of the radio receiver according to the invention, <figref idref="f0001">FIG. 2</figref> a further block diagram of the radio receiver according to the invention and <figref idref="f0002">FIG. 3</figref> a flow chart of the inventive method for receiving digital broadcast signals.

description

0010In digital broadcasting systems, the synchronization of the digital audio signals of the receiver to the transmitter is necessary to ensure error-free reproduction of the audio signals. This is particularly the case with wireless digital data transmission, as used for the broadcasting systems DAB (Digital Audio Broadcasting) and DRM (Digital Radio Mondial). In the method according to the invention, the synchronization is purely digital and the audio signals are also converted digitally from the transmitter to the receiver sampling rate.

0011DAB and DRM are digital broadcasting methods that each use the orthogonal frequency division multiplex for transmission. The data is transmitted in frames, whereby other data such as multimedia data can be transmitted in addition to digital audio data. For the audio data, both source encoding for data reduction and channel coding for error protection are performed.

0012Due to aging and temperature influences, the oscillator in a radio receiver will fluctuate in frequency or even drift. If received audio signals are sampled at a wrong sampling rate, either too much audio data or too little audio data will result. Both situations can lead to audible errors.

0013According to the invention, therefore, a fixed-frequency oscillator is used in the radio receiver according to the invention, in order then to carry out a clock control in the received digital broadcast signals or a clock adaptation by means of a digital asynchronous sampling rate converter. The clock adjustment can also be made for digital audio signals that are reproduced by means of a sound carrier. This clock control is performed after the audio decoding of the digital audio signals.

0014In <figref idref="f0001">FIG. 1</figref> the radio receiver according to the invention for receiving digital broadcast signals is shown as a block diagram. Here, the clock control by means of the TFPR symbol (the phase reference symbol) is made, since a DAB radio receiver is shown here.

0015An antenna 1 for receiving the digital broadcast signals is connected to a first input of a high frequency receiving part 2 (analog front end). To a second input of the high frequency receiving part 2, a fixed frequency oscillator 12 is connected. To an output of the high frequency receiving part 2, a demodulator 3 is connected.

0016A first data output of the demodulator 3 leads to a first data input of a switch 4. A second data output of the demodulator 3 leads to a data input of a processor 11. At a second data input of the switch 4, a player for sound carrier 5 is connected. To a control input of the switch 4, a first data output of the processor 11 is connected. A second data output of the processor 11 leads to a first data input of a controller 7.

0017A buffer 6, the controller 7, a coefficient memory 8, an accumulator 9 and an interpolator 10 together form the asynchronous digital sample rate converter 13. A data output of the switch 4 leads to the buffer 6. The buffer 6 is connected via a data input / output a first data input / output of the controller 7 connected. The controller 7 is connected to the coefficient memory 8 via a second data input / output. A second data input of the controller 7 carries a signal from the second data output of the fixed frequency oscillator 12. A third data input / output of the controller 7 leads to a data input of the accumulator 9. A data output of the controller 7 is connected to a data input of the interpolator 10. At the data output of the interpolator 10, the output signals 14 of the asynchronous digital sampling rate converter 13 are present.

0018The digital broadcast signals received by the antenna 1 are amplified by the high-frequency receiving part 2, filtered and converted into a lower intermediate frequency. In addition, then the converted broadcast signals are digitized in the high frequency receiving part 2. This can alternatively be done in the demodulator 3 as the digital part.

0019The demodulator 3 demodulates the digital broadcast signals and performs error correction based on the channel coding. In addition, the demodulator 3 performs the source decoding d . Via its second data output, the demodulator 3 transmits the demodulated audio signals to the switch 4. The switch 4 switches either audio signals obtained from received broadcast signals or audio signals originating from a sound carrier and thus generated by the player 5 to the digital asynchronous sample rate converter 13. The circuit of the switch 4 via the control input by the processor 11th The processor 11 is connected to an input device via which a user indicates whether he wants to hear digital broadcasting or audio carrier signals.

0020The third data output of the demodulator 3 leads to the processor 11. Thus, the TFPR symbol is transmitted from the DAB frame to the processor 11 at DAB, so that the processor 11 can calculate the clock deviation from the TFPR symbol. This is done in such a way that the time deviation between two zero symbols in the transmitter and two zero symbols in the receiver can be determined by means of the TFPR symbol. The distance is determined in the receiver by means of a counter which is coupled to the fixed frequency oscillator 12. With the help of this time deviation then the frequency deviation of the fixed frequency oscillator 12 can be calculated, because the time interval between two zero symbols is predetermined, a deviation between the measured time interval and the predetermined distance can only be caused by the receiver and thus by the fixed frequency oscillator 12. Other digital broadcasting techniques use equivalent symbols to determine clock skew. Alternatively, the buffer level of the buffer 6 can be used for regulation. This will be in<figref idref="f0002">Fig. 3</figref> shown.

0021The switched from the switch 4 audio data stream to the input buffer 6 of the asynchronous digital sampling rate converter 13 is initially stored in the input buffer 6. The controller 7 selects from the coefficient memory 8 a set of coefficients and, in addition, audio data from the buffer 6. This will then calculate the output values. The length of the coefficient set determines the number of audio data taken from the buffer 6.

0022By means of the accumulator 9, a coefficient set and an interpolation factor for the linear interpolation is determined. This interpolation is then performed by means of the interpolator 10. The accumulator 9 is incremented in the calculation of an output value by a value resulting from the control. This is called a digital oscillator or English numerically controlled oscillator. This value is then passed from the controller 7 to the interpolator 10. In the implementation of the frequency F_in to F_out the following value S results for the accumulator offset on average, where N indicates the accumulator width. <maths id="math0001"><math display="block"><mi>S</mi><mo>=</mo><msup><mn>2</mn><mi>N</mi></msup><mo>⋅</mo><mfenced><mfrac><msub><mi mathvariant="italic">F</mi><mi mathvariant="italic">in</mi></msub><msub><mi mathvariant="italic">F</mi><mi mathvariant="italic">out</mi></msub></mfrac></mfenced></math><img file="EP1287634B1_D0001.tif" /></maths>

0023The interpolation is divided into two steps. Overall, between two input values ​​2^N Calculate supporting points. 2¹ Support points can be calculated directly with the aid of the polyphases, ie the filter coefficients. If the interpolation point to be calculated lies between two polyphases, a linear interpolation is performed. The interpolation factor then has the word width 2^N-1.

0024The filter coefficients that are loaded from the coefficient memory 8 can be optimized in consideration of the linear interpolation so that an optimum signal-to-noise ratio is achieved with minimum filter length of the asynchronous digital sample rate converter. The coefficients are optimized to minimize the mean square error between the interpolated continuous signal and the ideal output over a given frequency range. This optimization is performed before the operation of the radio receiver according to the invention. Higher order interpolations can be used to reduce the number of filter coefficients, achieving the same accuracy. This means a higher computational effort.

0025The interpolator 10 calculates two filter values ​​for each output value, the output value then being calculated by a linear interpolation of the polyphase results. The output values ​​14 are then converted into analog audio signals either by means of a digital / analogue converter, to be amplified by means of an audio amplifier and finally reproduced acoustically by means of a loudspeaker or a loudspeaker system. Alternatively, it is possible for the digital output signals of the asynchronous digital sample rate converter 13 to be transferred to a multimedia bus for transmission to an acoustic reproduction unit or to a computer or memory. It is then necessary that the digital asynchronous sampling rate converter 13 converts the audio signals to the clock of the multimedia output. This value is then given to the controller 7, for example by the processor 11. By means of the fixed frequency oscillator 12, the necessary frequency for the conversion is derived. This is achieved by dividing the frequency.

0026The fixed frequency oscillator 12 provides the frequency for both the high frequency receiving part 2 and the sampling rate converter 13.

0027In <figref idref="f0001">Fig. 2</figref> is a second block diagram of the radio receiver according to the invention for digital broadcasting signals shown. Here, the adaptation to the clock of the receiver is performed by the control of the input buffer 6.

0028The antenna 1 is connected to the first input of the high frequency receiving part 2. To the second input of the high frequency receiving part 2 of the fixed frequency oscillator 12 is connected. At the output of the high frequency receiving part 2 of the demodulator 3 is connected. The data output of the demodulator 3 leads to the first data input of the switch 4. At the second input of the switch 4, the player for sound carrier 5 is connected. At the control input of the switch 4, the first data output of the processor 11 is connected. The data output of the switch 4 leads to the input buffer 6. The input buffer 6, the controller 7, the coefficient memory 8, the accumulator 9 and the interpolator 10 are the components of the digital asynchronous sampling rate converter 13.

0029A data input of the processor 11 is connected to a data output of the input buffer 6 to determine the buffer level. The second data output of the processor 11 leads to the first data input of the controller 7. The input buffer 6 is connected to the first data input / output of the controller 7. The fixed frequency oscillator 12 is connected to the first data input of the controller 7. The coefficient memory 8 is connected to the second data input / output of the controller 7. The accumulator 9 is connected to the third data input / output of the controller 7. At the data output of the controller 7, the interpolator 10 is connected. The output data of the interpolator 10 lead to the output 14 of the sample rate converter 13, to which, as shown above, either a multimedia bus or a digital-to-analog converter is connected.

0030The functioning of the components of the radio receiver is, as is for <figref idref="f0001">Fig. 1</figref> has been described, except for the regulation of the sampling rate.

0031The control of the input buffer 6 and thus the sampling rate takes place by the input buffer level, the actual value, is used as a control variable from the processor 11. This is controlled to a desired value by 7 data are taken from the input buffer 6 from the controller. With the aid of a digital controller of the first order, a new value for the accumulator 9 can be calculated at suitable time intervals. This control is performed when the frequency deviation is not calculated using the TFPR symbol or any other synchronization symbol.

0032The control coefficients can be set to achieve the asymptotic limit case to achieve optimal control with minimal compensation. The control can be implemented both in hardware and in software. Here, the control is implemented in software running on the processor 11. Alternatively, it is possible to execute the control algorithm in hardware.

0033In <figref idref="f0002">FIG. 3</figref> is shown as a flow chart, the inventive method for receiving digital broadcast signals. In method step 15, the digital broadcast signals are received. In method step 16, the received broadcast signals are amplified, filtered, converted to an intermediate frequency and digitized. In method step 17, the broadcast signals are then demodulated, subjected to channel decoding and source decoding. In method step 18, the clock deviation between the received broadcast signals and the frequency of the fixed frequency oscillator is determined. In method step 19, this clock deviation is corrected by means of the asynchronous digital sample rate converter 13. In method step 20, the output values ​​of the digital asynchronous sample rate converter 13 are output. In step 21, finally, the decoded audio signals are converted into analog audio signals, amplified and reproduced acoustically. Alternatively, it is possible here to convert the converted audio data to a multimedia bus, for example the MOST bus.

0034Alternatively, it is possible that instead of received broadcast signals and signals from digital audio media can be used. The clock deviation can be determined by a setpoint adjustment or in DAB by the evaluation of the TFPR symbol or by a predetermined clock value.