Semiconductor circuit arrangement having a bus system and an adjustment system for adapting signal time constants

The invention relates to a circuit arrangement according to the preamble of claim 1.

In many circuit arrangements, in particular in microelectronics and semiconductor technology, it is necessary that a plurality of electronic components, which via a conduit device, such as a bus system, are connected to a plurality of lines, receives certain signals, which, for example come from a sending institution. In particular, especially in a clocked system, it is further required that the arrival or receipt of the signals in the electronic components deviate as slightly as possible from a prescribed chronological order, so that a predetermined temporal structure of further processing steps within the circuit arrangement is maintained in a defined manner can be.

In particular, in memory systems, a structure is preferred in which the electronic components or memory components along a transmitting line device, namely a bus system, are arranged. In order for the signals to be transmitted over the transmission line device to remain in a well-defined timing or synchronization as they are transmitted along the transmission line device, the signal propagation times or signal delays must be tuned and adjusted with a certain accuracy.

This can be achieved, on the one hand, by designing and constructing the transmission line devices themselves, in particular with regard to their capacitive and inductive properties.

On the other hand, the electronic components connected to the line device, ie in particular the memory components, also have electrical properties, eg a capacitance and an inductance, which can influence the signal propagation times for each individual line component of the line device.

In order thus to ensure a predefined synchronicity of the signals running on the various line components of the line device with regard to the various electronic components connected to the line device, has been proposed in the prior art, form additional optional adjustment device with trim capacitors or capacitors, which are formed in the area of ​​the electronic components themselves and / or in the area of ​​connecting devices of the electronic components with the conduit device, that due to the additional overall capacities of the adjusting devices, the signal propagation times of the signal on the lines can be influenced.

In the known circuit arrangements such as semiconductor modules, chips, memory chips and the like is problematic that the provided optional additional capacity of the alignment and their conductive connections in the production of a usually layered electronic component or a circuit arrangement must be created and formed very early in the production process and then can not be varied anymore.

Even if, due to theoretical calculations or measurements on prototypes or earlier production lines, the optional capacities to be provided have been selected that they correspond to certain transit time requirements of the signals or signal components on the line devices, Thus, the once designed and designed additional total capacitances of the adjusting devices are defined for a single specific type of electronic components or circuit arrangements. As a result, changed runtime requirements for the signals, which may arise due to changes or fluctuations of the production process, due to aging phenomena, due to interactions of the electronic components or the circuit arrangements with other intended electronic components or circuit arrangements, do not occur without considerable effort in the production process Account can be taken. It is also not possible to react flexibly enough to spontaneously arising customer requirements with regard to the signal propagation times, because to this end the additional capacities of the adjusting devices provided on the electronic components or the circuit arrangement would basically have to be newly designed. This would require a conversion of the production process and thus a component variation.

However, all measures would have additional costs due to time aspects, the use of materials and possibly increased production outside the desired specification in the prior art.

The invention is the <b>task</b> to provide a circuit arrangement in which signal propagation times on the lines in a particularly reliable and nevertheless flexible manner can be influenced.

The object is achieved by a generic circuit arrangement with the characterizing features of claim 1. Advantageous developments of the circuit arrangement according to the invention are the subject of the dependent subclaims.

In the generic circuit arrangement, at least one line device is provided, which has a plurality of lines or individual lines for transmitting a signal. Furthermore, the generic circuit arrangement has a plurality of electronic components, which are connectable via respective connecting means with the conduit means and formed to receive the signal. Furthermore, a plurality of adjusting devices is provided, which are formed in the region of the electronic components and / or the connecting devices in contact with the connecting devices such that the signal propagation times on the lines can be influenced on account of additional overall capacitances of the adjusting devices.

The solution of the problem according to the invention consists precisely in that the adjusting devices are designed so that the values ​​of the additional total capacities of the adjusting devices can be variably varied in each case.

In contrast to the prior art, in which the capacitors of the adjusting devices are fixed and fixed on the electronic components or on the circuit arrangement with the electronic components during production of the circuit arrangement, According to the basic idea of ​​the invention, the solution according to the invention provides for a controllable variability of the additional overall capacities of the adjusting devices, which achieves that also the influence of the total capacities on the signal propagation times of the signal on the individual lines or line devices in variable, So flexible way can be done. As a result, in contrast to the prior art with the circuit arrangement according to the invention, it is possible to meet changing signal propagation time requirements and to comply with them.

The influence on the signal propagation times is particularly flexible if, according to a preferred embodiment of the inventive circuit, the adjusting devices each have a plurality of individual capacitors or a single but controllably variable individual capacitance, in which case the individual capacitance or the individual capacitors cooperate in each case essentially the additional total capacitance form the respective adjusting device.

When providing a plurality of individual capacities results, for example, from the ability to interconnect these individual capacities in different ways, a high degree of flexibility, for example, when connected in parallel, with the individual capacities of the respective adjustment just add up to the total capacity of this adjustment. With the provision of a single single variable controllable capacity, flexibility follows from the controllable variation of the individual capacity as such.

In this approach, the individual capacities of a given adjustment device eg to each other and / or connected to a respective connecting device in parallel and connected to a fixed potential, in particular connected to ground switchable. This results in particularly stable defined conditions, because due to the known Kirchhoff laws, the parallel connection of individual capacities allows a particularly simple and clear combination of individual capacities to total capacity, with a fixed reference point with respect to the electrical potential, in particular to ground, in principle is preferable.

When paralleling of capacitances add namely the individual capacities of the given adjusting device in the sum to the total capacity of the adjusting device. By the respective switchability of the individual capacities can therefore be resorted to a certain number of combinations of individual capacities, depending on which of the individual capacities set exactly in a switched or non-switched status relative to the respective connecting device and thus effectively or is ineffective.

It is of particular advantage that the individual capacities of a given adjusting device are each independently selectable on and / or switched off.

To realize the selectable switching on and / or off of the respective individual capacity of a given adjusting device, a switching control device is formed in each case in a preferred embodiment of the circuit arrangement according to the invention. By means of this switching control device, in each case the controllable switching on and / or off of the individual capacitances and thus also any combination of these individual capacitances for overlaying to the total capacity of the respective adjusting device become possible.

For setting the switching status by the switching control device, the switching control device may advantageously be designed to receive a corresponding control signal. Also, for several or all individual capacities of one or more adjusting devices, a common switching input device may be provided, in which case a more complex, eg correspondingly coded, control signal may also be used.

It is particularly advantageous, however, if the switching control device in each case directly accesses the individual capacity of a given adjusting device to be controlled or switched. For this purpose, it is provided according to a further embodiment of the circuit arrangement according to the invention that the switching control device is formed in each case in a line to a respective connection means out with the respective individual capacity of a given adjusting device in series switchable.

For switching on and / or off of the respective individual capacitance, basically any switching device can be used with which the respective individual capacitance can be switched to a respective connecting device in a contacted / switched or in a non-contacted / non-switched state.

It is also provided that the switching control device is in each case designed as a safety device, in particular as a so-called laser fuse or electrical fuse. In this case, the contact status of the respective individual capacity of a given Justiereinrichtüng to a connection device is changed from a contacted to an interrupted status or vice versa by a light signal or an electrical signal from the outside.

These mentioned safety devices can also be addressed in an intermediate step of the production of the electronic components or the circuit arrangement in order to adapt the corresponding n individual capacitances of the adjusting devices for a corresponding influencing of the signal propagation times already in an intermediate stage of the circuit arrangement.

The adaptation of the signal propagation times is particularly flexible when, according to a further preferred embodiment of the circuit arrangement according to the invention, a memory element, in particular a 1-bit memory element, is provided for each individual capacitance and if a switching signal for setting by the switching control device due to the content of the respective memory element a switching state and / or the size of the respective individual capacity can be generated. This ensures that even without additional measures, eg a laser for activating or deactivating a laser fuse, the switching state or the size of each individual capacity can be changed in a reproducible manner due to the memory contents.

The memory elements may be formed as part of the switching control devices or separately thereof, wherein in the latter case, the memory contents just as control signals for the switching control devices can be construed. Also, for several or all individual capacities of one, several or all adjusting devices, a shared memory device may be provided, through the memory contents of which the configuration of the switched and unconnected individual capacities and / or their value can be represented.

It is particularly advantageous if an access device is provided by which the switching state and / or the size of the respective individual capacity, in particular externally, directly and / or indirectly via an influence of memory contents is substantially freely adjustable.

It can thus be determined by means of the respective memory elements with or without the access device and optionally via an external programming, which are connected to the respective individual capacities and which not to achieve a necessary combination of the respective individual capacities to the total capacity.

If appropriate, the memory contents of the respective memory elements can then be changed via the external access in such a way that corresponding control signals for setting a different, namely adapted or improved, switching state are generated in order to produce better tuned total capacitances and thus improved or desired signal propagation times on the line device of the circuit arrangement ,

In this way it is achieved that the total capacities of the individual adjusting devices, in particular externally, are freely programmable. Consequently, it is not only possible to improve the propagation time ratios on the line device of the circuit arrangement, but also consciously carry out tests with particularly deviating transit times in order to increase the stability of the circuit arrangement and its behavior and / or the interaction of such a circuit arrangement within a higher-level device to study.

In order to allow the most flexible possible variation of the total capacitances of the adjusting devices, it is provided according to a further advantageous development of the circuit arrangement according to the invention that the values ​​of the individual capacitances of the adjusting devices respectively correspond to the relationship<maths id="math0001" num=""><math display="block"><mrow><msub><mrow><mtext>C</mtext></mrow><mrow><mtext>j</mtext></mrow></msub><msub><mrow><mtext> = C</mtext></mrow><mrow><mtext>0</mtext></mrow></msub><msup><mrow><mtext> · 2</mtext></mrow><mrow><mtext>j-1</mtext></mrow></msup></mrow></math><img file="EP1124331A2_D0001.tif" /></maths> suffice, where j runs from 1 to the respective number N of individual capacities, in particular to 4, and where C₀ a minimum basic capacity, in particular about 10 fF means. This corresponds to a binary coding of the values ​​of the individual capacities, but also any other form of coding or assignment of the values ​​of the individual capacities can be selected.

With parallel connection of these binary coded individual capacities C_j it follows that the total capacity is the sum of the individual capacities from 0 to C₀ (2^N - 1) is running. With four individual capacities, ie N = 4, and a basic capacity C₀ = 10 fF, a sweep of the range from 0 to 150 fF with a resolution of 10 fF would thus have been achieved. C₀ thus indicates the accuracy with which a total capacity can be tuned.

Conventionally, in the case of memory modules and other circuit arrangements of microelectronics and semiconductor technology, it is necessary to correct capacitances of electronic components or circuit arrangements in the order of magnitude of 200 fF with an accuracy better than 50 fF. The binary coding discussed above meets these requirements.

The actual embodiments of the individual capacitances of the adjusting devices can be borrowed from all electronic components and structures, in particular microelectronics and semiconductor technology, which preferably realize a capacitance in a simple manner. It is possible that the individual capacitances of the adjusting devices can each be derived as a junction or diffusion layer capacitance of a diode, an n-channel field-effect transistor, a general np junction or the like. Further, the single capacitance may each be derivable as a capacitance of a metal film capacitor or the like.

In summary, a core idea of ​​the invention described above is therefore to provide on circuit arrangements adjusting devices with controllable variable individual capacitances by which the input capacitances of electronic components or parts of the circuit, in particular optionally after a wafer production, can be changed such that signal propagation times in the circuit to a particularly simple and flexible manner can be influenced.

Application can find the inventive concept of a circuit arrangement with controllable variable individual capacities, especially in RDRAM or SDRAM devices or the like.

The invention will be further explained with reference to a schematic drawing on the basis of preferred embodiments of the circuit arrangement according to the invention. In this shows<dl id="dl0001"><dt>Fig. 1</dt><dd>a schematic block diagram of a first embodiment of the circuit arrangement according to the invention,</dd><dt>Fig. 2</dt><dd>Details of a second embodiment of the circuit arrangement according to the invention in the form of a schematic block diagram,</dd><dt>Fig. 3</dt><dd>a schematic block diagram of a third embodiment of the circuit arrangement according to the invention, and</dd><dt>Fig. 4A-C</dt><dd>schematically embodiments for individual capacities for use in an embodiment of the circuit arrangement according to the invention.</dd></dl>

The schematic block diagram of FIG. 1 shows a first embodiment of the circuit arrangement 1 according to the invention.

In this circuit arrangement 1, a plurality of electronic components 8₁, ...., 8th_n via connecting devices 10_1.1, ..., 10_{n, 1} connected to a bus device or line device 2, which has a plurality of lines 4₁ and 4₂ having. The multiplicity of the lines may be higher depending on the width of the bus and is not on two lines. 4₁ and 4₂ limited. The single lines 4₁ and 4₂ be in the embodiment shown in Fig. 1 from the outside with a signal S with signal components S₁ and S₂ applied.

By interaction of the individual lines or lines 4₁ and 4₂ with the conduit devices 10_1.1, ...., 10_{n, 1} and in particular with the respective total capacities of the electronic components 8₁, ...., 8th_n have the maturities t₁ and t₂ the signal components S₁ and S₂ Under certain circumstances, deviations that are outside the specification of the circuit arrangement and in particular of the bus or the line device.

These deviations can be due to age or based on variations within the production process.

For influencing and adapting the signal propagation times t₁ and t₂ are in the embodiment shown in Fig. 1 of the circuit arrangement 1 according to the invention within the electronic components. 8₁, ...., 8th_n Adjustment devices 12_1.1, ...., 12_{n, 2} via corresponding line devices 16_1.1, ...., 16_{n, 2} with the connecting devices 10_1.1, ...., 10_{n, 1} connected. These adjusting devices 16_1.1, ...., 16_{n, 2} according to the invention, controllably variable total capacities 14_1.1, ...., 14_{n, 2} up and connected to ground. FIG. 2 shows by means of a schematic block diagram in detail how an electronic component 8₁ with regard to the adjusting device 12_1.1 constructed and by means of a connecting device 10th_1.1 with a line 4₁ a line device 2 is connected within one embodiment of the circuit arrangement according to the invention. It can be corresponding further connection means depending on the number of necessary external connections of the electronic component. 8₁ be provided.

To a node 25_1.1, which may be formed, for example, as a PAD of an integrated circuit, a semiconductor module or the like, is via a line device 16_1.1 the adjusting device 12_1.1 contacted. This has a parallel connection of four individual capacities C₁, ...., C₄ against mass. In a respective line 21 to 24 are to the individual capacities C₁, ...., C₄ corresponding switching control devices 18₁, ...., 18₄ connected in series to corresponding control signals CTRL out the respective individual capacity C₁, ...., C₄ set as switched or not switched. From the parallel connection of the switched individual capacities, the total capacity 14 results in addition as sum_1.1 the adjusting device 12th_1.1,

In the schematic block diagram of FIG. 3, a further embodiment of the circuit arrangement 1 according to the invention is shown, wherein at a node 25 or PAD a plurality of lines 21 to 24 is contacted, in each case individual capacitances C₁, ...., C₄ in parallel with a connection device 10 to the bus line 4 via a common switching control device 18 and control signals CTRL₁, ..., CTRL₄ to switch to ground. The capacities C₁, ...., C₄ can both in terms of their absolute switching state - contacted or not contacted - and in terms of the value of their capacity on the control signals CTRL₁, ..., CTRL₄ be controllable. The control signals CTRL₁, ..., CTRL₄ are supplied via control lines 31, ..., 34. In the schematic diagrams of FIGS. 4A to 4C, various embodiments are shown with regard to their value of controllable capacitances.

In the embodiment of FIG. 4A, a diffusion layer or junction capacitance C of an n-type diffusion layer 41 in an n-well 42 is realized with respect to a p-type substrate 43, the n-type diffusion layer in the semiconductor substrate being connected via a line device 16 via a node 25 or PAD 25 is connected to a semiconductor module.

The illustration of FIG. 4B shows how the gate capacitance of an n-channel field-effect transistor 44 (nFET) can be used as an individual capacitance C, the value of this capacitance being determined by the voltage U_GS between substrate S and gate G - which may also be related to ground - as control signal CTRL is controllable and wherein source S, drain D and substrate A of the nFET 44 are at the same potential. The control voltage U_GS is generated by the control switching device 18.

FIG. 4C shows how a diode 45 may be used to exploit its diffusion layer or junction capacitance as an individual capacitance C. By means of an interposed field effect transistor 46, this individual capacitance C of the diode 45 is switched by means of the gate voltage UG impressed via the switching control device 18 as a control signal CTRL to the PAD 25 and to the connection device 10.