Thin film device with a trimmable capacitor
Abstract
The invention describes a device equipped with a thin-film circuit, the having an integrated, trimmable capacitor. At least one electrically conductive Layer (2, 4) of the capacitor has a structured surface with slots on. By This finger-shaped design is the actual capacitor of several parallel connected Capacitors. After determining the total capacitance value by selectively Separating fingers from the main surface of the electrically conductive layer (2, 4), and thus of capacitors, which are total capacitance value precisely matched.

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Projected expiry passed 18 December 2020, 5.8 years ago.
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5 claims: 2 independent, 3 dependent
- 1Bauteil ausgerüstet mit einem Dünnschichtschaltkreis auf einem Substrat (1) aus einem isolierenden Material, der mindestens ein passives Bauelement aufweist, welches wenigstens eine erste (2) und eine zweite (4) elektrisch leitende Schicht und ein Dielektrikum (3) umfasst und bei dem wenigstens eine elektrisch leitende Schicht (2, 4) eine strukturierte Fläche mit Schlitzen aufweist, einer Schutzschicht (5), sowie mindestens einem Kontaktloch (6), welches das Bauteil durchdringt und einer strukturierten Metallisierung, welche das Bauteil und das Kontaktloch (6) bedeckt.
- 2Bauteil ausgerüstet mit einem Dünnschichtschaltkreis nach Anspruch 1, dadurch gekennzeichnet, dass die Schlitze eine unterschiedliche Breite aufweisen.
- 3Bauteil ausgerüstet mit einem Dünnschichtschaltkreis nach Anspruch 1, dadurch gekennzeichnet, dass die Schlitze unterschiedliche Abstände aufweisen.
- 4Bauteil ausgerüstet mit Dünnschichtschaltkreis nach Anspruch 1, dadurch gekennzeichnet, dass die erste elektrisch leitende Schicht (2) und die zweite elektrisch leitende Schicht (4) Cu, Al, Al dotiert mit Cu, A1 dotiert mit Mg, Al dotiert mit Si oder Al dotiert mit Si und Cu enthalten.
- 5Verfahren zum Feinabstimmen des Kapazitätswertes eines passiven Bauelement, welches wenigstens eine erste (2) und eine zweite (4) elektrisch leitende Schicht sowie ein Dielektrikum (3) umfasst und bei dem wenigstens eine elektrisch leitende Schicht (2, 4) eine strukturierte Fläche mit Schlitzen aufweist, in einem Bauteil ausgerüstet mit einem Dünnschichtschaltkreis auf einem Substrat (1) aus einem isolierenden Material, mit einer Schutzschicht (5), sowie mindestens einem Kontaktloch (6), welches das Bauteil durchdringt und einer strukturierten Metallisierung, welche das Bauteil und das Kontaktloch (6) bedeckt, bei dem mittels fokussierter Laseremission örtlich auf wenigstens eine elektrisch leitende Schicht (2, 4) ein Erhitzungseffekt erreicht wird und Teile der elektrisch leitenden Schicht (2, 4) verdampft werden.
Independent claims5
28 paragraphs, as filed
0001The invention relates to a component equipped with a thin-film circuit on a Substrate of an insulating material having at least a passive component and a method for fine tuning the capacitance value of the passive component.
0002The development of many electronic devices is characterized by the following trends: Miniaturization, higher reliability, lower or at least constant prices with functionality increases. The number of passive components making experience, in many consumer electronic devices, for example in television sets or video recorders, 70% of the existing components made. The rapid developments in the mobile environment, the continuous miniaturization of cordless telephone sets and the use of higher frequencies result in increased demands on individual components. The progressive miniaturization results in particular, that fluctuations in the raw materials and the manufacturing process of the passive, electronic components a relatively large influence on the electric final specification have.
0003This is especially true for the capacitance value in the case of a monolayer capacitor from the product of the effective electrode area and the dielectric constant dividing computed by the thickness of the dielectric layer.
0004One way to keep manufacturing costs to a minimum, is the preparation of discrete passive electronic components, such as capacitors, resistors and inductors, with high specification width, which by corrective finishing (Fine-tuning) can be set to the desired final specifications, represent.
0005As part of the continual miniaturization but also the production, handling and Assembly of discrete passive components and more difficult. This may bypass be by integrated passive components (IPCs) are used. At this Art are passive components such as resistors (R), capacitors (C) or inductors (L) combined to produce integrated basic circuits and systems. By using thin film techniques are obtained on using masks Support plates of an insulating material, so-called thin-film circuits, the a greatly reduced printed circuit match. The preparation of Thin film circuits is well known and is generally carried out by various successive coating and structuring processes.
0006For the separation of the different layers are vapor deposition and sputtering used. In these methods, variations in the thickness of the can Layers with the small lateral dimensions of the passive components a large Have influence. So in addition to the effective electrode area also determines the thickness of the dielectric layer capacitance value of a capacitor. Better process control caused in the manufacture of passive electronic components higher Process costs.
0007The invention has the object of providing a device with thin-film circuit with at least provide a capacitor whose capacitance value can be matched can.
0008This object is achieved by a component equipped with a thin-film circuit on a substrate of an insulating material, the at least one passive component comprising comprising at least a first and a second electrically conductive layer and includes a dielectric and wherein at least one electrically conductive layer is a having structured surface with slots, a protective layer, and at least one contact hole which passes through the module and a structured metallization which covers the module and the contact hole.
0009Through the slits in the structured surface of the first or second electrically conductive Layer or in two layers of electrically conductive to set the passive component of several capacitors connected in parallel together. Accordingly, sets of Capacitance value of the passive component of the sum of the capacitance values of the parallel Capacitors together. By removing one or more of small, parallel Capacitors, the total capacitance value be fine-tuned.
0010It is particularly preferred that the slots have a different width.
0011It is further preferred that the slots have different spacings from one another.
0012The accuracy with which the capacitance value can be set depends on the design the electrically conductive layer. Through the slots receives the electrically conductive layer a finger-shaped design. The more fingers of different width, an electrically conductive comprising layer, more accurately, the capacitance value can be set.
0013It is further preferred that the first electrically conductive layer and the second electrically Cu conductive layer, Al, Al doped with Cu, Al doped with Mg, Al doped with Si or Al doped with Si and Cu contained.
0014Electrically conductive layers of these materials may by means of focused laser emission and the heating effect occurring in a locally non-conducting State be transferred. These materials used parts are electrically conductive layer is evaporated by the resulting heating effect.
0015The invention further relates to a method for fine tuning the capacitance value one passive component comprising at least a first and a second electrically conductive layer and a dielectric comprises electrically and wherein at least one conductive layer having a textured surface with slots in a component equipped with a thin-film circuit on a substrate of an insulating material, with a protective layer, and at least one contact hole which passes through the module and a structured metallization which covers the module and the contact hole, in which by means of focused laser emission locally at least one electrically conductive Layer is achieved a heating effect and parts of the electrically conductive layer are evaporated.
0016After manufacturing the device equipped with a thin-film circuit, the at least comprises a capacitor, the capacitance value of the capacitor is determined. The capacitance value is the sum of the capacitance values of the small capacitors in parallel, extending through the slots in the structured surface of at least one electrically conductive layer arise. Subsequently, by means of focused laser emission, the corresponding Number separated on parallel capacitor for the desired capacitance value to obtain.
0017In the following, the invention is based on two figures and an embodiment are explained.
It shows
0018<dl tsize="6" compact="compact"><dt>Fig. 1</dt><dd>in cross-section the schematic structure of a component equipped with Thin film circuit which comprises a capacitor, and</dd><dt>FIG. 2</dt><dd>an electrically conductive layer with slots.</dd></dl>
0019According to FIG. 1, a device equipped with a thin-film circuit substrate 1 in which an example, a ceramic material, a glass-ceramic material, Glass material or a ceramic material with a planarizing layer of glass or includes an organic material. Preferably, the substrate 1 Al<sub>2</sub>O<sub>3</sub>, Glass or Al<sub>2</sub>O<sub>3</sub> with a planarizing layer of glass, polyimide or polybenzocyclobutene. On This substrate 1 is deposited a first electrically conductive layer 2, which is a structured having surface with slots. On this structured first electrically conductive Layer 2 is situated, a dielectric 3, which is generally the entire surface of is the substrate 1 covered and interrupted only at certain locations in order to Vias underlying first electrically conductive layer 2 to produce. The dielectric 3 For example, Si<sub>3</sub>N<sub>4</sub>, SiO<sub>2</sub>, Si<sub>x</sub>O<sub>y</sub>N<sub>z</sub> (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1) or Ta<sub>2</sub>O<sub>5</sub> contain. On the dielectric 3, a second electrically conductive layer 4 is deposited and structured. The first electrically conductive layer 2 and the second electrically conductive Layer 4 can for example Cu, Al, Al doped with a few percent of Cu, Al doped with few percent Mg, Al doped with a few percents of Si or Al doped with a few percent Si and Cu contained. Over the entire region of the substrate 1 is a protective layer 5 of an inorganic material such as SiO<sub>2</sub>, Si<sub>3</sub>N<sub>4</sub> or Si<sub>x</sub>O<sub>y</sub>N<sub>z</sub> (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1) applied. Alternatively, an organic material such as, for Polyimide or polybenzocyclobutene be used. In addition, the entire comprises Component at least one contact hole 6. The component and the contact hole 6 are covered with a structured metallization which again at least one base layer 7 contains. It may be preferred that the base layer 7, a layer 8 is applied. In this case, the base layer 7, which, for example, Cr / Cu acts contains, as a seed layer for the galvanic deposition of the cover layer 8. The cover layer 8 includes, for example, Cu / Ni / Au.
0020Alternatively, the first and second electrically conductive layers 2, 4, or even the can second electrically conductive layer 4 after application structured such that They have slots.
0021Further, on the substrate 1, a barrier layer can be applied, which for example, Si<sub>3</sub>N<sub>4</sub> contains. On the substrate 1 or the barrier layer may also have a Resistance layer may be deposited and patterned. This structured resistance layer For example, Ni<sub>x</sub>Cr<sub>y</sub>Al<sub>z</sub> (0 ≤ x ≤1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1), Si<sub>x</sub>Cr<sub>y</sub>O<sub>z</sub> (0 ≤ x ≤1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1), Si<sub>x</sub>Cr<sub>y</sub>N<sub>z</sub> (0 ≤ x ≤1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1) Cu,<sub>x</sub>Ni<sub>y</sub> (0 ≤ x ≤1, 0 ≤ y ≤ 1) or Ti<sub>x</sub>W<sub>y</sub> (0 ≤ x ≤1, 0 ≤ y ≤ 1).
0022Furthermore, power supply lines can be mounted on opposite sides of the component be. As power supply, an electroplated SMD end contact of Cr / Cu, Ni / Sn, or Cr / Cu, Cu / Ni / Sn, or Cr / Ni, Pb / Sn, a bump end contact, a castellation of Cr / Cu, Cu / Ni / Au, a ball grid array made of a Cr / Cu / Ni layer with a ball be used from Sn or PbSn alloy or a land grid array of Cr / Cu.
0023In FIG. 2, an electrically conductive layer 2 with slots is shown. The width of the slots and the pitch of the slits is arbitrary to each other. Through the slots receives the electrically conductive layer 2, a finger-shaped design. The more fingers of different width having the electrically conductive layer 2, the more accurately the capacitance value adjusted will. In addition, the cut line 9 of the laser is shown. is at this point by means of focused laser emission, one or more fingers from the main part of the electrically conductive layer 2 separated. In this area of the thin-film circuit has no Metallization.
0024In the following an embodiment of the invention is illustrated, an exemplary represents implementation options.
Embodiment 1
0025On a substrate 1 made of Al<sub>2</sub>O<sub>3</sub> with a planarizing layer of glass, a first electrical conducting layer 2 of Al doped with 4% Cu was deposited and through slots structured so that she received a finger-like appearance. The first electrically conductive Layer 2 had characterized on five fingers of different widths. In the next step over the entire surface of the substrate 1 a dielectric 3 of Si<sub>3</sub>N<sub>4</sub> deposited. On the dielectric 3 has a second electrically conductive layer 4 of Al doped with 4% Cu is deposited and patterned. The entire thin-film circuit was a Protective layer 5 of Si<sub>3</sub>N<sub>4</sub> provided. Subsequently, for making electrical contact the first electrically conductive layer 2 via through the protective layer 5 and the dielectric 3 etched. Furthermore, a plurality of contact holes 6 were that the component completely penetrate, created by a laser. To the component and in the contact holes 6 A patterned metallization of a base layer 7 made of Cr / Cu and a top layer 8 deposited Cu / Ni / Au. In addition, on both sides of the component Ball Grid Arrays with a layer of Cr / Cu / Ni and attached balls of Sn as the current supply leads attached.
0026Subsequently, the total capacitance of the capacitor, which is composed of five smaller was, parallel capacitors composed, determined. Of the five capacitors or fingers wore a finger 70%, two fingers respectively 10% and two fingers 5% the total capacitance value at. Accordingly, could the value of all seats be fine-tuned by a maximum of 30%. The tolerance was at most ± 2.5%. The fine tuning of the capacitance value of the capacitor is formed by separating corresponding number of fingers reaches the electrically conductive layer 2nd there , parts of the electrically conducting layer 2 along the laser cut line 9 by focused emission of an argon laser evaporated.
2 sheets
Sheet 1 Sheet 2
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| USRE41684E | Cited by | United States of America | Applicant |
| USRE41684E | Cited by | United States of America | Search report |
| US11961685B2 | Cited by | United States of America | Applicant |
| EP1587145A3 | Cited by | European Patent Office (EPO) | Search report |
| US11417473B2 | Cited by | United States of America | Applicant |
| USRE41684E1 | Cited by | United States of America | Applicant |
| US7079375B2 | Cited by | United States of America | Applicant |
| EP1587145A2 | Cited by | European Patent Office (EPO) | Search report |
| EP3709321A3 | Cited by | European Patent Office (EPO) | Search report |
| USRE41684E1 | Cited by | United States of America | Search report |
5 members in 5 offices
Priority claims5
| Document | Office | Kind | Date |
|---|---|---|---|
| 19961675 | Germany | A | |
| 19961675 | Germany | A | |
| 19961675 | Germany | – | |
| 19961675 | – | – | – |
| DE1999161675 | – | – | – |
Members5
| Document | Office | Kind | |
|---|---|---|---|
| US2001004314A1 | United States of America | A1 | |
| CN1301041A | China | A | |
| EP1111694A2This record | European Patent Office (EPO) | A2 | |
| DE19961675A1 | Germany | A1 | |
| JP2001237371A | Japan | A |
9 legal events, as the office reported them to INPADOC
Over the term
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| Event | Code | |
|---|---|---|
| Application withdrawnWithdrawn18W | 18W | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: THE APPLICATION HAS BEEN WITHDRAWNSTAA | STAA | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | |
| Designated contracting statesAK | AK | |
| Request for extension of the european patentAL;LT;LV;MK;RO;SIAX | AX | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI |
Numbers
- Publication
- 1111694
- Publication, DOCDB
- 1111694
- Publication, EPODOC
- EP1111694
- Application
- 204614
- Application, DOCDB
- 00204614
- Application, EPODOC
- EP20000204614
Titles3
- German
- Bauteil mit Dünnschichtschaltkreis mit trimmbaren Kondensator
- English
- Thin film device with a trimmable capacitor
- French
- Dispositif à couche mince avec un condensateur ajustable
Classification
- CPC, 4
- H01G4/255
- H05K1/162
- H05K3/428
- H10D1/68
- IPC, 5
- H01L21 02
- H01L27 01
- H05K1 16
- H01G4 255
- H05K3 42
Designated states2
- Contracting states, 1
- Türkiye
- Extension states, 1
- Slovenia