Method for fabricating a semiconductor structure including a metal oxide interface with silicon
Abstract
A method for fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12); forming amorphous silicon dioxide (14) on the surface (12) of the silicon substrate (10); providing a metal oxide (18) on the amorphous silicon dioxide (14); heating the semiconductor structure to form an interface characterised by a seed layer (20) adjacent the surface (12) of the silicon substrate (10); and forming one or more layers of a high dielectric constant oxide (22) on the seed layer (20).

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8 claims: 1 independent, 7 dependent
- 1A method of fabricating a semiconductor structure characterised by the steps of:providing a silicon substrate (10) having a surface (12);forming on the surface of the silicon substrate a seed layer (20) characterised by a silicate crystalline material;and forming one or more layers of a high dielectric constant oxide (22) on the seed layer.
24 paragraphs, as filed
Field of Invention
0001The present invention relates in general to a method for fabricating a semiconductor structure including a crystalline metal oxide interface between a silicon substrate and metal oxides, and more particularly to a method for fabricating an interface including a seed layer and a high dielectric constant oxide.
Background of the Invention
0002An ordered and stable silicon (Si) surface is most desirable for subsequent epitaxial growth of single crystal thin films on silicon for numerous device applications, e.g., ferroelectrics or high dielectric constant oxides for non-volatile high density memory and next generation MOS devices. It is pivotal to establish an ordered transition layer on the Si surface, especially for subsequent growth of single crystal oxides, e.g., perovskites.
0003Some reported growth of these oxides, such as BaO and BaTiO<sub>3</sub> on Si (100) were based on a BaSi<sub>2</sub> (cubic) template by depositing one fourth monolayer of Ba on Si (100) using molecular beam epitaxy at temperatures greater than 850°C. See for example: R. McKee et al., <i>Appl. Phys. Lett</i>. 59(7), pp. 782-784 (12 August 1991); R. McKee et al., <i>Appl. Phys. Lett.</i> 63(20), pp. 2818-2820 (15 November 1993); R. McKee et al., <i>Mat. Res. Soc. Symp. Proc.</i>, Vol. 21, pp. 131-135 (1991); U.S. Patent No. 5,225,031, issued July 6, 1993, entitled "PROCESS FOR DEPOSITING AN OXIDE EPITAXIALLY ONTO A SILICON SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS"; and U.S. Patent No. 5,482,003, issued January 9, 1996, entitled "PROCESS FOR DEPOSITING EPITAXIAL ALKALINE EARTH OXIDE ONTO A SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS". A strontium suicide (SrSi<sub>2</sub>) interface model with a c(4x2) structure was proposed. See for example: R. McKee et al., Phys. Rev. Lett. 81(14), 3014 (5 October, 1998). However, atomic level simulation of this proposed structure indicates that it likely is not stable at elevated temperatures.
0004Growth of SrTiO<sub>3</sub> on silicon (100) using an SrO buffer layer has been accomplished. See for example: T. Tambo et al., <i>Jpn. J. Appl. Phys.</i>, Vol. 37 (1998), pp. 4454-4459. However, the SrO buffer layer was thick (100 Å), thereby limiting application for transistor films, and crystallinity was not maintained throughout the growth.
0005Furthermore, SrTiO<sub>3</sub> has been grown on silicon using thick oxide layers (60-120 Å) of SrO or TiO<sub>x</sub>. See for example: B. K. Moon et al., <i>Jpn. J. Appl. Phys</i>., Vol. 33 (1994), pp. 1472-1477. These thick buffer layers would limit the application for transistors.
0006Therefore, a method for fabricating a thin, stable crystalline silicate interface with silicon is needed.
Summary of the Invention
0007The above problems and others are at least partially solved and the above purposes and others are realized in a method of fabricating a semiconductor structure including the steps of providing a silicon substrate having a surface, forming on the surface of the silicon substrate a seed layer characterised by a silicate crystalline material and forming one or more layers of a high dielectric constant oxide on the seed layer.
Brief Description of the Drawings
0008Referring to the drawings: <ul id="ul0001" list-style="none"><li>FIG. 1 illustrates a cross-sectional view of a clean semiconductor substrate having a plurality of oxide layers formed thereon and in accordance with the present invention;</li><li>FIG. 2 illustrates a cross-sectional view of a semiconductor substrate having an interface seed layer formed of a crystalline silicate layer in accordance with the present invention; and</li><li>FIG. 3 illustrates a cross-sectional view of a high dielectric constant metal oxide layer formed on the structure illustrated in FIG. 2 in accordance with the present invention.</li></ul>
Detailed Description of the Preferred Embodiment
0009This disclosure teaches a method of fabricating a high dielectric constant (high-k) metal oxide having an interface with a silicon substrate. The process is based on the solid state reaction of a metal oxide, such as strontium oxide (SrO), barium oxide (BaO), calcium oxide (CaO), zirconium oxide (ZrO<sub>2</sub>), hafnium oxide (HfO<sub>2</sub>), or the like, with SiO<sub>2</sub>, to form a stable silicate seed layer necessary for the subsequent growth of alkaline-earth metal oxide layers. Accordingly, disclosed is a new method of growing perovskite oxides such as SrTiO<sub>3</sub>, BaTiO<sub>3</sub>, SrBaTiO<sub>3</sub>, CaTiO<sub>3</sub>, or the like.
0010To form the novel interface between a silicon (Si) substrate and one or more layers of a high dielectric constant (high-k) metal oxide, various approaches may be used. Several examples will be provided for starting with a Si substrate having silicon dioxide (SiO<sub>2</sub>) on the surface. The silicon dioxide is disclosed as formed as a native oxide, or by utilizing thermal, or chemical techniques. SiO<sub>2</sub> is amorphous rather than single crystalline and it is desirable for purposes of growing additional single crystal material on the substrate that a single crystal oxide layer be provided as the interface.
0011Turning now to the drawings in which like elements are designated with like numbers throughout the FIGs., FIG. 1 illustrates a Si substrate 10 having a surface 12, and a layer 14 of SiO<sub>2</sub> thereupon. In this particular embodiment, layer 14 of SiO<sub>2</sub> naturally exists (native oxide) once the silicon substrate 10 is exposed to air (oxygen). Alternatively, layer 14 of SiO<sub>2</sub> may be formed purposely in a controlled fashion well known in the art, e.g., thermally by applying oxygen onto the surface 12 at a high temperature, or chemically using a standard chemical etch process. Layer 14 is formed with a thickness in a range of 5-100Å thick, and more particularly with a thickness in a range of 10-25Å.
0012The novel seed layer (discussed presently) is formed by depositing an amorphous metal oxide such as SrO, BaO or the like 18 to the surface 16 of SiO<sub>2</sub> layer 14 at 0-900°C. More specifically, the Si substrate 10 and the amorphous SiO<sub>2</sub> layer 14 are heated to a temperature below the sublimation temperature of the SiO<sub>2</sub> layer 14 (generally below 900°C). This can be accomplished in a molecular beam epitaxy chamber or in a chemical or physical vapor deposition chamber under inert ambient conditions.
0013Once the substrate 10 is properly heated and the surface 12 of the substrate 10 having SiO<sub>2</sub> layer 14 thereon is exposed to a beam of metal 18, such as strontium (Sr), barium (Ba), calcium (Ca), zirconium (Zr), hafnium (Hf), or the like in an oxygen atmosphere under O<sub>2</sub> pressure equal to or less than 1x10<sup>-4</sup> mBar to form an amorphous oxide onto the SiO<sub><b>2</b></sub> oxide 14 as illustrated in FIG. 1. In a preferred embodiment, the beam is Ba or Sr which is generated by resistively heating effusion cells or from e-beam evaporation sources. In a specific example, substrate 10 and SiO<sub>2</sub> layer 14 are exposed to a beam of Sr and Oxygen O<sub>2</sub>. The SrO joins the SiO<sub>2</sub> and converts the SiO<sub>2</sub> layer 14 into a seed layer 20 comprised of SrSiO<sub>4</sub> or SrSiO<sub>3</sub>, or the like, in a crystalline form as illustrated in FIG. 2.
0014This step provides for the formation of a stable silicate on the silicon substrate, more particularly the formation of seed layer 20. The thickness of metal oxide layer 20 is approximately the same thickness of the SiO<sub>2</sub> oxide layer 14, more specifically in the range of 5-100Å, with a preferred thickness in the range of 10-25Å. This silicate layer is crystalline and ordered showing a 2x1 reconstruction.
0015In this particular embodiment, the application of the Sr and oxygen to the surface 16 of layer 14 and subsequent heating causes a chemical reaction, forming SrSiO<sub>3</sub> or SrSiO<sub>4</sub>, or the like as the seed layer 20. During fabrication, this growth is monitored using reflection high energy electron diffraction (RHEED) techniques which are well documented in the art and which can be used in situ, i.e., while performing the exposing step within the growth chamber. The RHEED techniques are used to detect or sense surface crystalline structures and in the present process change rapidly to strong and sharp streaks by the forming of a few atomic layers of the SrSiO<sub>4</sub>, SrSiO<sub>3</sub>, or the like. It will of course be understood that once a specific manufacturing process is provided and followed, it may not be necessary to perform the RHEED techniques on every substrate. Alternatively, monitoring of the crystalline structure can be accomplished utilizing any surface sensitive technique, such as reflection difference spectroscopy, spectroscopic ellipsometry, or the like wherein the surface is monitored by in situ techniques.
0016It should be understood by those skilled in the art that the temperatures and pressures given for these processes are recommended for the particular embodiment described, but the invention is not limited to a particular temperature or pressure range. As taught, seed layer 20 comprises rows of strontium, silicon, and oxygen atoms in a 2x1 configuration on a (001) surface of silicon substrate 10, 1x in the 〈110〉 direction and 2x in the orthogonal 〈110〉 direction.
0017Referring to FIG. 3, the formation of high dielectric constant oxide layer 22 may be accomplished by either the simultaneous or alternating supply to a surface 21 of the seed layer 20 of a crystalline silicate at less than or equal to 800°C, more particularly at a temperature in a range of 350-650°C and under O<sub>2</sub> partial pressure less than or equal to 1x10<sup>-4</sup> mBar.
0018Single crystal high dielectric constant oxide layer 22, more particularly a perovskite, is formed on surface 21 of the seed layer 20 by either the simultaneous or alternating supply of alkaline metal (Sr, Ba etc), oxygen, and a transition metal, such as titanium, at less than or equal to 800°C under an oxygen partial pressure less than or equal to 1x10<sup>-4</sup> mBar. This single crystal oxide layer 22 may, for example, comprise a thickness of 50-1000Å and will be substantially lattice matched with the underlying seed layer 20.
0019Accordingly, disclosed is a method for fabricating a thin, crystalline seed layer 20 with silicon 10 as been described herein. The interface, or seed layer, 20 may comprise a single atomic layer. This forcing of the formation of a silicate layer is necessary for the subsequent growth of a perovskite film thereon. Better transistor applications are achieved by the interface being thin, in that the electrical coupling effects of the overlying high dielectric constant oxide layers are not compromised, and in that the seed layer 20 is more stable since the atoms will more likely maintain their crystallinity in processing.
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Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| WO03094218A3 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| WO03094218A2 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| WO03038873A3 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| WO03038873A2 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US5225031A | Cites | United States of America | Search report |
| US5482003A | Cites | United States of America | Search report |
| US5879956A | Cites | United States of America | Search report |
| US5888296A | Cites | United States of America | Search report |
13 members in 8 offices; this record represents the family
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 354522 | United States of America | – | |
| 35452299 | United States of America | A |
Members13
| Document | Office | Kind | |
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| EP1069605A2This record | European Patent Office (EPO) | A2 | |
| CN1281245A | China | A | |
| JP2001068467A | Japan | A | |
| KR20010029897A | Republic of Korea | A | |
| US6319730B1 | United States of America | B1 | |
| TW468211B | Taiwan Province of China | B | |
| SG85710A1 | Singapore | A1 | |
| CN1140917C | China | C | |
| EP1069605A3 | European Patent Office (EPO) | A3 | |
| EP1069605B1 | European Patent Office (EPO) | B1 | |
| DE60026909D1 | Germany | D1 | |
| DE60026909T2 | Germany | T2 | |
| KR100633754B1 | Republic of Korea | B1 |
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Numbers
- Publication
- 1069605
- Application
- 1151265
Titles3
- German
- Herstellung einer Halbleiterstruktur mit einem Metalloxidinterface zu Silizium
- English
- Method for fabricating a semiconductor structure including a metal oxide interface with silicon
- French
- Méthode de fabrication d'une structure semiconductrice comprenant une couche d'oxyde de metal avec une interface avec silicium
Classification
- CPC, 12
- H10P14/69398
- H10P95/00
- H10P14/6928
- H10P14/693
- H10P14/6934
- H10P14/69215
- H10P14/69392
- H10P14/662
- H10P14/6322
- H10P14/6329
- H10P14/6334
- H10P14/6349
- IPC, 2
- H10P14 692
- C30B29 32
Designated states2
- Contracting states, 1
- Sweden
- Extension states, 1
- Slovenia