Data transmitter

TECHNICAL FIELD

0001The present invention relates to a data transmission device for transmitting data from a driver to a receiver via a transmission line path.

BACKGROUND ART

0002Figure <b>11</b> shows a configuration of a conventional data transmission device <b>200</b>. The data transmission device <b>200</b> includes a driver <b>210</b> for sending data, a receiver <b>220</b> for receiving the data sent from the driver <b>210</b>, and a transmission line path <b>230</b> for connecting between the driver <b>210</b> and the receiver <b>220</b>. Data is transmitted via the transmission line path <b>230</b> from the driver <b>210</b> to the receiver <b>220</b>.

0003The driver <b>210</b> includes an output buffer <b>212</b> for outputting data onto the transmission line path <b>230</b>. The output buffer <b>212</b> is connected via a pad <b>214</b> to the transmission line path <b>230</b>.

0004The receiver <b>220</b> includes an input buffer <b>222</b> for receiving data from the transmission line path <b>230</b>. One input terminal of the input buffer <b>222</b> is connected via a pad <b>224</b> and a stub resistor <b>232</b> to the transmission line path <b>230</b>.

0005An end of a terminator resistor <b>240</b> is connected to an end on the receiver <b>220</b> side of the transmission line path <b>230</b>. The other end of the terminator resistor <b>240</b> is connected to a terminator potential V_term.

0006The amplitude of a data signal on the transmission line path <b>230</b> is determined by the resistance of the terminator resistor <b>240</b> and the output impedance of the driver <b>210</b>. Therefore, with an appropriate setting of the resistance of the terminator resistor <b>240</b> and the output impedance of the driver <b>210</b>, the amplitude of the data signal on the transmission line path <b>230</b> can be limited to a sufficiently small value.

0007The resistance of the terminator, resistor <b>240</b> is typically set so as to be substantially equal to the characteristic impedance Z of the transmission line path <b>230</b> This prevents data sent from the driver <b>210</b> from being reflected at the end on the receiver <b>220</b> side of the transmission line path <b>230</b>.

0008However, the use of the terminator resistor <b>240</b> for terminating the transmission line path <b>230</b> causes a problem such that there is power consumption in the absence of data transmission on the transmission line path <b>230</b>. This is because when data is held at a HIGH level, a direct current (I_sink) flows from the terminator potential V_term to the driver <b>210</b> via the terminator resistor <b>240</b>; and when data is held at a LOW level, a direct current (I_source) flows from the driver <b>210</b> to the terminator potential V_term via the terminator resistor <b>240</b>.

0009Also, in the presence of data transmission, since a direct current flows via the terminator resistor <b>240</b>, the slopes of a waveform showing the transition of the potential of the transmission line path <b>230</b> becomes mild as the potential difference between the potential of the transmission line path <b>230</b> and the terminal potential V_term is increased (see Figure <b>12</b>). This often causes skew.

0010Further, the output impedance of the driver <b>210</b> when the driver <b>210</b> outputs data of the HIGH level is not always in agreement with the output impedance of the driver <b>210</b> when the driver <b>210</b> outputs data of the LOW level. When these are not in agreement with each other, the absolute value of the direct current (I_source) flowing from the driver <b>210</b> to the terminal potential V_term is not identical to the absolute value of the direct current (I_sink) flowing from the terminal potential V_term to the driver <b>210</b>. Therefore, the value of the potential amplitude of the transmission line path <b>230</b> from the terminal potential V_term. when the driver <b>210</b> outputs the HIGH level data is different from the value of the potential amplitude of the transmission line path <b>230</b> from the terminal potential V_term when the driver <b>210</b> outputs the LOW level data.

0011This means that the terminal potential V_term is shifted from a middle value between a potential (Hi-potential) corresponding to the HIGH level data and a potential (Lo-potential) corresponding to the LOW level data For instance, in an example shown in Figure <b>12</b>, the terminal potential V_term is 1.1 V; the Hi-potential is 1.5 V, and the Lo-potential is 0.8 V.

0012The receiver <b>220</b> determines whether data on the transmission line path <b>230</b> has the HIGH level or the LOW level using the terminal potential V_term as a reference potential. Therefore, when the terminal potential V_term is shifted from the middle value of the Hi-potential and the Lo-potential, the time which it takes data to transit from the LOW level to the HIGH level is different from the time which it takes data to transit from the HIGH level to the LOW level. This is responsible for skew occurring when the receiver <b>220</b> latches data on the transmission line path <b>230</b> in synchronization with a predetermined clock signal.

0013An object of the present invention is to provide a data transmission device in which power consumption is reduced.

0014Another object of the present invention is to provide a data transmission device in which occurrence of skew is prevented.

DISCLOSURE OF THE INVENTION

0015A data transmission device according to the present invention includes a driver for sending data; a receiver for receiving data sent from the driver; a transmission line path for connecting between the driver and the receiver; and a variable impedance element having a controllably variable impedance. The variable impedance element is connected to the transmission line path.

0016According to this invention, by controlling the impedance value of the variable impedance element, a reduction in power consumption and prevention of skew occurrence can be optimized.

0017For example, when the data transmission device is operated at a low speed, skew is unlikely to occur. Therefore, in this case, the impedance value of the variable impedance element is controlled in such a manner as to decrease the impedance value of the variable impedance element. This prevents a direct current from flowing through the transmission line path. As a result, power consumed by the data transmission device can be reduced. When the data transmission device is operated at a high speed, skew is likely to occur. Therefore, in this case, the impedance value of the variable impedance element is controlled in such a manner as to agree with the impedance of the transmission line path. This prevents data from being reflected at an end of the transmission line path. As a result, occurrence of skew is prevented.

0018The impedance value of the variable impedance element may be changed according to a potential of the transmission line path.

0019For example, when the potential difference between the potential of the transmission line path and the terminal potential is less than a predetermined value, the impedance value of the variable impedance element may be controlled in much a manner as to increase the impedance value of the variable impedance element. This allows data to transit from a LOW-level to a HIGH-level (or the HIGH-level to the LOW-level) at a high speed. Father, when the potential difference between the potential of the transmission line path and the terminal potential is greater than a predetermined value, the impedance value of the variable impedance element may be controlled in such a manner as to decrease the impedance value of the variable impedance element. This restricts the amplitude of data and prevents data reflection.

0020The impedance value of the variable impedance element may be changed according to a control signal input from the outside of the variable impedance element.

0021For example, when data is transmitted at a high speed, a control signal which demands that the impedance value of the variable impedance element is set to a low value is input to the variable impedance element. The variable impedance element decreases the impedance in response to the control signal. This prevents data from being reflected at an end of the transmission line path. As a result, occurrence of skew is prevented. Further, when data transmission is on standby or data is transmitted at a low speed, a control signal which demands that the impedance value of the variable impedance element is set to a high value is input to the variable impedance element. The variable impedance element increases the impedance in response to the control signal. This prevents a direct current from flowing through the transmission line path. As a result, power consumed by the data transmission device can be reduced.

0022The impedance value of the variable impedance element and an output impedance of the driver may be changed in association with each other. In particular, the output impedance of the driver may be changed according to the impedance value of the variable impedance element.

0023For example, when data transmission is on standby or data is transmitted at a low speed, the impedance value of the variable impedance element is set to a high value. The output impedance of the driver is set to a high value in response to that the impedance value of the variable impedance element has been set to a high value. This makes it possible that the level of a Hi-potential corresponding to the HIGH-level data and the level of a Lo-potential corresponding to the LOW-level data are substantially equal to values which are obtained when the impedance value of the variable impedance element is set to the low value. This makes it easy to determine whether transmitted data is at the HIGH level or at the LOW level.

0024The variable impedance element may include a first diode and a second diode connected in parallel. A direction of a current flowing through the first diode is opposite to a direction of a current flowing through the second diode.

0025This variable impedance element has an extremely high impedance value until either of the first or second diode is biased in the forward direction. This variable impedance element has an extremely low impedance value when either of the first or second diode is biased in the forward direction.

0026Since the potential of the transmission line path is clamped with the first and second diodes, the potential of the transmission line path transits between a potential (V_term+V_f) and a potential (V_term-V_f) where V_term is the terminal potential and is at the middle of the two potentials; and V_f is the forward direction voltage of the first and second diodes. For this reason, a time in which data transits from the LOW level to the HIGH level becomes substantially equal to a time in which data transits from the HIGH level to the LOW level. As a result, occurrence of skew is unlikely to occur.

0027Further, the impedance value of the variable impedance element is set to a high value during the time period of the data transition. For this reason, a drive load which is applied to the driver during the time period of the data transmission is only the capacitance of the transmission line path. Therefore, data transits at a constant high speed. This plays a role in prevention of skew occurrence.

0028The variable impedance element may further include a resistor connected in series to the first and second diodes connected in parallel.

0029Adjustment of the resistance of the resistor can adjust the impedance when the first or second diode is biased in the forward direction.

0030A resistance of the resistor may be substantially equal to a characteristic impedance of the transmission line path; and a forward direction voltage of the first and second diodes may be substantially equal to an amplitude of a potential of the transmission line path from a predetermined terminal voltage, the amplitude being generated when the driver outputs the data onto the transmission line path.

0031Thus, by setting the resistance of the resistor and the forward direction voltage of the first and second diodes, the impedance value of the variable impedance element in a state such that either the first or second diode is biased in the forward direction is substantially equal to the characteristic impedance of the transmission line path. This can prevent data reflection effectively. Further, even when either of the first or second diode is biased in the forward direction, the amplitude of the potential of the transmission line path from the terminal potential is substantially in agreement with the forward direction voltage of the first and second diodes. For this reason, the time in which data transits from the LOW level to the HIGH level and the time in which data transits from the HIGH level to the LOW level become substantially equal to each other. As a result, skew is unlikely to occur.

0032Another data transmission device according to the present invention includes a driver for sending data; a receiver for receiving data sent from the driver, first and second transmission line paths for connecting between the driver and the receiver; a first variable impedance element having a first controllably variable impedance; and a second variable impedance element having a second controllably variable impedance. The first variable impedance element is connected to the first transmission line path, and the second variable impedance element is connected to the second transmission line path.

0033According to this invention, by controlling the impedance value of the first variable impedance element and the impedance value of the second variable impedance element, a reduction in power consumption and prevention of skew occurrence can be optimized.

0034The first variable impedance element may include first and second diodes; the anode of the first diode may be connected to a predetermined first potential; the cathode of the first diode may be connected to the first transmission line path: the anode of the second diode may be connected to the first transmission line path; and the cathode of the second diode may be connected to a predetermined second potential lower than the predetermined first potential; the sum of the forward direction voltages of the first and second diodes may be greater than a potential difference between the predetermined first potential and the predetermined second potential; the second variable impedance element includes third and fourth diodes; the anode of the third diode may be connected to a predetermined third potential; the cathode of the third diode may be connected to the second transmission line path; the anode of the fourth diode may be connected to the second transmission line path; and the cathode of the fourth diode may be connected to a predetermined fourth potential lower than the predetermined third potential; and the sum of the forward direction voltages of the third and fourth diodes may be greater than a potential difference between the predetermined third potential and the predetermined fourth potential.

0035With the first variable impedance element so constructed, when the potential of the transmission line path is between the potential (V_term1-V_f) and the potential (V_ss+V_f), the transmission line path is connected to the potential V_term1 or the potential V_SS via the element having an extremely high impedance. Here, V_term1 denotes the first potential, V_SS denotes the second potential, and V_f denotes the forward voltage of the first and second voltages. For this reason, data transits at a high speed.

0036Further, when the potential of the transmission line path becomes less than the potential (V_term1-V_f) or greater than (V_ss+V_f), the first or second diode is biased in the forward direction, whereby the transmission line path is connected to the potential V_term1 or the potential V_SS via the element having an extremely low impedance. For this reason, the level of a Hi-potential corresponding to the HIGH-level data and the level of a Lo-potential corresponding to the LOW-level data are clamped around the potential (V_term1-V_f) or the potential (V_ss+V_f). This restricts the amplitude of data.

0037The same applies to the second variable impedance element.

0038Thus, data transit at a high speed and the amplitude of data is restricted. As a result, it is possible to obtain high-speed data transmission where skew is unlikely to occur.

BRIEF DESCRIPTION OF THE DRAWINGS

0039<ul id="ul0001" list-style="none"><li>Figure <b>1</b> is a diagram showing a configuration of a data transmission device it according to Example 1 of the present invention.</li><li>Figure <b>2</b> is a diagram shoving transition of the potential of a transmission line path <b>30</b> shown in Figure <b>1</b>.</li><li>Figure <b>3</b> is a diagram showing a change in the output impedance of a driver <b>10</b> and the impedance of a variable impedance element <b>40</b> over time.</li><li>Figure <b>4A</b> is a diagram showing a configuration of a data transmission device <b>1b</b> according to Example 1 of the present invention.</li><li>Figure <b>4B</b> is a diagram showing a configuration of a data transmission device <b>1c</b> according to Example 1 of the present invention.</li><li>Figure <b>5A</b> is a diagram showing a configuration of a variable impedance element <b>42</b> shown in Figure <b>4A</b>.</li><li>Figure <b>5B</b> is a diagram showing a configuration of a variable impedance element <b>44</b> shown in Figure <b>4B</b>.</li><li>Figure <b>6</b> is a diagram shaving a configuration of an output buffer <b>12a</b> of the driver <b>10</b>.</li><li>Figure <b>7A</b> is a diagram shoving a configuration of a variable impedance element <b>46</b>.</li><li>Figure <b>7B</b> is a diagram showing a configuration of a variable impedance element <b>48</b>.</li><li>Figure <b>8A</b> is a diagram showing a configuration of a data transmission device <b>2a</b> according to Example 2 of the present invention.</li><li>Figure <b>8B</b> is a diagram showing impedance characteristics of diodes <b>181</b> to <b>184</b>.</li><li>Figure <b>9</b> is a diagram showing a configuration of a data transmission device <b>2b</b> according to Example 2 of the present invention.</li><li>Figure <b>10</b> is a diagram showing a configuration of a data transmission device according to another example of the present invention.</li><li>Figure <b>11</b> is a diagram showing a configuration of a conventional data transmission device <b>200</b>.</li><li>Figure <b>12</b> is a diagram showing transition of the potential of a transmission line path <b>230</b> shown in Figure <b>11</b></li></ul>

BEST MODE FOR CARRYING OUT THE INVENTION

0040Hereinafter, examples of the present invention will be described with reference to the accompanying drawings.

(Example 1)

0041Figure <b>1</b> shows a configuration of a data transmission device <b>1a</b> according to Example 1 of the present invention. The data transmission device <b>1a</b> includes a driver <b>10</b> for sending data, a receiver <b>20</b> for receiving, the data sent from the driver <b>10</b>, and a transmission line path <b>30</b> for connecting between the driver <b>10</b> and the receiver <b>20</b>. The data is transmitted from the driver <b>10</b> to the receiver <b>20</b> via the transmission line path <b>30</b>. Each of the driver <b>10</b> and the receiver <b>20</b> is, for example, a semiconductor integrated circuit.

0042The data transmission device <b>1a</b> further includes a variable impedance element <b>40</b> the impedance value of which varies automatically according to the potential of the transmission line path <b>30</b>. One end of the variable impedance element <b>40</b> is connected to an end on the receiver <b>20</b> side of the transmission line path <b>30</b>. The other end of the variable impedance element <b>40</b> is connected to a terminal potential V_term.

0043The driver <b>10</b> includes an output buffer <b>12</b> for outputting data onto the transmission line path <b>30</b>. The output buffer <b>12</b> is connected via a pad <b>14</b> to the transmission line path <b>30</b>.

0044In the example shown in Figure <b>1</b>, the output buffer <b>12</b> is of a push-pull type. The output buffer <b>12</b> includes a PMOS transistor <b>71p</b> and an NMOS transistor <b>71n</b>. The gates of the transistors <b>71p</b> and <b>71n</b> receive predetermined logic values determined by a NAND element <b>73</b>, a NOR element <b>74</b>, and operational amplifiers <b>75</b> and <b>76</b>. The operational amplifier <b>75</b> receives the potential of the transmission line path <b>30</b> and a reference potential <b>VR</b>_<b>1</b>. The operational amplifier <b>76</b> receives the potential of the transmission line path <b>30</b> and a reference potential <b>VR</b>_<b>2</b>.

0045In an initial state, the transistor <b>71p</b> is in the OFF state, and the transistor <b>71n</b> is in the OFF state. In this initial state, when data Data having a value '1' is input into the output buffer <b>12</b>, the transistor <b>71p</b> is switched ON. The transistor <b>71n</b> remains in the OFF state. As a result, the potential of the transmission line path <b>30</b> is increased to be close to a predetermined potential <b>V</b>_<b>CCQ</b>. Thereafter, when the potential of the transmission line path <b>30</b> becomes more than the reference voltage <b>VR</b>_<b>1</b>, the transistor <b>71p</b> is switched OFF. The transistor <b>71n</b> remains in the OFF state. This is because when the potential of the transmission line path <b>30</b> becomes more than the reference potential <b>VR</b>_<b>1</b>, the output of the operational amplifier <b>75</b> goes to the LOW level and, as a result, the gate of the transistor <b>71p</b> goes to the HIGH level.

0046In an initial state, the transistor <b>71p</b> is in the OFF state, and the transistor <b>71n</b> is in the OFF state. In this initial state, when data Data having a value '0' is input into the output buffer <b>12</b>, the transistor <b>71n</b> is switched ON. The transistor <b>71p</b> remains in the OFF state. As a result, the potential of the transmission line path <b>30</b> is decreased to be close to a predetermined potential <b>V</b>_<b>SSQ</b>. Thereafter, when the potential of the transmission line path <b>30</b> becomes less than the reference voltage <b>VR</b>_<b>2</b>, the transistor <b>71n</b> is switched OFF. The transistor <b>71p</b> remains in the OFF state. This is because when the potential of the transmission line path <b>30</b> becomes less than the reference potential <b>VR</b>_<b>2</b>, the output of the operational amplifier <b>76</b> goes to the HIGH level and, as a result, the gate of the transistor <b>71n</b> goes to the LOW level.

0047As described above, the output buffer <b>12</b> of the driver <b>10</b> switches OFF the transistor <b>71p</b> when the potential of the transmission line path <b>30</b> becomes greater than the reference potential <b>VR</b>_<b>1</b>, and switches OFF the transistor <b>71n</b> when the potential of the transmission line path <b>30</b> becomes lees than the reference potential <b>VR</b>_<b>2</b>.

0048The receiver <b>20</b> includes an input buffer <b>22</b> for receiving data from the transmission line path <b>30</b>. The input buffer <b>22</b> is, for example, an operational amplifier having two input terminals.

0049One input terminal of the input buffer <b>22</b> is connected via a pad <b>24</b>, a stub resistor <b>32</b>, and a resistor <b>31</b> to the transmission line path <b>30</b>. The other input terminal of the input buffer <b>22</b> is connected to the terminal potential V_term. The terminal potential V_term is, for example 1.1 V.

0050The input buffer <b>22</b> determines whether data on the transmission line path <b>30</b> has the HIGH level or the LOW level using the terminal potential V_term as a reference potential. Thus, the input buffer <b>22</b> receives the data sent from the output buffer <b>12</b>.

0051Note that a node which has the same potential as that of the terminal potential V_term may be provided separately from the terminal potential V_term. In this case, using the potential of this node as a reference potential, the input buffer <b>22</b> can determine whether data on the transmission line path <b>30</b> has the HIGH level or the LOW level. Therefore, the input buffer <b>22</b> is unaffected by the noise of the terminal potential V_term.

0052A variable impedance element <b>40</b> includes a diode <b>81</b> and a diode <b>82</b> which are connected to each other in parallel. The direction (forward direction) of a current flowing through the diode <b>81</b> is opposite to the direction (forward direction) of a current flowing through the diode <b>82</b>.

0053When the potential of the transmission line path <b>30</b> is around the terminal potential V_term, the diodes <b>81</b> and <b>82</b> are not biased in the forward direction. Therefore, the potential of the transmission line path <b>30</b> is around the terminal potential V_term, and the impedance value of the variable impedance element <b>40</b> is much increased.

0054When the output buffer <b>12</b> outputs HIGH-level data onto the transmission line path <b>30</b> so that the potential of the transmission line path <b>30</b> is increased to (V_term+V_f), the diode <b>82</b> is biased in the forward direction. As a result, the impedance value of the variable impedance element <b>40</b> is much decreased. Here V_f denotes a forward voltage of the diode <b>81</b> or <b>82</b>.

0055When the output buffer <b>12</b> outputs LOW-level data onto the transmission line path <b>30</b> so that the potential of the transmission line path <b>30</b> is decreased to (V_term-V_f), the diode <b>81</b> is biased in the forward direction. As a result, the impedance value of the variable impedance element <b>40</b> is much decreased.

0056Figure <b>2</b> shows transition of the potential of the transmission line path <b>30</b> when HIGH-level data and LOW-level data are alternately output from the driver <b>10</b>.

0057When data transmitted from the driver <b>10</b> is in the transition state, the potential of the transmission line path <b>30</b> transits from the HIGH level to the LOW level (or the LOW level to the HIGH level) at a constant high speed. This is because when the potential of the transmission line path <b>30</b> is around the terminal potential V_term, the impedance value of the variable impedance element <b>40</b> has a large value so that only a load corresponding to the capacitance of the transmission line path <b>30</b> is applied to the output buffer <b>12</b> of the driver <b>10</b>.

0058On the other hand, when the data transition is completed to some degree so that the potential difference between the potential of the transmission line path <b>30</b> and the potential of the terminal voltage V_term becomes large, the impedance value of the variable impedance element <b>40</b> is decreased. This is because the potential of the transmission line path <b>30</b> is increased to (V_term+V_f) so that the diode <b>82</b> of the variable impedance element <b>40</b> is biased in the forward direction; and the potential of the transmission line path <b>30</b> is decreased to (V_term-V_f) so that the diode <b>81</b> of the impedance element <b>40</b> is biased in the forward direction. For this reason, an upper limit of the amplitude of data transmitted from the driver <b>10</b> is clamped to the potential (V_term+V_f) and a lower limit of the amplitude of the data is clamped to the potential (V_term-V_f). As described above, the amplitude of the data transmitted from the driver <b>10</b> is limited to a predetermined range (V_term-V_f to V_term+V_f). As a result, it is possible to transmit data having small amplitude.

0059For example, when the diodes <b>81</b> end <b>82</b> are Schottky diodes, the forward voltage V_f is about 0.4 V. Therefore, the potential of data on the transmission line path <b>30</b> swings between 1.5 V and 0.7 V where the terminal potential V_term of 1.1 V is the middle value.

0060When the data transition is completed, the potential difference between the potential of the transmission line path <b>30</b> and the terminal potential V_term as a reference potential is substantially equal to the forward voltage V_f of the diodes <b>81</b> and <b>82</b> of the variable impedance element <b>40</b> regardless of the output impedance of the driver <b>10</b>. This can provide a sufficient potential difference between the potential of the transmission line path <b>30</b> and the terminal potential V_term. As a result, the logical determination can be securely performed.

0061Note that a resistor <b>31</b> connected in series between the variable impedance element <b>40</b> and the transmission line path <b>30</b> is used in order to restrict a current flowing between the terminal potential V_term and the driver <b>10</b> when the diodes <b>81</b> and <b>82</b> are biased in the forward direction.

0062Further, when the reference potentials <b>VR</b>_<b>1</b> and <b>VR</b>_<b>2</b> of the output buffer <b>12</b> of the driver <b>10</b> are set to around the potentials (V_term+V_f) and (V_term-V_f), respectively, a direct current flowing between the terminal potential V_term and the driver <b>10</b> can be removed. This is because when the potential of the transmission line path <b>30</b> is the potential (V_term+V_f) or the potential (V_term-V_f), the transistors <b>71p</b> and <b>71n</b> of the output buffer <b>12</b> are switched OFF so that the output impedance of the driver <b>10</b> becomes very large. In this case, the potential of the transmission line path <b>30</b> maintains the potential (V_term+V_f) or the potential (V_term-V_f) due to the capacitance of the diodes <b>81</b> and <b>82</b> and the capacitance of the transmission line path <b>30</b> itself. Therefore, the potential difference required for the logical determination in the receiver <b>20</b> is subsequently held.

0063Figure <b>3</b> shows variations in the output impedance of the driver <b>10</b> and the impedance value of the variable impedance element <b>40</b> over time. In an example shown in Figure <b>3</b>, it is assumed that the output impedance of the driver <b>10</b> and the impedance value of the variable impedance element <b>40</b> each have one of two values. In Figure <b>3</b>, the highest of the two values is represented by 'H' and the lowest is represented by 'L'.

0064When data on the transmission line path <b>30</b> does not transit, both the output impedance of the driver <b>10</b> and the impedance value of the variable impedance element <b>40</b> are set to 'H' (time period <b>T</b>_<b>1</b>). For this reason, a direct current flowing between the driver <b>10</b> and the variable impedance element <b>40</b> can be removed.

0065When data on the transmission line path <b>30</b> transits from the LOW level to the HIGH level, the output impedance of the driver <b>10</b> is set to 'L' (time period <b>T</b>_<b>2</b>). For this reason, the potential of the transmission line path <b>30</b> transits at a high speed.

0066Thereafter, the potential of the transmission line path <b>30</b> is increased to the potential (V_term+V_f) or is decreased to the potential (V_term-V_f), and the impedance value of the variable impedance element <b>40</b> is set to 'L' (time period <b>T</b>_<b>3</b>). For this reason, the transmission line path <b>30</b> is terminated so that the transmitted data is not reflected and has small amplitude.

0067Thereafter, when the potential of the transmission line path <b>30</b> becomes greater than the reference potential <b>VR</b>_<b>1</b>, or when the potential of the transmission line path <b>30</b> becomes less than the reference potential <b>VR</b>_<b>2</b>, the output impedance of the driver <b>10</b> is set to 'H' (time period <b>T</b>_<b>4</b>). This is because when the potential of the transmission line path <b>30</b> becomes greater than the reference potential <b>VR</b>_<b>1</b>, or when the potential of the transmission line path <b>30</b> becomes less than the reference potential <b>VR</b>_<b>2</b>, the transistors <b>71p</b> and <b>71n</b> of the output buffer <b>12</b> both are switched OFF. For this reason, the potential of the transmission line path <b>30</b> transits toward the terminal potential V_term, so that the potential of the transmission line path <b>30</b> becomes less than the potential (V_term+V_f) or greater than the potential (V_term-V_f). As a result, the impedance value of the variable impedance element <b>40</b> is set to 'H' (time period <b>T</b>_<b>5</b>).

0068In the time period <b>T</b>_<b>5</b>, the output impedance of the driver <b>10</b> and the impedance value of the variable impedance element <b>40</b> both are set to 'H'. For this reason, a direct current flowing between the driver <b>10</b> and the variable impedance element <b>40</b> can be removed.

0069Note that when the reference potential <b>VR</b>_<b>1</b> is set to be equal to the potential (V_term+V_f) and the reference potential <b>VR</b>_<b>2</b> is set to be equal to the potential (V_term-V_f), the output impedance of the driver <b>10</b> changes from 'L' to 'H' while the impedance value of the variable impedance element <b>40</b> changes from 'H' to 'L'.

0070The same applies to the case where data on the transmission line path <b>30</b> transits from the HIGH level to the LOW level (time periods <b>T</b>_<b>6</b> to <b>T</b>_<b>9</b>).

0071As described above, the impedance value of the variable impedance element <b>40</b> and the output impedance of the driver <b>10</b> vary in association with each other.

0072According to the data transmission device <b>1a</b>, a direct current flowing between the driver <b>10</b> and the variable impedance element <b>40</b> can be removed. Even when such a direct current is removed, the logic level of data on the transmission line path <b>30</b> can be held. This plays a role in a reduction in power consumption in a time period of no data transition.

0073For example, a probability of data transition is about 10% in the CPU of a computer. Therefore, the effect of the low power consumption is more significant in a time period of no data transition than in a time period of data transition.

0074For example, data having an amplitude of 1 V is transmitted at a frequency of 500 MHz using the conventional data transmission device <b>200</b> shown in Figure <b>11</b>. In this case, a current consumed by the conventional data transmission device <b>200</b> is as follows. Note that it is assumed that the capacitance of the transmission line path <b>230</b> is 20 pF, and a direct current flowing through the terminator resistor <b>240</b> is 8 mA. <ul id="ul0002" list-style="none" compact="compact"><li>i) alternating current: 1 V×20 pF×500 MHz×10% (transition probability) = 1 mA</li><li>ii) direct current: 8 mA×90% (non-transition probability) = 7.2 mA</li></ul>

0075As described above, a direct current component is predominantly consumed in the fast-speed data transmission where the amplitude of data is limited. Therefore, the removal of this direct current component largely contributes to a reduction in power consumption.

0076Figure <b>4A</b> shows a configuration of a data transmission device <b>1b</b> according Example 1 of the present invention.

0077The data transmission device <b>1b</b> includes a variable impedance element <b>42</b> having a variable impedance controlled according to a control signal. One terminal <b>42a</b> of the variable impedance element <b>42</b> is connected to an end on a receiver <b>20</b> side of a transmission line path <b>30</b>. The other terminal <b>42b</b> of the variable impedance element <b>42</b> is connected to a terminator potential V_term.

0078The impedance value of the variable impedance element <b>42</b> is changed according to control signals CTL₁ and CTL₂ input from the outside of the variable impedance element <b>42</b>. The control signal CTL₁ is input to the variable impedance element <b>42</b> from a driver <b>10</b>. The control signal CTL₂ is input to the variable impedance element <b>42</b> from a receiver <b>20</b>.

0079The driver <b>10</b> includes an output buffer (DB) <b>12</b> for outputting data onto the transmission line path <b>30</b>. The receiver <b>20</b> includes an input buffer (RB) <b>22</b> for receiving data from the transmission line path <b>30</b>.

0080The output buffer <b>12</b> controls the variable impedance element <b>42</b> so that the fast-speed data transmission and the low power consumption are optimized. For example, before outputting data onto the transmission line path <b>30</b>, the output buffer <b>12</b> controls the variable impedance element <b>42</b> in such a manner that the impedance value of the variable impedance element <b>42</b> is decreased. For example, the impedance value of the variable impedance element <b>42</b> is controlled in such a manner as to be in agreement with the characteristic impedance of the transmission line path <b>30</b>. These controls are carried out using the control signal CTL₁. This makes it possible to transmit data at a high speed. Thereafter, when the data transmission is completed, the output buffer <b>12</b> controls the variable impedance element <b>42</b> so as to increase the impedance value of the variable impedance element <b>42</b>. This prevents a direct current from flowing between the variable impedance element <b>42</b> and the driver <b>10</b>. As a result, power consumption by the data transmission device <b>1b</b> is decreased.

0081Note that the output buffer <b>12</b> is preferably controlled in such a manner that when the impedance value of the variable impedance element <b>42</b> is high, the output impedance of the driver <b>10</b> is high; and when the impedance value of the variable impedance element <b>42</b> is low, the output impedance of the driver <b>10</b> is low.

0082Alternatively, instead of using the output buffer <b>12</b>, the input buffer <b>22</b> may control the impedance value of the variable impedance element <b>42</b>. For example, when the input buffer <b>22</b> is in a standby state where the buffer <b>22</b> can receive data from the transmission line path <b>30</b>, the input buffer <b>22</b> controls the variable impedance element <b>42</b> in such a manner as to decrease the impedance value of the variable impedance element <b>42</b>. Such a control is carried out using the control signal CTL₂. Thereafter, when the data transmission is completed, the input buffer <b>22</b> controls the variable impedance element <b>42</b> in such a manner as to increase the impedance value of the variable impedance element <b>42</b>. This prevents a direct current from flowing between the variable impedance element <b>42</b> and the driver <b>10</b>. As a result, power consumption by the data transmission device <b>1b</b> is decreased.

0083Note that the output buffer <b>12</b> is preferably controlled in such a manner that when the impedance value of the variable impedance element <b>42</b> is high, the output impedance of the driver <b>10</b> is high; and when the impedance value of the variable impedance element <b>42</b> is low, the output impedance of the driver <b>10</b> is low. Such a control is, for example, carried out by supplying a control signal CTL₃ into the output buffer <b>12</b> from the input buffer <b>22</b>.

0084As described above, in the data transmission device <b>1b</b>, the impedance value of the variable impedance element <b>42</b> and the output impedance of the driver <b>10</b> are controlled depending on whether data is being transmitted or not. Alternatively, the impedance value of the variable impedance element <b>42</b> and the output impedance of the driver <b>10</b> may be controlled in a way as shown in Figure <b>3</b>. In the control shown in Figure <b>3</b>, the state where data is being transmitted is divided into sub states so that the impedance value of the variable impedance element <b>42</b> and the output impedance of the driver <b>10</b> are more suitably controlled during transmission of data.

0085Figure <b>5A</b> shows a configuration of a variable impedance element <b>42</b>. The variable impedance element <b>42</b> includes resistors <b>R</b>_<b>1</b> to <b>R</b>_<b>4</b> which are connected in series to each other between a terminal <b>42a</b> and a terminal <b>42b</b> and switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> and <b>SW'</b>_<b>1</b> to <b>SW'</b>_<b>4</b> which are provided for bypass, corresponding to <b>R</b>_<b>1</b> to <b>R</b>_<b>4</b>, respectively.

0086The ON-OFF for the switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> is controlled With the control signal CTL₁. The ON-OFF for the switches <b>SW'</b>_<b>1</b> to <b>SW'</b>_<b>4</b> is controlled with the control signal CTL₂. When the switches <b>SW'</b>_<b>1</b> to <b>SW'</b>_<b>4</b> are all in the OFF state, the impedance value of the variable impedance element <b>42</b> can be changed in four levels by switching ON or OFF the switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> according to the control signal CTL₁. When the switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> are all in the OFF state, the impedance value of the variable impedance element <b>42</b> can be changed in four levels by switching ON or OFF the switches <b>SW'</b>_<b>1</b> to <b>SW'</b>_<b>4</b> according to the control signal CTL₂.

0087Figure <b>4B</b> shows a data transmission device <b>1c</b> according to Example 1 of the present invention. The data transmission device <b>1c</b> includes a controller <b>50</b> for controlling a variable impedance element <b>44</b> in such a manner that the impedance value of the variable impedance element <b>44</b> can be changed.

0088A CPU <b>60</b> provides the controller <b>50</b> with information indicating an operating speed of the CPU <b>60</b>. The information indicating an operating speed of the CPU <b>60</b> is, for example, information indicating an operating mode of the CPU <b>60</b> (e.g., a normal operating mode, a low-power-consumption operating mode, and the like). Alternatively, the information indicating an operating speed of the CPU <b>60</b> may be information indicating an operating clock frequency.

0089The controller <b>50</b> determines based on the information provided by the CPU <b>60</b> whether the CPU <b>60</b> is operated at a high speed or not.

0090When the CPU <b>60</b> is operated at a high speed, the controller <b>50</b> controls the variable impedance element <b>44</b> in such a manner as to decrease the impedance value of the variable impedance element <b>44</b>. Such a control of the variable impedance element <b>44</b> is carried out using a control signal CTL₅. The decreased impedance of the variable impedance element <b>44</b> allows high-speed data transmission.

0091On the other hand, when the CPU <b>60</b> is operated at a low speed, the controller <b>50</b> controls the variable impedance element <b>44</b> in such a manner as to increase the impedance value of the variable impedance element <b>44</b>. Such a control of the variable impedance element <b>44</b> is carried out using the control signal CTL₅. The increased impedance of the variable impedance element <b>44</b> prevents a direct current from flowing between the variable impedance element <b>44</b> and the driver <b>10</b>. As a result, power consumption by the data transmission device <b>1c</b> is reduced.

0092Thus, both high-speed data transmission and low power consumption can be achieved at a system level by adjusting the impedance value of the variable impedance element <b>44</b> according to the operating speed of the CPU <b>60</b>.

0093Further, when the CPU <b>60</b> is operated at a high speed, the controller <b>50</b> preferably controls the output buffer <b>12</b> in such a manner that the output impedance of the driver <b>10</b> is decreased. Such a control of the output buffer <b>12</b> is carried out using the control signal CTL₄. The decreased output impedance of the driver <b>10</b> allows high-speed data transmission. When the CPU <b>60</b> is operated at a low speed, the controller <b>50</b> preferably controls the output buffer <b>12</b> in such a manner that the output impedance of the driver <b>10</b> is increased. Such a control of the output buffer <b>12</b> is carried out using the control signal CTL₄. The increased output impedance of the driver <b>10</b> prevents a direct current from flowing between the variable impedance element <b>44</b> and the driver <b>10</b>. As a result, power consumption by the data transmission device <b>1c</b> is reduced.

0094Figure <b>5B</b> shows a configuration of a variable impedance element <b>44</b>. The variable impedance element <b>44</b> includes resistors <b>R</b>_<b>1</b> to <b>R</b>_<b>4</b> which are connected in series to each other between a terminal <b>44a</b> and a terminal <b>44b</b> and switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> which are provided for bypass, corresponding to <b>R</b>_<b>1</b> to <b>R</b>_<b>4</b>, respectively.

0095The ON-OFF for the switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> is controlled with the control signal CTL₅. The impedance value of the variable impedance element <b>44</b> can be changed in four levels by switching ON or OFF the switches <b>SW</b>_<b>1</b> to <b>SW</b>_<b>4</b> according to the control signal CTL₅.

0096Figure <b>6</b> shows a configuration of an output buffer <b>12a</b> of the driver <b>10</b>. The output buffer <b>12</b> (Figure <b>1</b>) can be replaced with the output buffer <b>12a</b>.

0097The output buffer <b>12a</b> includes a push-pull transistor for outputting data onto the transmission line path <b>30</b>. The push-pull transistor includes two sets of transistors having different mites. Specifically, the output buffer <b>12a</b> includes a set of a PMOS transistor <b>91p</b> and an NMOS transistor <b>91n</b> having large sizes, and a set of a PMOS transistor <b>92p</b> and an NMOS transistor <b>92n</b> having small sizes.

0098The gates of the transistors <b>91p</b> and <b>91n</b> receive predetermined logic values determined by a NAND element <b>73</b>, a NOR element <b>74</b>, and operational amplifiers <b>75</b> and <b>76</b>. The operational amplifier <b>75</b> receives the potential of the transmission line path <b>30</b> and a reference potential <b>VR</b>_<b>1</b>. The operational amplifier <b>76</b> receives the potential of the transmission line path <b>30</b> and a reference potential <b>VR</b>_<b>2</b>.

0099The gates of the transistors <b>92p</b> and <b>92n</b> receives the output of an inverter <b>78</b>. The inverter <b>78</b> receives data Data.

0100In transition of data on the transmission line path <b>30</b>, the output buffer <b>12a</b> switches ON either of the transistors <b>91p</b> and <b>92p</b> or the transistors <b>91n</b> and <b>92n</b> according to the value of data to be transmitted. This allows the potential of the transmission line path <b>30</b> to change at a high speed.

0101When the potential of the transmission line path <b>30</b> becomes more than the reference potential <b>VR</b>_<b>1</b>, the transistor <b>91p</b> is switched OFF. The transistor <b>92p</b> remains ON. When the potential of the transmission line path <b>30</b> becomes less than the reference potential <b>VR</b>_<b>2</b>, the transistor <b>91n</b> is switched OFF. The transistor <b>92n</b> remains ON.

0102Such a control allows a micro amount of direct current to flow through the transmission line path <b>30</b> via the transistors <b>92p</b> and <b>92n</b> during no transition of data.

0103The transistors <b>92p</b> and <b>92n</b> and the diodes <b>81</b> and <b>82</b> actively maintain the potential of the transmission line path <b>30</b> at the potential (V_term+V_f) or (V_term-V_f). As a result, an improved characteristic is obtained where data is lesser influenced by noise.

0104Figure <b>7A</b> shows a configuration of a variable impedance element <b>46</b>. Figure <b>7B</b> shows a configuration of a variable impedance element <b>48</b>. The variable impedance element <b>44</b> (Figure 1) can be replaced with the variable impedance element <b>46</b> or <b>48</b>.

0105The variable impedance element <b>46</b> includes a resistor <b>93</b> connected in series to the diodes <b>81</b> and <b>82</b> connected in parallel. One end of the resistor <b>93</b> is connected to the terminal potential V_term. The other end of the resistor <b>93</b> is connected via the diodes <b>81</b> and <b>82</b> to the transmission line path <b>30</b>.

0106The variable impedance element <b>48</b> includes a resistor <b>94</b> connected in series to the diodes <b>81</b> and <b>82</b> connected in parallel. One end of the resistor <b>94</b> is connected via the diodes <b>81</b> and <b>82</b> to the terminal potential V_term. The other end of the resistor <b>94</b> is connected to the transmission line path <b>30</b>.

0107The variable impedance elements <b>46</b> and <b>48</b> have extremely high impedances before one of the diodes <b>81</b> and <b>82</b> is biased in the forward direction. When one of the diodes <b>81</b> and <b>82</b> is biased in the forward direction, the variable impedance element <b>46</b> has an impedance substantially equal to the impedance of the resistor <b>93</b> and the variable impedance element <b>48</b> has an impedance substantially equal to the impedance of the resistor <b>94</b>.

0108Thus, the impedances of the variable impedance elements <b>46</b> and <b>48</b> after the diodes <b>81</b> or <b>82</b> have been biased in the forward direction becomes higher as compared with the impedance value of the variable impedance element <b>44</b> (Figure <b>1</b>). Therefore, it is possible to reduce the peak value of a current into the driver <b>10</b> when the diode <b>81</b> or <b>82</b> is biased in the forward direction.

0109Further, the resistors <b>93</b> and <b>94</b> each preferably have a resistance equal to the characteristic impedance Z of the transmission line path <b>30</b>. This prevents reflection from occurring at an end on the receiver <b>20</b> side of the transmission line path <b>30</b>.

0110Further, the forward voltage V_f of the diodes <b>81</b> and <b>82</b> is substantially in agreement with an amplitude of the potential of the transmission line path <b>30</b> from the terminal potential V_term, the amplitude being generated when the driver <b>10</b> outputs HIGH-level data, and with an amplitude of the potential of the transmission line path <b>30</b> from the terminal potential V_term, the amplitude being generated when the driver <b>10</b> outputs LOW-level data.

0111Assume, for example, that the impedance of the transmission line path <b>30</b> and the impedances of the resistors <b>93</b> and <b>94</b> both are 50 ohm, the terminal potential V_term is 1.1 V, and the output impedance of the driver <b>10</b> is 50 ohm. In this case, when the driver <b>10</b> outputs HIGH-level data, the potential of the transmission line path <b>30</b> is 1.65 V. When the driver <b>10</b> outputs LOW-level data, the potential of the transmission line path <b>30</b> is 0.55 V. Since the amplitude of data from the terminal potential V_term is 0.55 V, the forward direction voltage V_f of the diodes <b>81</b> and <b>82</b> is preferably set to 0.55 V.

(Example 2)

0112Figure <b>8A</b> shows a configuration of a data transmission device <b>2a</b> according to Example 2 of the present invention. The data transmission device <b>2a</b> performs data transmission in a so-called differential mode.

0113The data transmission device <b>2a</b> includes a driver <b>110</b> for sending data, a receiver <b>120</b> for receiving the data sent from the driver <b>110</b>, and transmission line paths <b>130</b> and <b>131</b> connecting between the driver <b>110</b> and the receiver <b>120</b>. Positive-logic data is transmitted from the driver <b>110</b> to the receiver <b>120</b> via the transmission line path <b>130</b>. Negative-logic data is transmitted from the driver <b>110</b> to the receiver <b>120</b> via the transmission line path <b>131</b>.

0114The data transmission device <b>2a</b> further includes a variable impedance element <b>140</b> the impedance of which is automatically changed according to the potential of the transmission line path <b>130</b>, and a variable impedance element <b>141</b> the impedance of which is automatically changed according to the potential of the transmission line path <b>131</b>. The variable impedance element <b>140</b> is connected to an end on the receiver <b>120</b> side of the transmission line path <b>130</b>. The variable impedance element <b>141</b> is connected to an end on the receiver <b>120</b> side of the transmission line path <b>131</b>.

0115The variable impedance element <b>140</b> includes diodes <b>181</b> and <b>182</b>. The anode of the diode <b>181</b> is connected via the resistor <b>191</b> to the terminal potential V_term1. The cathode of the diode <b>181</b> is connected to the transmission line path <b>130</b>. The anode of the diode <b>182</b> is connected to the transmission line path <b>130</b>. The cathode of the diode <b>182</b> is connected via the resistor <b>192</b> to ground V_SS.

0116Note that the resistors <b>191</b> and <b>192</b> can be omitted. When the resistor <b>191</b> is omitted, the anode of the diode <b>181</b> is connected to the terminal potential V_term1. When the resistor <b>192</b> is omitted, the cathode of the diode <b>182</b> is connected to ground V_SS.

0117The variable impedance element <b>141</b> includes diodes <b>183</b> and <b>184</b>. The anode of the diode <b>183</b> is connected via the resistor <b>193</b> to the terminal potential V_term2. The cathode of the diode <b>183</b> is connected to the transmission line path <b>131</b>. The anode of the diode <b>184</b> is connected to the transmission line path <b>131</b>. The cathode of the diode <b>184</b> is connected via the resistor <b>194</b> to ground V_SS.

0118Note that the resistors <b>193</b> and <b>194</b> can be omitted. When the resistor <b>193</b> is omitted, the anode of the diode <b>183</b> is connected to the terminal potential V_term2. When the resistor <b>194</b> is omitted, the cathode of the diode <b>184</b> is connected to ground V_SS.

0119The driver <b>110</b> includes an output buffer (DBT) <b>112</b> for outputting data onto the transmission line path <b>130</b> and an output buffer (DBC) <b>113</b> for outputting data onto the transmission line path <b>131</b>. The output buffer <b>112</b> is connected via a pad <b>114</b> to the transmission line path <b>130</b>. The output buffer <b>113</b> is connected via a pad <b>115</b> to the transmission line path <b>131</b>.

0120The receiver <b>120</b> includes an input buffer <b>122</b> for receiving data from the transmission line paths <b>130</b> and <b>131</b>. The input buffer <b>122</b> is, for example, an operational amplifier having two inputs.

0121One of the inputs of the input buffer <b>122</b> is connected via a pad <b>124</b> and a stub resistor <b>132</b> to the transmission line path <b>130</b>. The other of the inputs of the input buffer <b>122</b> is connected via a pad <b>125</b> and a stub resistor <b>133</b> to the transmission line path <b>131</b>.

0122The variable impedance element <b>140</b> is designed to satisfy a condition such that the sum of the forward direction voltages V_f of the diodes <b>181</b> and <b>182</b> is greater than the potential difference between the terminal potential V_term1 and the ground V_SS. The variable impedance element <b>141</b> is designed to satisfy a condition such that the sum of the forward direction voltages V_f of the diodes <b>183</b> and <b>184</b> is greater than the potential difference between the terminal potential V_term2 and the ground V_SS. For example, the above-described conditions are satisfied when the terminal potentials V_term1 and V_term2 each are 1.5 V, and the forward direction voltages V_f of the diodes <b>181</b> to <b>184</b> each are 1.0 V.

0123The satisfaction of the above-described conditions prevents a direct current from flowing through the terminal potentials V_term1 and V_term2 to the ground V_SS when the outputs of the drivers <b>110</b>, and the transmission line paths <b>130</b> and <b>131</b> are floating.

0124Figure <b>8B</b> shows the impedance characteristics of the diodes <b>181</b> to <b>184</b>. In an example shown in Figure <b>8B</b>, it is assumed <maths id="math0001"><math display="inline"><mrow><msub><mrow><mtext>V</mtext></mrow><mrow><mtext>DD</mtext></mrow></msub><msub><mrow><mtext>=V</mtext></mrow><mrow><mtext>term1</mtext></mrow></msub><msub><mrow><mtext>=V</mtext></mrow><mrow><mtext>term2</mtext></mrow></msub></mrow></math><img file="EP1014584A1_D0001.tif" /></maths>. Alternatively, the potential V_term1 may differ from the potential V_term2.

0125When the potential of the transmission line path <b>130</b> is between the potential (V_SS+V_f) and the potential (V_term1-V_f), the characteristics of both diodes <b>181</b> and <b>182</b> connected to the transmission line path <b>130</b> are both in a high impedance region (see Figure <b>8B</b>). Therefore, in this case, the variable impedance element <b>140</b> has an extremely high impedance. As a result, data on the transmission line path <b>130</b> transits at a constant high speed.

0126When the potential of the transmission line path <b>130</b> is higher than the potential (V_SS+V_f), the characteristic of the diode <b>182</b> is in a low impedance region (see Figure <b>8B</b>). When the potential of the transmission line path <b>130</b> is lower than the potential (V_term1-V_f) , the characteristic of the diode <b>181</b> is in a low impedance region (see Figure <b>8B</b>).

0127As described above, when the potential of the transmission line path <b>130</b> is higher than the potential. (V_SS+V_f), or when the potential of the transmission line path <b>130</b> is lower than the potential (V_term1-V_f), the characteristic of either the diode <b>181</b> or <b>182</b> is in a low impedance region. Therefore, in this case, the variable impedance element <b>140</b> has an extremely low impedance around the terminal potential V_term1 or the ground V_SS. This is because the diode <b>181</b> or <b>182</b> is biased in the forward direction.

0128As a result, a potential (Hi-potential) indicating that data on the transmission line path <b>130</b> is at the HIGH level is clamped around the potential (V_SS+V_f). A potential (Lo-potential) indicating that data on the transmission line path <b>130</b> is at the LOW level is clamped around the potential (V_term1-V_f). This restricts the amplitude of data.

0129For example, when <maths id="math0002"><math display="inline"><mrow><msub><mrow><mtext>(V</mtext></mrow><mrow><mtext>SS</mtext></mrow></msub><msub><mrow><mtext>+V</mtext></mrow><mrow><mtext>f</mtext></mrow></msub><mtext>)=1.0 V</mtext></mrow></math><img file="EP1014584A1_D0002.tif" /></maths> and <maths id="math0003"><math display="inline"><mrow><msub><mrow><mtext>(V</mtext></mrow><mrow><mtext>term1</mtext></mrow></msub><msub><mrow><mtext>-V</mtext></mrow><mrow><mtext>f</mtext></mrow></msub><mtext>)=0.5 V</mtext></mrow></math><img file="EP1014584A1_D0003.tif" /></maths>, a data amplitude is 0.5 V. Thus, data having such a small amplitude of 0.5 V can be transmitted.

0130Note that the Hi-potential and Lo-potential of the transmission line path <b>130</b> are determined by the resistors <b>191</b> and <b>192</b> and the output impedance of the output buffer <b>112</b>. For example, the Hi-potential and Lo-potential of the transmission line path <b>130</b> can be sat to 1.0 V and 0.5 V, respectively, by adjusting the output impedance of the output buffer <b>112</b>.

0131Thus, the impedance value of the variable impedance element <b>140</b> is changed according to the potential of the transmission line path <b>130</b>. Similarly, the impedance value of the variable impedance element <b>141</b> is changed according to the potential of the transmission line path <b>131</b>.

0132Note that in order to prevent data reflection, the resistances of the resistors <b>191</b> to <b>194</b> are preferably equal to the characteristic impedances of the transmission line paths <b>130</b> and <b>131</b>.

0133Further, by increasing the output impedance of the output buffer <b>112</b> after the potential of the transmission line path <b>130</b> becomes greater than the potential (V_SS+V_f) or less than the potential (V_term1-V_f), a direct current consumed by the driver <b>110</b> may be significantly removed.

0134Similarly, by increasing the output impedance of the output buffer <b>113</b> after the potential of the transmission flue path <b>131</b> becomes greater than the potential (V_SS+V_f) or less than the potential (V_term2-V_f), a direct current consumed by the driver <b>110</b> may be significantly removed.

0135Figure <b>9</b> shows a configuration of a data transmission device <b>2b</b> according to Example 2 of the present invention. The data transmission device <b>2b</b> performs data transmission in a so-called differential mode.

0136The data transmission device <b>2b</b> includes a variable impedance element <b>142</b>. An end <b>142a</b> of the variable impedance element <b>142</b> is connected to the transmission line path <b>130</b>. The other end <b>142b</b> of the variable impedance element <b>142</b> is connected to the transmission line path <b>131</b>.

0137The variable impedance element <b>142</b> includes diodes <b>185</b> and <b>186</b> connected in parallel and a resistor <b>195</b>. The configuration of the variable impedance element <b>142</b> is similar to that of the variable impedance element <b>46</b> shown in Figure <b>7A</b>. The variable impedance element <b>142</b> can be replaced with the variable impedance element <b>40</b> (Figure <b>1</b>) or the variable impedance element <b>48</b> (Figure <b>7B</b>).

0138In the data transmission device <b>2b</b>, output buffers <b>112</b> and <b>113</b> can monitor both the potentials of the transmission line paths <b>130</b> and <b>131</b>. The output impedances of the output buffers <b>112</b> and <b>113</b> are set to high values after the potential difference between the potentials of the transmission line paths <b>130</b> and <b>131</b> becomes greater than the forward voltage V_f of the diodes <b>185</b> and <b>186</b>. Therefore, a direct current consumed by the driver <b>110</b> is significantly removed.

0139In Examples 1 and 2, it is described that data is transmitted from one driver to one receiver (so-called point-to-point data transmission. This invention is not limited to the point-to-point data transmission). For example, this invention can be applied to the case as shown in Figure <b>10</b> where data is transmitted from one driver to a plurality of receivers via a transmission line path. In this case, the above-described variable impedance element is provided at an end of the transmission line path.

INDUSTRIAL APPLICABILITY

0140As described above, a data transmission device according to the present invention can prevent a direct current from flowing through a transmission line path, thereby reducing power consumption. The data transmission device of the present invention can prevent occurrence of skew when data is latched using a clock signal, resulting in high-speed data transmission.