Manufacturing method of semiconductor device with an epitaxial semiconductor substrate and of a solid-state imaging device
Abstract
Quality of epitaxial semiconductor substrates (7) treated by carbon gettering is evaluated precisely and quickly to use only good-quality ones for manufacturing good-property semiconductor devices, such as solid- state imaging devices. After carbon implanted regions (4) and carbon non-implanted regions (5) are made along the surface of a Si substrate (1) by selectively ion-implanting carbon, a Si epitaxial layer (6) is grown on the surface (1a) of the Si substrate (1) to obtain a Si epitaxial substrate (7). Recombination lifetime or surface photo voltage is measured at a portion of the Si epitaxial layer (6) located above the carbon non-implanted region (5), and the result is used to evaluate acceptability of the Si epitaxial substrate (7). Thus, strictly selected good-quality Si epitaxial substrates (7) alone are used to manufacture solid-state imaging devices or other semiconductor devices.

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18 claims: 4 independent, 14 dependent
- 1An epitaxial semiconductor substrate having formed an epitaxial layer (6) in which carbon is ion- implanted along a major surface (1a) of a semiconductor substrate (1), and an epitaxial layer (6) made of a semiconductor is stacked on said major surface (1a) of the semiconductor substrate (1), comprising:a carbon non-implanted region (5) provided at least in one portion along said major surface (1a) of said semiconductor substrate (1).
- 5A method for manufacturing an epitaxial semiconductor substrate (7) configured to first ion-implant carbon along a major surface (1a) of a semiconductor substrate (1) and thereafter stack an epitaxial layer (6) made of a semiconductor on said major surface (1a) of said semiconductor substrate (1), characterized in:ion implanting carbon along said major surface (1a) of said semiconductor substrate while making a carbon non-implanted region (5) at least in one location.
- 9A method for manufacturing a semiconductor device configured to manufacture the semiconductor device by using an epitaxial semiconductor substrate (7) made by first ion-implanting carbon along a major surface (1a) of a semiconductor substrate (1) and thereafter stacking an epitaxial layer (6) made of a semiconductor on said major surface (1a) of said semiconductor substrate (1), characterized in:ion-implanting carbon along the major surface (1a) of said semiconductor substrate (1) while making a carbon non-implanted region (5) at least in one location, then making said epitaxial layer (6) on the major surface (1a) of said semiconductor substrate (1), thereafter measuring recombination lifetime or surface photo voltage of a part of said epitaxial layer (6) located above said carbon non-implanted region (5), using the result thereof to evaluate acceptability of said epitaxial semiconductor substrate (7), and manufacturing the semiconductor device by using said epitaxial semiconductor substrate (7) evaluated to be good.
- 14A method for manufacturing a solid-state imaging device configured to manufacture the solid- state imaging device by using an epitaxial semiconductor substrate (7) made by first ion-implanting carbon along a major surface (1a) of a semiconductor substrate (1) and thereafter stacking an epitaxial layer (6) made of a semiconductor on said major surface of said semiconductor substrate, characterized in:ion-implanting carbon along the major surface (1a) of said semiconductor substrate (1) while making a carbon non-implanted region (5) at least in one location, then making said epitaxial layer (6) on the major surface (1a) of said semiconductor substrate (1), thereafter measuring recombination lifetime or surface photo voltage of a part of said epitaxial layer (6) located above said carbon non-implanted region (5), using the result thereof to evaluate acceptability of said epitaxial semiconductor substrate (7), and manufacturing the solid-state imaging device by using said epitaxial semiconductor substrate (7) evaluated to be good.
Independent claims4
60 paragraphs in 4 sections, as filed
BACKGROUND OF THE INVENTION
<u>Field of the Invention</u>
0001This invention relates to an epitaxial semiconductor substrate, manufacturing method thereof, manufacturing method of a semiconductor device and manufacturing method of a solid-state imaging device.
<u>Description of the Related Art</u>
0002As semiconductor substrates for manufacturing semiconductor devices, CZ substrates grown by CZ (Czochralski) method, MCZ substrates grown by MCZ (magnetic field Czochralski) method, and epitaxial substrates having epitaxial layers made on those substrates are often used generally.
0003As semiconductor substrates for solid-state imaging devices, epitaxial substrates and MCZ substrates are mainly used to reduce uneven image contrast caused by uneven dopant concentration, i.e., striation. Among them, epitaxial substrates can be made to include a low-resistance region (buried region or low-resistance substrate) under epitaxial layers for forming a device, they are effective for progressing low-voltage driving and low power consumption of solid-state imaging devices. Therefore, their wider use is still expected.
0004For manufacturing silicon (Si) epitaxial substrates, chemical vapor deposition (CVD) is currently used as a practical method, and four kinds of source gases are mainly used therefor. That is, hydrogen reduction process uses SiCl<sub>4</sub> or SiHCl<sub>3</sub>, and reaction occurring there is expressed as follows. <maths id="math0001"><math display="block"><mrow><msub><mrow><mtext>SiCl</mtext></mrow><mrow><mtext>4</mtext></mrow></msub><msub><mrow><mtext> ... SiCl</mtext></mrow><mrow><mtext>4</mtext></mrow></msub><msub><mrow><mtext>+</mtext></mrow><mrow><mtext>2H2</mtext></mrow></msub><mtext> → Si+4HCl</mtext></mrow></math><img file="EP0949689A2_D0001.tif" /></maths><maths id="math0002"><math display="block"><mrow><msub><mrow><mtext>SiHCl</mtext></mrow><mrow><mtext>3</mtext></mrow></msub><msub><mrow><mtext> ... SiHCl</mtext></mrow><mrow><mtext>3</mtext></mrow></msub><msub><mrow><mtext>+H</mtext></mrow><mrow><mtext>2</mtext></mrow></msub><mtext> → Si+3HCl</mtext></mrow></math><img file="EP0949689A2_D0002.tif" /></maths>Thermal decomposition method uses SiH<sub>2</sub>CI<sub>2</sub> or SiH<sub>4</sub>, and reaction occurring there is expressed as follows. <maths id="math0003"><math display="block"><mrow><msub><mrow><mtext>SiH</mtext></mrow><mrow><mtext>2</mtext></mrow></msub><msub><mrow><mtext>Cl</mtext></mrow><mrow><mtext>2</mtext></mrow></msub><msub><mrow><mtext> ... SiH</mtext></mrow><mrow><mtext>2</mtext></mrow></msub><msub><mrow><mtext>Cl</mtext></mrow><mrow><mtext>2</mtext></mrow></msub><mtext> → Si+2HCl</mtext></mrow></math><img file="EP0949689A2_D0003.tif" /></maths><maths id="math0004"><math display="block"><mrow><msub><mrow><mtext>SiH</mtext></mrow><mrow><mtext>4</mtext></mrow></msub><msub><mrow><mtext> ... SiH</mtext></mrow><mrow><mtext>4</mtext></mrow></msub><msub><mrow><mtext> → Si+2H</mtext></mrow><mrow><mtext>2</mtext></mrow></msub></mrow></math><img file="EP0949689A2_D0004.tif" /></maths>
0005Among these four kinds of source gases, SiHCl<sub>3</sub> is inexpensive, grows fast, and is suitable for growth of a thick epitaxial layer. And it is most used for manufacturing Si epitaxial substrates for solid-state imaging devices.
0006However, whichever one of those source gases is used, Si epitaxial substrates contain much impurity, especially metal impurity such as heavy metal impurity, which undesirably mixes in during deposition of the epitaxial layer. Therefore, so-called white defects due to a dark current of a solid-state imaging device cannot be reduced sufficiently, and this makes characteristics and the production yield bad.
0007Possible sources of metal impurities such as heavy metal impurities are stainless steel (SUS) members in a bell jar of an epitaxial growth apparatus and source material gas pipes, among others. It is assumed that, if a source gas contains a chlorine (Cl) gas, for example, it decomposes and produces HCI during growth, this corrodes stainless steel members to produce a chloride of a metal, the metal chloride is captured into the source gas, and the metal impurity is caught into the epitaxial layer. In some cases, HCI gas is intentionally introduced into a bell jar to lightly etch off the surface of a Si substrate prior to epitaxial growth of layers, and this is also a cause of corrosion of stainless steel members.
0008Therefore, when a Si epitaxial substrate is used to fabricate a solid-state imaging device, some gettering technique is necessary for removing metal impurities. As such gettering technique, there are, for example, intrinsic gettering for precipitating over-saturated oxygen in the Si substrate exclusively within the substrate and using it as the getter sink, and extrinsic gettering for making a polycrystalline Si film or a region doped with high-concentrated phosphorus (P) on the bottom surface of the Si substrate and utilizing a distortion stress caused thereby to make a getter sink. None of them, however, had sufficient ability as gettering method for Si epitaxial substrate, and could sufficiently reduce white defects of solid-state imaging devices.
0009Taking it into account, the Inventor previously proposed a method for manufacturing a Si epitaxial substrate by implanting carbon into one of surfaces of an Si substrate by a dose amount of 5x10<sup>13</sup>cm<sup>-2</sup> or higher and thereafter stacking an Si epitaxial layer thereon (Japanese Patent Laid-Open Publication No. hei 6-338507). According to the method, since a getter sink assumed to be a compound of carbon and oxygen in the substrate can powerfully getter metal impurities, etc. mixing into the epitaxial layer, white defects of solid-state imaging devices could be reduced to 1/5 as compared with Si epitaxial substrates made by using conventional gettering method.
0010To control impurities (especially metal impurities) mixing into epitaxial layers under growth, conventionally used were (1) a method for observing pits or crystal defects in epitaxial layers after growth, (2) a method for quantitatively measuring heavy metal impurities on the surface of an epitaxial layer or in a substrate bulk by atomic absorption spectrometry, inductively coupled plasma mass spectrometry (ICP-MS), neutron activation analysis, (3) a method for conducting electric measurement such as lifetime measurement on the entirety of an epitaxial substrate by microwaves, and so on.
0011Among these methods, control of impurities by microwave lifetime measurement needs no pre-treatment, and gets a result quickly and easily. Therefore, it is used widely. With regard to it, the Applicant also proposed a method for reducing white defects of solid- state imaging devices by using a Si epitaxial substrate having a lifetime whose ratio relative to the lifetime of the Si substrate before deposition of the epitaxial layer is larger than a predetermined value (Japanese Patent Laid-Open Publication No. hei 9-139408).
0012However, in the Si epitaxial substrate treated by carbon gettering, since the getter sink behaves as a center of electron-hole recombination, there is the problem that the measured lifetime does not reflect the amount of impurities mixing into the epitaxial layer under growth. To date, therefore, instead of measuring the life time of a Si epitaxial substrate treated by carbon gettering, the lifetime was measured from a monitor substrate prepared by forming the epitaxial layer on a Si substrate of the same batch but not treated by carbon gettering, and the result was used to evaluate the quality of the Si epitaxial substrate.
0013However, even among Si epitaxial substrate made in the same batch, a difference among the substrates is inevitable. Therefore, although there was a correlation to an extent between the lifetime measured from the monitor substrate and white defects of solid-state imaging devices manufactured by using Si epitaxial substrates treated by carbon gettering, the correlation was not satisfactory. It was therefore actually difficult to evaluate white defects of solid-state imaging devices, i.e., degree of impurity contamination of Si epitaxial substrates by heavy metal impurities, for example, and accurately know their acceptabiity from the result of measurement of lifetime using a monitor substrate. Furthermore, a wafer-by- wafer type has become the main current of epitaxial devices made by processing a semiconductor substrate as large as 8 inches or more in diameter, and the degree of impurity contamination varies from a sheet of the semiconductor substrate to another. Therefore, measurement of the lifetime using a monitor substrate has become almost meaningless.
0014Under the background, there is a strong demand for a technique which enables direct measurement of lifetime of a Si epitaxial substrate itself treated by carbon gettering, and can determine acceptability of the Si epitaxial substrate precisely and quickly.
OBJECTS AND SUMMARY OF THE INVENTION
0015It is therefore an object of the invention to provide an epitaxial semiconductor substrate and its manufacturing method which enables precise and quick determination of acceptability of the epitaxial semiconductor substrate treated by carbon gettering.
0016Another object of the invention is to provide a method for manufacturing a semiconductor device capable of precisely and quickly determining acceptability of an epitaxial semiconductor substrate treated by carbon gettering and to manufacture a good semiconductor device with a high yield by using a good epitaxial semiconductor substrate remarkably reduced in impurity contamination by heavy metal impurities, for example.
0017Another object of the invention is to provide a method for manufacturing a solid-state imaging device capable of precisely and quickly determining acceptability of an epitaxial semiconductor substrate treated by carbon gettering and to manufacture a good semiconductor device with a high yield by using a good epitaxial semiconductor substrate remarkably reduced in white defects.
0018According to the first aspect of the invention, there is provided an epitaxial semiconductor substrate having formed an epitaxial layer in which carbon is ion-implanted along a major surface of a semiconductor substrate, and an epitaxial layer made of a semiconductor is stacked on the major surface of the semiconductor substrate, comprising: a carbon non-implanted region provided at least in one portion along the major surface of the semiconductor substrate.
0019According to the second aspect of the invention, there is provided a method for manufacturing an epitaxial semiconductor substrate configured to first ion-implant carbon along a major surface of a semiconductor substrate and thereafter stack an epitaxial layer made of a semiconductor on the major surface of the semiconductor substrate, characterized in: ion implanting carbon along the major surface of the semiconductor substrate while making a carbon non-implanted region at least in one location.
0020According to the third aspect of the invention, there is provided a method for manufacturing a semiconductor device configured to manufacture the semiconductor device by using an epitaxial semiconductor substrate made by first ion-implanting carbon along a major surface of a semiconductor substrate and thereafter stacking an epitaxial layer made of a semiconductor on the major surface of the semiconductor substrate, characterized in: ion-implanting carbon along the major surface of the semiconductor substrate while making a carbon non-implanted region at least in one location, then making the epitaxial layer on the major surface of the semiconductor substrate, thereafter measuring recombination lifetime or surface photo voltage of a part of the epitaxial layer located above the carbon non-implanted region, using the result thereof to evaluate acceptability of the epitaxial semiconductor substrate, and manufacturing the semiconductor device by using the epitaxial semiconductor substrate evaluated to be good.
0021According to the fourth aspect of the invention, there is provided a method for manufacturing a solid-state imaging device configured to manufacture the solid-state imaging device by using an epitaxial semiconductor substrate made by first ion-implanting carbon along a major surface of a semiconductor substrate and thereafter stacking an epitaxial layer made of a semiconductor on the major surface of the semiconductor substrate, characterized in: ion-implanting carbon along the major surface of the semiconductor substrate while making a carbon non-implanted region at least in one location, then making the epitaxial layer on the major surface of the semiconductor substrate, thereafter measuring recombination lifetime or surface photo voltage of a part of the epitaxial layer located above the carbon non-implanted region, using the result thereof to evaluate acceptability of the epitaxial semiconductor substrate, and manufacturing the solid-state imaging device by using the epitaxial semiconductor substrate evaluated to be good.
0022In the present invention, from the viewpoint of obtaining sufficient gettering effect by carbon, the dose amount upon ion implantation of carbon into a major surface of the semiconductor substrate is usually not less than 5x10<sup>13</sup>cm<sup>-2</sup>, and preferably not less than 5x10<sup>13</sup>cm<sup>-2</sup> and not more than 5x10<sup>15</sup>cm<sup>-2</sup>. Basically, configuration and size of a region of the semiconductor substrate in which carbon is not yet implanted (carbon non-implanted region) can be determined freely as far as it is possible to measure recombination lifetime or surface photo voltage (SPV) in the carbon non-implanted region and the overlying part of the epitaxial layer. However, minimum width of the carbon non-implanted region must be larger at least than the recombination lifetime or mean free path in measurement of the surface photo voltage. Normally, it is not less than the thickness of the semiconductor substrate. The carbon non-implanted region may be as large as one chip for manufacturing a semiconductor device by using the epitaxial semiconductor substrate, for example.
0023Measurement of the recombination lifetime or the surface photo voltage is most excellent as a method for evaluating heavy metal impurities, for example, mixing in during growth of the epitaxial layer. Measurement of the surface photo voltage is attained by making a charge of the same sign with the majority carrier to adhere onto the surface to be measured, then intermittently irradiating thereon monochromatic light of an energy larger than the band gap energy of the substrate, and measuring changes in barrier height of the surface (-qΔV) due to the minority carrier generated thereby and moving toward and accumulating on the surface depletion layer. -qΔV is the SPV value. As the SPV method, there are a method of adjusting the amount of the irradiated light to make the SPV value constant (constant SPV method) and a method of measuring the SPV value while making the amount of irradiated light constant in the region exhibiting a linear relation between the SPV value and the amount of irradiated light (linear SPV method). The SPV method, in general, uses the diffusion length (L) of the minority carrier as the scale of cleanness of the substrate. The longer the diffusion length, the cleaner the substrate.
0024In the present invention, determination of acceptability of the epitaxial semiconductor substrate is attained, when using recombination lifetime measurement, typically by measuring recombination lifetime of the semiconductor substrate in the carbon non-implanted region (τ<sub>sub</sub>), also measuring the recombination lifetime of the epitaxial layer in the portion above the carbon non-implanted region (τ<sub>epi</sub>), and evaluating whether or not the ratio of the measured value of the recombination lifetime of the epitaxial layer above the carbon non-implanted region relative to the measured value of the recombination life time of the semiconductor substrate in the carbon non-implanted region (τ<sub>epi</sub>/τ<sub>sub</sub>) is larger than a predetermined value, preferably not smaller than 1/3, and more preferably not smaller than 2/3. For measuring the surface photo voltage, especially using linear SPV method, determination of acceptability of the epitaxial semiconductor substrate is attained by measuring diffusion length of the semiconductor substrate in the carbon non-implanted region (L<sub>sub</sub>), also measuring the diffusion length of the epitaxial layer in the portion above the carbon pre-implanted region (L<sub>epi</sub>), and evaluating whether or not the ratio of the measured value of the diffusion length of the epitaxial layer above the carbon non-implanted region relative to the measured value of the diffusion length of the semiconductor substrate in the carbon non-implanted region (L<sub>epi</sub>/L<sub>sub</sub>) is larger than a predetermined value, preferably not smaller than 1/3, and more preferably not smaller than 2/3. When using diffusion measurement by SPV method, determination of acceptability need not rely on the ratio of measured values of diffusion length (L<sub>epi</sub>/L<sub>sub</sub>), but may be based on whether or not L<sub>epi</sub> is larger than a predetermined value, suitably not less than 200 µm, and more preferably not less than 400 µm.
0025In the present invention, the solid-state imaging device may be an amplifying type solid-state imaging device or a CMOS solid-state imaging device instead of the CCD solid-state imaging device. The semiconductor device may be any one of various devices such as bipolar LSI, MOSLSI (such as DRAM) or bipolar CMOSLSI instead of those solid-state imaging devices.
0026In the present invention having the above- summarized construction, by using a location of the epitaxial layer above the carbon non-implanted region of the semiconductor substrate as the measured region, recombination lifetime or surface photo voltage reflecting the true amount of impurities mixed in during growth of the epitaxial layer can be measured directly from the epitaxial semiconductor substrate treated by carbon gettering, and acceptability of the epitaxial semiconductor substrate can be determined precisely and quickly on the basis of the result of the measurement. Then, by using the epitaxial semiconductor substrate evaluated to be good and remarkably reduced in impurity contamination such as heavy metal impurities to manufacture a semiconductor device such as a solid-state imaging device, the invention can ensure high-yield fabrication of a solid- state imaging device or other semiconductor device with remarkably reduced white defects and a good property.
0027The above, and other, objects, features and advantages of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
0028<ul id="ul0001" list-style="none" compact="compact"><li>Figs. 1 to 5 are cross-sectional views for explaning a method for manufacturing a Si epitaxial substrate according to the first embodiment of the invention;</li><li>Fig. 6 is a plan view of an example of the Si epitaxial substrate manufactured by the first embodiment;</li><li>Figs. 7 to 11 are cross-sectional views for explaning a method for manufacturing a CCD solid-state imaging device according to the second embodiment of the invention; and</li><li>Fig. 12 is a graph showing correlation between recombination lifetime measured on a Si epitaxial substrate in a location above a carbon non- implanted region and white defects of a CCD solid-state imaging device manufactured by using the Si epitaxial substrate.</li></ul>
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
0029Embodiments of the invention are explained below with reference to the drawings. In all of the drawings illustrating the embodiments, the same or equivalent elements or components are denoted by common reference numerals.
0030Figs. 1 through 5 show a manufacturing method of a Si epitaxial substrate according to the first embodiment of the invention.
0031In the first embodiment, first prepared is a (100)-oriented n-type CZ-Si substrate 1, for example, which is cut out from a single-crystalline Si ingot grown by CZ method and fabricated by mirror polishing, as shown in Fig. 1. Reference numeral 1a denotes a mirror surface. The CZ-Si substrate 1 is doped with P as an n- type impurity, and its resistivity is 8 to 12 Ωcm, for example, 10 Ωcm. Diameter of the CZ-Si substrate 1 is , for example, 5 inches.
0032After the CZ-Si substrate 1 is cleaned by RCA method, as shown in Fig. 2, it is thermally oxidized at 1000°C, for example, by dry oxidation, for example to form an oxide film 2 made of SiO<sub>2</sub> on the mirror surface 1a. Thickness of the oxide film 2 is, for example, 20 nm.
0033Next, as shown in Fig. 3, a resist pattern 3 opening at a portion corresponding to a region for implanting carbon ions is made on the oxide film 2 by lithography. After that, using the resist pattern 3 as a mask, carbon is ion-implanted into the CZ-Si substrate 1. For carbon ion implantation, acceleration energy of 150 keV and dope amount of 1x10<sup>15</sup>cm<sup>-2</sup> are used, for example. In this case, projected range (R<sub>p</sub>) of carbon is approximately 0.32 µm, and peak concentration of carbon is approximately 1x10<sup>19</sup>cm<sup>-3</sup>.
0034Then, the resist pattern 3 is removed, and the CZ-Si substrate 1 is cleaned by RCA method. After that, the CZ-Si substrate 1 is annealed in a nitrogen atmosphere, for example, at 1000°C, for example, for 10 minutes. As a result of annealing, a carbon implanted region 4 having its peak concentration at a position deeper than the mirror surface 1a of the CZ-Si substrate 1 and a carbon non-implanted region 5 are made as shown in Fig. 4. The reason why the carbon peak-concentrated position in the carbon implanted region 4 is deeper than the mirror surface 1a lies in the requirement for preventing deterioration of crystalline quality of an n<sup>-</sup>- type Si epitaxial layer 6 grown in the next step. Although the annealing is conducted in the nitrogen atmosphere after carbon ion implantation for the purpose of recovering the crystalline property of the CZ-Si substrate 1 near the mirror surface 1a, which is once changed to an amorphous phase by ion implantation, it may be omitted under certain implantation conditions.
0035After that, the oxide film 2 is removed by etching using an etchant which contains HF solution, for example. thereafter, as shown in Fig. 5C, the n<sup>-</sup>-type Si epitaxial layer 6 is grown at a temperature around 1120°C, for example, by CVD using SiHCl<sub>3</sub>, for example, as the source gas to complete the Si epitaxial substrate 7. The n<sup>-</sup>-type Si epitaxial layer 6 is doped with P, for example, as its n-type impurity. Its resistivity is 40 to 50 Ωcm, for example, and the thickness is 8 µm, for example.
0036An example of the Si epitaxial substrate 7 manufactured in this manner is shown in Fig. 6. As shown here, this example has formed square carbon non-implanted regions 5 at two locations of the CZ-Si substrate 1 at the center of the Si epitaxial substrate 7 and near an orientation flat 7a, respectively. Sides of these carbon non-implanted regions 5 are parallel to directions parallel and normal to the orientation flat 7a, for example. size of each carbon non-implanted region 5 is, for example, 10 mm x 10 mm or 8 mm x 8 mm.
0037To estimate acceptability of the Si epitaxial substrate 7 made in the above-explained process, recombination lifetime is measured by microwaves in the n<sup>-</sup>-type Si epitaxial layer 6 above the carbon non- implanted region 5, and only Si epitaxial substrates 7 demonstrating a good result are selected. A result of measurement on recombination lifetime is evaluated in the following manner. That is, respectively measured are recombination lifetime τ<sub>sub</sub> of the carbon non-implanted region 5 of the CZ-Si substrate 1 before growth of the n<sup>-</sup>-type Si epitaxial layer 6 and lifetime τ<sub>epi</sub> of a part of the Si epitaxial substrate 7 above the carbon non- implanted region 5. When τ<sub>epi</sub>/τ<sub>sub</sub> is 2/3 or more, for example, the Si epitaxial substrate 7 is classified to be good.
0038Figs. 7 through 11 illustrate a manufacturing method of a CCD solid-state imaging device according to the second embodiment of the invention.
0039In the second embodiment, first prepared is a good Si epitaxial substrate 7 remarkably reduced in impurity contamination such as heavy metal impurities, which has been selected in the above-explained manner.
0040Next, as shown in fig. 7, a p-type well region 8 is formed in the n<sup>-</sup>-type Si epitaxial layer 6 of the Si epitaxial substrate 7 by ion implantation, for example. After that, an insulating film 9 of SiO<sub>2</sub>, for example, is made on the surface of the p-type well region 8 by thermal oxidation, for example. Then, by selectively ion-implanting an n-type impurity and a p-type impurity into the p-type well region 8, respectively, to form an n-type transfer channel region 10 forming a vertical transfer register, p<sup>+</sup>-type channel stop region 11 adjacent thereto and a p<sup>+</sup>-type well region 12 under the n-type transfer channel region 10.
0041Thereafter, as shown in Fig. 8, formed on the insulating film 9 is a transfer electrode 15 via an insulating film 13 such as Si<sub>3</sub>N<sub>4</sub> film and an insulating film 14 such as SiO<sub>2</sub> film, for example. The insulating films 9, 13 and 14 form a gate insulating film. When the insulating films 9 and 14 are SiO<sub>2</sub> films, and the insulating film 13 is a Si<sub>3</sub>N<sub>4</sub> film, the gate insulating film is a so-called ONO film. The transfer electrode 15 is made of a poly-crystalline Si film doped with an impurity such as P.
0042Next as shown in Fig. 9, n<sup>+</sup>-type regions 16 are made by selectively ion-implanting an n-type impurity into locations of the p-type well region 8 to be made as photo sensor portions. The pn junction made of the n<sup>+</sup>- type region 16 and the p-type well region 8 forms a photo diode to serve as a photo sensor (photoelectric converter).
0043Next as shown in Fig. 10, a p<sup>++</sup>-type region 17 is made by ion-implanting a p-type impurity into he surface of the n<sup>+</sup>-type region 16.
0044After that, as shown in Fig. 11, an inter-layer insulating film 18 of SiO<sub>2</sub>, for example, is made on the entire substrate surface, and an Al shade film 19 is formed on the part of the inter-layer insulating film 18 above the transfer electrode 15.
0045The intended CCD solid-state imaging device is thus completed.
0046Fig. 12 shows a result of measurement on relationship between recombination lifetime measured at a central portion of the Si epitaxial substrate 7 and white defects of the CCD solid-state imaging device manufactured by using the Si epitaxial substrate 7. As shown in Fig. 12, there is apparent correlation between recombination lifetime and white defects, and white defects increase as the recombination lifetime decreases.
0047Also regarding white defects of the CCD solid- state imaging device made in a portion overlapping the carbon non-implanted region 5 in the Si epitaxial substrate 7, the result of measurement was substantially similar to the result of measurement of white defects of the CCD solid-state imaging device formed in a portion of the carbon implanted region 4 in the Si epitaxial substrate 7. This is probably because the diffusion length of metal impurities affecting white defects is sufficiently larger than the size of the carbon non- implanted region 5 at the temperature for heat treatment in the process for manufacturing the device.
0048As explained above, according to the second embodiment, since the CCD solid-state imaging device is manufactured by using a previously selected good-quality Si epitaxial substrate 7 in which impurity contamination by heavy metal impurities, or the like, is remarkably reduced, a CCD solid-state imaging device remarkably reduced in white defects and excellent in property can be manufactured with a high yield. Additionally, although conventional techniques could locate only after making solid-state imaging devices, the second embodiment, configured to select only good products with a high accuracy still in the state of Si epitaxial substrates 7, can remove futility by fabrication of defective CCD solid-state-imaging devices using defective Si epitaxial substrates 7 with much impurity contamination by heavy metal impurities, for example, and hence remarkably reduce the manufacturing cost of CCD solid-state imaging devices.
0049Having described specific preferred embodiments of the present invention with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope of the invention as defined in the appended claims.
0050For example, structures, configurations, processes and numerical values introduced in the first and second embodiments are only examples, and any appropriate other structures, configurations, processes and numerical values may be employed, if necessary.
0051Specifically as to the first embodiment, although two carbon pe-implanted regions 5 are formed in the Si epitaxial substrate 7, the number of the carbon non-implanted region 5 may be only one, or three or more. For example, as shown by the dot-and-dash lines in Fig. 6, additional three carbon non-implanted regions 5 may be made to form five carbon non-implanted regions in total.
0052Regarding the second embodiment, explained as making the n<sup>+</sup>-type region 16 in the p-type well region 8 formed in the n<sup>-</sup>-type Si epitaxial layer 6 on the n-type Si epitaxial substrate 7 such that the n<sup>+</sup>-type region 16 and the p-type well region 8 form a photo diode as the photo sensor, it may be modified to form a photo diode by making an n-type region in the p-type Si epitaxial layer.
0053Moreover, needless to say, the invention is applicable also to fabrication of CCD solid-state imaging devices of a type having an in-layer lens.
0054Furthermore, although the first embodiment has been explained as evaluating acceptability of the Si epitaxial substrate 7, the result of the evaluation may be used also for contamination control of the epitaxial growth apparatus used therefor. In this manner, contamination control of the epitaxial growth apparatus can be made without using a monitor substrate.
0055As described above, according to the epitaxial semiconductor substrate by the present invention having formed at least one carbon non-implanted region along one major surface of the semiconductor substrate, acceptability of the epitaxial semiconductor substrate treated by carbon gettering can be evaluated precisely and quickly by measuring recombination lifetime or surface photo voltage of the epitaxial layer in the location above the carbon non-implanted region.
0056According to the manufacturing method of an epitaxial semiconductor substrate by the invention, configured to ion-implant carbon onto one major surface of the semiconductor substrate and make at least one carbon non-implanted region, acceptability of the epitaxial semiconductor substrate treated by carbon gettering can be evaluated precisely and quickly by measuring recombination lifetime or surface photo voltage of the epitaxial layer in the location above the carbon non-implanted region.
0057According to the manufacturing method of a semiconductor device by the present invention, which is configured to manufacture a semiconductor device by using a good-quality epitaxial semiconductor substrate with remarkably reduced impurity contamination by heavy metal impurities, for example, semiconductor devices excellent in property can be manufactured with a high yield.
0058According to the manufacturing method of a solid-state imaging device by the present invention, which is configured to manufacture a solid-state imaging device by using a good-quality epitaxial semiconductor substrate with remarkably reduced impurity contamination by heavy metal impurities, for example, solid-state imaging devices remarkably reduced in white defects and excellent in property can be manufactured with a high yield.
Contents4
11 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US8184190B2 | Cited by | United States of America | Applicant |
| US8278174B2 | Cited by | United States of America | Applicant |
| US8582011B2 | Cited by | United States of America | Applicant |
| EP1469522A3 | Cited by | European Patent Office (EPO) | Search report |
| US7176544B2 | Cited by | United States of America | Applicant |
| WO2010086154A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| EP1469522A2 | Cited by | European Patent Office (EPO) | Search report |
| EP2242106B1 | Cited by | European Patent Office (EPO) | Examiner |
| CN100433347C | Cited by | China | Search report |
| US5250445A | Cites | United States of America | Search report |
8 members in 5 offices; this record represents the family
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 9436498 | Japan | – | |
| 9436498 | Japan | A |
Members8
| Document | Office | Kind | |
|---|---|---|---|
| EP0949689A2This record | European Patent Office (EPO) | A2 | |
| JPH11297976A | Japan | A | |
| KR19990082954A | Republic of Korea | A | |
| EP0949689A3 | European Patent Office (EPO) | A3 | |
| US6344092B1 | United States of America | B1 | |
| KR100536930B1 | Republic of Korea | B1 | |
| EP0949689B1 | European Patent Office (EPO) | B1 | |
| DE69941103D1 | Germany | D1 |
30 legal events, as 3 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Notification of lapseLapsedST | ST | FR | |
| Gb: european patent ceased through non-payment of renewal feeCeasedGBPC | GBPC | EP | |
| No opposition filedOpposition26N | 26N | EP | |
| No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE | PLBE | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA | STAA | EP | |
| Corresponds to:REF | REF | EP | |
| Designated contracting statesAK | AK | EP | |
| European patent grantedGrantedFG4D | FG4D | GB | |
| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
| Grant fee paidORIGINAL CODE: EPIDOSNIGR3GRAS | GRAS | EP | |
| Despatch of communication of intention to grant a patentORIGINAL CODE: EPIDOSNIGR1GRAP | GRAP | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Information provided on ipc code assigned before grantRIC1 | RIC1 | EP | |
| Title (correction)MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE WITH AN EPITAXIAL SEMICONDUCTOR SUBSTRATE AND OF A SOLID-STATE IMAGING DEVICERTI1 | RTI1 | EP | |
| First examination report despatched17Q | 17Q | EP | |
| Designation fees paidDE FR GBAKX | AKX | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Request for extension of the european patentAL;LT;LV;MK;RO;SIAX | AX | EP | |
| Information provided on ipc code assigned before grant7H 01L 31/18 A, 7H 01L 21/265 B, 7H 01L 21/74 B, 7H 01L 21/322 BRIC1 | RIC1 | EP | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | EP | |
| Designated contracting statesAK | AK | EP | |
| Request for extension of the european patentAL;LT;LV;MK;RO;SIAX | AX | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 0949689
- Application
- 994008415
Titles3
- German
- Epitaxiales Halbleitersubstrat und sein Herstellungsverfahren; Herstellungsverfahren einer Halbleitervorrichtung sowie einer Festkörperbildaufnahmevorrichtung
- English
- Epitaxial semiconductor substrate and manufacturing method thereof; manufacturing method of semiconductor device and of solid-state imaging device
- French
- Substrat semi-conducteur épitaxial et son procédé de fabrication; procédé de fabrication d'un dispositif semi-conducteur et d'un dispositif de prise d'image à l'état solide
Classification
- CPC, 15
- H10F71/00
- H10F99/00
- H10F39/028
- Y02E10/50
- Y02P70/50
- H10F39/014
- H10F39/1534
- H10P14/2905
- H10P14/3411
- H10P14/20
- H10P14/36
- H10P30/204
- H10P30/208
- H10P30/28
- H10P30/21
- IPC, 4
- H01L27 146
- H01L31 02
- H10W15 00
- H01L31 18
Designated states2
- Contracting states, 1
- Sweden
- Extension states, 1
- Slovenia