Nonvolatile semiconductor storage apparatus and production method of the same
Abstract
The present invention prevents a charge-up during a wiring layer etching in a nonvolatile semiconductor storage apparatus having a floating gate and a control gate to which both of positive and negative voltages are applied during a memory cell operation. On a semiconductor substrate 51 of a first conductive type, a first well 52 of a second conductive type is formed to oppose to the first conductive type. In the first well 52, a second well 53 of the first conductive type is formed. On a main surface of the second well 53 is formed a composite gate 8 consisting of a first gate insulation film 4, a floating gate 5, a second gate insulation film 6, and a control gate 7 which are successively layered. On a surface of the second well 53 are formed by way of ion implantation, a source, a drain, and a charge-up preventing element diffusion layer 18 of the second conductive type.

Term
Term ended
Projected expiry passed 3 September 2018, 8.1 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
1 sheet
Sheet 1
Every citation, both waysCites: the store holds 1 of 2
| Document | Relation | Office | Category | Cited during | Relevant claims |
|---|---|---|---|---|---|
| EP0379024A2 | Cites | European Patent Office (EPO) | A | Search report | 1-7 |
| PATENT ABSTRACTS OF JAPAN vol. 6, no. 185 (E - 132) 21 September 1982 (1982-09-21) | Non-patent | – | – | Search report | – |
| PATENT ABSTRACTS OF JAPAN vol. 199, no. 707 31 July 1997 (1997-07-31) | Non-patent | – | – | Search report | – |
12 members in 5 offices
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 25569797 | Japan | – | |
| 25569797 | Japan | A | |
| 25569797 | Japan | A | |
| JP19970255697 | – | – | – |
Members12
| Document | Office | Kind | |
|---|---|---|---|
| EP0903789A2 | European Patent Office (EPO) | A2 | |
| CN1212466A | China | A | |
| JPH1197560A | Japan | A | |
| KR19990029546A | Republic of Korea | A | |
| EP0903789A3This record | European Patent Office (EPO) | A3 | |
| JP3221369B2 | Japan | B2 | |
| US2001052616A1 | United States of America | A1 | |
| US2001055847A1 | United States of America | A1 | |
| US6392268B2 | United States of America | B2 | |
| US6503797B2 | United States of America | B2 | |
| KR100372392B1 | Republic of Korea | B1 | |
| CN1130774C | China | C |
11 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Application withdrawnWithdrawn18W | 18W | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: THE APPLICATION HAS BEEN WITHDRAWNSTAA | STAA | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | |
| Designation fees paidDE FR GBAKX | AKX | |
| Request for examination filed17P | 17P | |
| Designated contracting statesAK | AK | |
| Request for extension of the european patentAL;LT;LV;MK;RO;SIAX | AX | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | |
| Designated contracting statesAK | AK | |
| Request for extension of the european patentAL;LT;LV;MK;RO;SIAX | AX | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI |
Numbers
- Publication
- 0903789
- Publication, DOCDB
- 0903789
- Publication, EPODOC
- EP0903789
- Application
- 98116737
- Application, DOCDB
- 98116737
- Application, EPODOC
- EP19980116737
Titles3
- German
- Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung
- English
- Nonvolatile semiconductor storage apparatus and production method of the same
- French
- Dispositif semi-conducteur de mémoire rémanente et procédé pour sa fabrication
Classification
- CPC, 4
- H01L29/66825
- H10B69/00
- H10B41/30
- H01L29/7881
- IPC, 5
- H01L21 336
- H01L21 8247
- H01L29 788
- H01L29 792
- H10B69 00
Designated states2
- Contracting states, 1
- Sweden
- Extension states, 1
- Slovenia