Method for making a thin film of solid material, and uses thereof

0001The present invention relates to a method embodiment of a thin film of solid material, which material can be a dielectric, a conductor or a semi-insulating. It can be crystalline or not. This may be an amorphous semiconductor or polycrystalline whose crystallographic planes are any orientation. This material may possess ferroelectric properties, piezoelectric, magnetic, electro-optical, etc.

0002A particularly interesting application the method of the invention concerns the production memories with ferroelectric capacitors.

0003There are many known methods for producing thin film of solid material. these methods depend on the nature of the material and thickness the desired film. It is thus deposited thin films of a solid material on the surface of a workpiece by projection, spraying, electroplating, etc. One can also get a thin film slimming a plate of abrasion desired material mechano-chemical or chemical, the thin film obtained is then glued or attached to a room used for support.

0004Generally, the fixing of a thin film on the surface of a workpiece is intended to modify superficially the part properties.

0005In the field of semiconductors, it is also sometimes necessary to achieve thin films semiconductors, for example to manufacture said substrates "Silicon On Insulator". different methods of realization of semiconductor thin films have been developed. One of the methods more Recently is based on the fact that ion implantation a rare gas or hydrogen in a material semiconductor induces the formation of weakened areas at a depth close to the average depth of ion penetration. FR-A-2681472 discloses a method which uses this property to a thin film of semiconductor material. This method comprises subjecting a wafer of material desired semiconductor and having a planar face the following steps:<ul><li>a first implantation step by bombardment of the planar face of the wafer by means ions creating, in the volume of the wafer and a depth close to the depth of penetration ions, a layer of "gas microbubble" separating the wafer a lower region constituting the mass of the substrate and an upper region constituting the thin film, the ions being chosen among ions rare gas or hydrogen gas;</li><li>a second intimate contact in step the flat face of the wafer with a support consisting at least of a stiff material layer. This intimate contact can be achieved for example using an adhesive or by the effect of a prior surface preparation and possibly a heat treatment and / or electrostatic for promote the interatomic bonds between the support and the wafer;</li><li>a third heat treatment step of the whole board and support at a temperature higher than the temperature at which implantation was performed and sufficient to create a separation between the thin film and the mass of the substrate. This temperature is greater than or equal to about 400 ° C for silicon.</li></ul>

0006This implementation is suitable for creating a layer of gas microbubbles which will result in the end heat treatment at a fracture zone. This microbubble layer thus created in the volume of the wafer at a depth close to the depth average ion penetration, delimits in the volume of the insert two regions separated by this layer: a region intended to form the thin film and a region forming the remainder of the substrate. During the third step, the heat treatment is carried to a temperature sufficient to create, by effect of crystalline rearrangement in the material semiconductor such as for example by effect of growth of microcavities and / or by pressure effect microbubble fracture zone and the separation between the two regions.

0007Following the implantation conditions, after implantation of a gas such as hydrogen, cavities or microbubbles are observable or not transmission electron microscopy. In the case of silicon, one can have micro-cavities whose size can vary from a few nm to a few hundred nm. Thus, in particular when the temperature implementation is weak, these cavities are observed that during the processing step thermal step in which is then carried nucleation to allow to reach the end of heat treatment to the fracture between the thin film and the remainder of the substrate.

0008Until now it was thought that the method disclosed by FR-A-2681472 could not apply only to the production of a thin film from a substrate of semiconductor material. In this paper proposes the following explanation to different phenomena observed by experience. All First, the first ion implantation step is conducted by presenting to an ion beam a plane face a semiconductor material wafer, the plan of this flat face being either substantially parallel to a main crystallographic plane in the case wherein the semiconductor material is perfectly monocrystalline, or slightly inclined relative to a main crystallographic plane of the same indices for all the grains in the case where the material is Polycrystalline. There is thus created in the volume of the wafer at a depth close to the depth average ion penetration, a layer of "Gaseous microbubbles" corresponding to zones of embrittlement and delimiting in the volume of the insert two regions separated by this layer: a region intended to form the thin film and a region forming the remainder of the substrate. By the expression "Gas microbubbles" means any cavity or microcavity generated by gas ion implantation hydrogen or rare gas in the material. cavities can be in the form very flat, that is to say, low-rise, for example around a few interatomic distances, as well as in substantially spherical form or in any other different form the previous two forms. These cavities may or may not contain free gas phase and / or carbon gas from the fixed implanted ions on the atoms of the material forming the walls of cavities. These cavities are generally referred to in English terminology "platelets", "microblisters" or even "bubbles". During the third step, the heat treatment is conducted at a temperature sufficient (for the duration of the treatment applied) to create the separation between the two regions. The couple time and temperature of heat treatment depends the dose of implanted ions.

0009The method disclosed in FR-A-2681472 relates to the production of a film thin to from a substrate of semiconductor material crystal structure. The development of the various steps of the method has been explained as resulting from the interaction between the implanted ions and the mesh crystalline semiconductor material.

0010However, the inventors of the present invention were surprised to see that this process could be applied to all types of materials solids, crystalline or not. It is possible to apply this method to dielectric materials, conductors, semi-insulating, as well as semiconductor materials amorphous and polycrystalline semiconductor even whose grains have no crystallographic planes key substantially parallel to the planar face of the wafer. The latter, as well as amorphous semiconductors will be referred to below of the description by the expression semiconductor unordered. In addition, this process does not alter basically the properties of the material to which it applies.

0011The inventors of the present invention have was surprised to find that the ion implantation hydrogen gas or rare gas may also cause the formation of microcavities in solid materials other than a crystalline semiconductor material, and a subsequent thermal treatment can cause separation, at the microcavities, mass of material into two parts. Indeed, treatment thermal conduit, regardless of the type of material solid, the coalescence of the microcavities that lead embrittlement of the structure at the layer of microcavities. This embrittlement allows the separating the material under the effect of stresses internal and / or pressure in the microcavities, this separation can be natural or assisted by application of external constraints.

0012microcavity layer is defined as a area containing microcavities which may be located different depths and can be adjacent or not them.

0013The invention therefore relates to a method of making a thin film of solid material, crystalline or not, selected from a material dielectric, a conductive material, a semi-insulating material, an unordered semiconductor material that is to say an amorphous semiconductor or a material polycrystalline semiconductor material with grains have no major crystallographic planes substantially parallel to a flat face of a wafer, comprising subjecting a substrate of said solid material to the following steps:<ul><li>an ion implantation step during of which one face of the substrate is bombarded with ions chosen among rare gas ions and gas hydrogen, to create, in the volume of the substrate and at a depth close to the average depth of penetration of ions, a layer of microcavities separating the substrate into two regions,</li><li>a heat treatment step for carrying the layer of microcavities to a temperature sufficient to cause separation ink both regions of the substrate either naturally or with the help of an applied stress, </li><li>and optionally between step ion implantation and the processing step thermal, there is provided a step of fixing said face of the substrate on a support.</li></ul>

0014This optional step may be necessary in case the thin layer is not rigid enough by itself. She may be desired since, usually, the thin film is intended to be placed on a support. In that case, the media must support the processing stage final heat.

0015Securing said face of the substrate on the support may be using a substance adhesive or by means of a treatment favoring interatomic bonds.

0016This method according to the invention applies in particular to obtaining a thin film of material ferroelectric, from a substrate material ferroelectric, and its attachment to a support.

0017Advantageously, the support material being semiconductor, at least one control circuit e is developed on one side of said support, the thin film of ferroelectric material is fixed on the support so as to serve as a dielectric a memory capacity controlled by said circuit electronic control to thereby constitute a point memory.

0018Preferably, the control circuit e is of the MOS transistor.

0019The method according to the invention can also be applied to obtain a thin film on a sapphire support, a thin film of the corrosion-resistant metal on a support or a thin film of magnetic material on a support.

0020The invention will be better understood and other advantages and features will appear on reading the following description given by way of non-limiting example, accompanied by the appended drawings among which :<ul><li>Figure 1 is a partial sectional view cross of an integrated circuit produced on one face a semiconductor substrate, </li><li>2 illustrates the implantation step ionic carried out through a side of a substrate ferroelectric material according to the present invention,</li><li>3 illustrates the step of fixing according to the present invention, of adhering the face of the semiconductor substrate wherein the integrated circuit was performed on the surface of the substrate material ferroelectric having been bombarded with ions,</li><li>4 illustrates the method step according to the invention leading to the separation of the film thin substrate in the rest of the ferroelectric material,</li><li>Figure 5 is a partial sectional view of a memory in ferroelectric capacitor embodying the present invention.</li></ul>

0021The method of the invention applies to solid material, crystalline or not, the following:<ul><li>insulators or dielectrics,</li><li>conductive materials,</li><li>unordered semiconductor materials,</li><li>semi-insulating materials, mainly those whose resistivity at room temperature is greater than about 10⁷ohm-cm,</li><li>monocrystalline metals and superconductors in general.</li></ul>

0022It is thus possible according to the invention make thin films of single crystal quartz from solid monocrystalline quartz. We can also obtain thin films of materials magnetic, piezoelectric, ferroelectric, pyroelectric, materials having properties nonlinear optical or electro-optical effects, acousto-optics.

0023We will now describe an example particular: the realization of memories ferroelectric capacitors on an integrated circuit.

0024The electronic circuit shown in section in Figure 1 was carried out according to the techniques current microelectronics. Was implemented the technique called "plug" planarization technique oxides and chemical mechanical technique called "Damascene" to make connections in a buried oxide but flush with the surface of this one.

0025The circuit was developed on one side of a 2 substrate 1 P-type silicon From the front 2 was carried out of the caissons, only caissons 31, 32 and 33 of N-type⁺ being represented in this figure, grow and we made the field oxide to obtain insulation areas 41 and 42 to the left of the box 31 and to the right of box 33. The boxes 31 and 33 are intended to constitute the drains of two MOS transistors, the housing component 32 their common source. On face 2, wordlines 51 and 52 of polycrystalline silicon have been filed, with the interposition of thin oxide layers 61 and 62. The word lines 51 and 52 were coated with insulating material layers 65 and 66. This material insulation also covers the areas 41 and 42 form layers 63 and 64. A bit line 8 aluminum provides electrical contact with the source 32. 7 oxide layer was deposited to cover all previously described elements. In layer 7 oxide electrodes are deposited flush 91 and 92 in platinum and equipped with barrier underlay TiN. The electrodes 91 and 92 are connected by of "plugs" 11 and 12 to the drains 31 and 33 transistors. They are buried, the circuit then having an outer flat face 15.

0026We will now describe the production of a thin film of ferroelectric material according to the process of the present invention, said thin film being adapted to form the dielectric of capacitors.

0027Figure 2 shows, seen sideways, a substrate 100 of ferroelectric material, e.g. in PbZrTiO₃ (PZT). The flat face 101 of the substrate 100 is bombarded with ions, for example ions hydrogen energy 200 keV and in a dosage equal 10¹⁷ cm^-2. The ion bombardment is represented by arrows in Figure 2. The implanted ions induce microcavities which are distributed in a layer 102 in the vicinity of a plane parallel to the planar face 101, this plane being located at a distance the flat face 101 corresponding to the depth average ion penetration. The layer 102 implanted material at a very low thickness, the order of several tens of nm, e.g. 50 to 100 nm. It separates the substrate 100 in two regions: a first region 103, on the side the flat face 101 and for forming the thin film, and a second region 104 forming the remainder of the substrate. The thickness of the region 103 is about 800 nm. The layer 102 is formed of a layer of microcavities.

0028The flat face 101 of the substrate material ferroelectric 100 and the planar face 15 of the circuit electronics carried on the semiconductor substrate 1 are processed for example by chemical means so as to make adherent them by simple in touch. 3 shows the two substrates 1 100 associates, the flat face of the substrate 15 1 semiconductor adhering to the flat face 101 of substrate 100 of ferroelectric material.

0029The assembly is then heat treated to about 500 ° C, which has the effect of inducing a separation of the two regions 103 and 104 of the substrate 100 of ferroelectric material at the layer 102 as shown in Figure 4. There was obtained a substrate semiconductor provided with an electronic circuit to which is fixed a thin film of ferroelectric material.

0030The outer face 105 of the thin film 103 is possibly finely polished.

0031Is obtained in the device shown in Figure 5 where a two capacitor memory cell is consisting of the deposition on the flat face 105 of the film 103 thin a common electrode 16.

0032A final encapsulation can be added to protect the entire circuit.

0033Such ferroelectric thin film can also be used to form a layer of ferroelectric material deposited directly on the silicon MOS transistors to perform when the grid command is replaced by this layer which ferroelectric polarization state determines or the off state of the transistor.

0034Application of the process according to the invention dielectric materials notably enables antiwear sapphire layers (β-alumina) on supports made of glass or silica. Such a thin layer alumina protects the glass or silica for example support for optical components wear and scratches. An ion implantation hydrogen of about 8.10¹⁶ atoms / cm² and 110 keV Energy provides a thin layer or sapphire about 1 micron thick. This small thickness is compatible with a subsequent shaping any glass or silica as carrier to produce optical for example.

0035The method of the invention applies also metallic materials. It allows for anti-corrosion and diffusion barrier layers. The possibility of producing monocrystalline layers metal instead of polycrystalline layers provides a significant advantage in terms of efficiency as diffusion barrier to chemicals and in particular corrosion. Indeed, the existence significant diffusion phenomena to the accompanying grains in polycrystalline materials, limit the effectiveness of the thin layers made of these materials. Examples include filing a thin film of single crystal niobium 500 nm thick on a steel substrate for the achievement objects to withstand high temperatures in corrosive environments. For this thin film, they may implement an ion implantation of H⁺approximately 2.10¹⁷ atoms / cm² 200 keV.

0036Another example of application relates to the achievement of memories using for storage of information, the magnetic domains (bubbles) and the walls of magnetic domains (Bloch walls). For this, one can from a solid substrate of garnet nonmagnetic on which is epitaxially grown a ferrimagnetic garnet layer. The method the invention allows to postpone a thin layer ferrimagnetic garnet material on a substrate silicon as carrier and having integrated circuits. These ICs combine electronic devices, analog and logic, integrated microbobinages of capable of generating fields Magnetic localized way to fly, move and detecting the magnetic domain walls or areas in the thin layer of garnet ferrimagnetic.