Switching reference generation using a scanning sync separator

0001CROSS-REFERENCE TO RELATED APPLICATIONS    Not applicable

0002STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT    Not applicable

BACKGROUND OF THE INVENTION

0003The present invention relates to the switching of video signals, and more particularly to switching reference generation using a scanning sync separator for switching between video signals of different formats or sync timings.

0004Existing SMS7000 Video Matrices, manufactured by the Grass Valley Product Group of Tektronix, Inc., only deal with one vertical sync switching reference. This reference is used to define the vertical interval switching point, that is, the point in time where the switch from one signal to another occurs. However a need exists to switch groups of signals having different sync timings in the same video switch matrix, such as systems having both 525 line/60 Hz and 625 line/50 Hz signals or systems containing groups of signals of the same television standard that are asynchronous to one another.

0005An ideal solution would be to decode vertical sync from each output and use this to generate a unique vertical switching reference for the crosspoint switch that drives the respective outputs. This means that, if a signal present at a crosspoint input is synchronous with the signal currently present at the crosspoint output, a switch to that input is by implication synchronous. A block diagram illustrating this approach is shown in Fig. 1. This architecture is well established and widely used in routing switchers. In analog systems the added cost of a sync separator for each output is relatively insignificant, but with serial digital video routing switchers it is necessary to convert the serial bitstream into the parallel domain in order to detect vertical sync. In a routing switcher containing multiple outputs (destinations), the size, cost and power consumption required to implement this architecture is considerable.

0006What is desired is a switching reference generation architecture for multiple format or sync timing video signals that minimizes the size, cost and power consumption required to perform the switching function.

BRIEF SUMMARY OF THE INVENTION

0007Accordingly the present invention provides switching reference generation using a scanning sync separator for switching between video signals of different formats or sync timings. A plurality of crosspoint switches have a plurality of matrix inputs, each crosspoint switch providing a matrix output. Each matrix output is sampled by a sampling sync separator in turn under control of a controller. The controller matches the output from the sampling sync separator with a switching reference, and applies the selected switching reference to the particular crosspoint switch providing the currently sampled matrix output.

0008The objects, advantages and other novel features of the present invention are apparent from the following detailed description when read in conjunction with the appended claims and attached drawing.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

0009Fig. 1 is a block diagram view of an analog switching matrix according to the prior art.

0010Fig. 2 is a block diagram view of a switching reference generation architecture using a scanning sync separator according to the present invention.

0011Fig. 3 is a flow chart diagram view for the switching reference generation according to the present invention.

0012Fig. 4 is a timing diagram view for the switching reference generation according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

0013As a rule non-synchronous switches occur much less frequently than synchronous switches. This is borne out in practice: asynchronous switches usually take place when a device or room (edit suite) is changing synchronization standards (525/60 to 625/50) or when a shared resource is switched from one user to another where the users may not be sharing a common synchronization reference. Therefore asynchronous switches are assumed to be part of set-up activity. Synchronous switches on the contrary are assumed to be the primary operating mode during normal operations, such as an editing session. Based upon these assumptions a sampling system to detect the signal format present at each matrix output and use of this information is used to select an appropriate switching reference.

0014Referring now to Fig. 2 a plurality of crosspoint switches <b>12</b> each have a plurality of video signals coupled as matrix inputs, and each provides one of a matrix of outputs. Each matrix output is coupled to a sampling switch <b>14</b> which samples each output in turn under the control of a controller <b>16</b>. The selected output from the sampling switch <b>14</b> is input to a sync separator <b>18</b>. The sync output from the sync separator <b>18</b> is coupled to the controller <b>16</b> which then selects a correct switch reference signal from among a plurality of switch reference signals (Sw Ref 1, 2,... n) that allows synchronous switching. The selected switch reference signal is coupled to the appropriate crosspoint switch <b>12</b>. If a new matrix input that is synchronous with the currently selected matrix input at a crosspoint switch <b>12</b> is switched to the matrix output, the switch occurs synchronously in the vertical interval. If the new matrix input is not synchronous, an asynchronous switch occurs. At this point the new matrix input is routed to the matrix output where it is sampled by the scanning sync separator <b>14, 18</b> which then passes the new signal format information to the controller <b>16</b> which in turn supplies the new switching reference signal to the crosspoint <b>12</b>. All subsequent switches to matrix inputs that are synchronous with the new matrix input occur synchronously.

0015Referring now to Fig. 3 the operation of the controller <b>16</b> is illustrated. For each matrix output from one to m the controller <b>16</b> sets the sampling switch <b>14</b> to the currently selected matrix output and feeds the selected output to the input of the sync separator <b>18</b>. The output of the sync separator <b>18</b> is tested to determine if there is a valid signal being produced from the input signal from the sample switch <b>14</b>. If the signal is valid from the sync separator <b>18</b>, the controller 16 selects each switching reference one to n in turn, and compares the selected switching reference with the output from the sync separator. When a match occurs, the currently selected switching reference is synchronous with the current matrix output, and thus is used for the crosspoint switch <b>12</b> that corresponds to the current matrix output. Each matrix output in turn is tested in the same manner.

0016The timing diagram shown in Fig. 4 illustrates the behavior of matrix output 1 when it is initially coupled to matrix input 1 for the following three cases: <ul id="ul0001" list-style="none" compact="compact"><li>1. Matrix o/p 1 switched from matrix i/p 1 to matrix i/p 2, which is synchronous with matrix i/p 1.</li><li>2. Matrix o/p 1 switched from matrix i/p 2 to matrix i/p 3, which is asynchronous with matrix i/p 2.</li><li>3. Matrix o/p 1 switched from matrix i/p 3 to matrix i/p 4, which is synchronous with matrix i/p 3.</li></ul> "V" represents the vertical timing interval during which synchronous switching occurs.

0017When matrix i/p 1 is coupled to matrix o/p 1, matrix o/p 1 uses Ref 1 as the switching reference. Matrix o/p 1 is then commanded to switch from matrix i/p 1 to matrix i/p 2. Matrix o/p 1 switches to matrix i/p 2 using the Ref 1 switching reference and, since the matrix i/p's 1 and 2 are in sync with each other and Ref 1, the switch occurs synchronously in the vertical interval. when the sync separator <b>18</b> resamples matrix o/p 1, it determines that Ref 1 is still the appropriate, synchronous, switching reference. Matrix o/p 1 subsequently is commanded to switch its input from matrix i/p 2 to matrix i/p 3. Matrix o/p 1 switches to matrix i/p 3 using the Ref 1 switching reference. Because matrix i/p 3 is not synchronous with matrix i/p 2, the switch is asynchronous. The sync separator <b>18</b> samples matrix o/p 1 and determines that the output is now synchronous with Ref 2, and therefore changes the switching reference applied to matrix o/p 1 to be Ref 2, as indicated by Ref(o/p 1). Finally matrix o/p 1 is commanded to switch its input from matrix i/p 3 to matrix i/p 4. Matrix o/p 1 uses Ref 2 to switch to matrix i/p 4 and, since matrices i/p 3 and 4 are synchronous, the switch occurs in the vertical interval. When the sync separator <b>18</b> resamples matrix o/p 1, it determines that Ref 2 is still the correct switching reference.

0018Thus the present invention provides an architecture for switching reference generation using a scanning sync separator that samples each matrix output in turn and determines the signal format for each, and then provides the appropriate switch reference signal from among a plurality of such signals to each crosspoint switch to allow synchronous switching.