EP0901212A2

Noise currents compensator in devices with switching power output stages

Abstract

The circuit arrangement (11) compensates asymmetrical disturbance currents which are caused in instruments (1) with final switching power stages (4) through charge reversal of parasitic output capacitances (Cpl, Cp2). A control and/or regulation circuit (12) is coupled to the instrument (L) for the detection and/or observation of condition parameters. The output stage (15) of the control and/or regulation circuit is connected with the instrument casing (8), heat sink, and/or a grounding connector (9) for conducting compensation currents. The output stage of the compensation circuit is preferably set up with fast electronic semiconductors (Tkl, Tk2).

EP0901212A2, drawing sheet 1
Sheet 1 of 4

Term

Term ended

Projected expiry passed 26 August 2018, 8.1 years ago.

  1. Priority
  2. Filed
  3. Published
  4. Projected expiry
  5. Today

8 claims: 2 independent, 6 dependent

  1. 1
    Circuitry (11) for compensating asymmetric Interference, which for devices (1) with switching power amplifiers (4) by the transhipment of parasitic output capacitances (Cp1, Cp2) are caused, marked by one for detecting and / or observation of state variables to the device (1) coupled (13) control and / or regulating circuit (12) whose Output stage (15) for supplying compensating currents to the device housing (8), heat sink and / or a ground terminal (9) is coupled.
  2. 7
    Circuit arrangement according to one of the preceding claims, characterized In that the active Output terminal (16) of the compensator output stage (15) with the housing (8), a cooling body, a grounding terminal and / or one of the supply voltages of the power amplifier coupled the device.