Nova Patents
EP0802540A3

Multilevel memory system

Abstract

A memory system according to the present invention includes a memory portion including a memory cell for storing n-level data (n is an integer equal to or larger than 3, for example, 4) data, wherein the memory cell is operated as an n-level data storing memory cell when the number of times of write-erase sequence is smaller than a predetermined number of times, and the memory cell is operated as an m-level (m is an integer smaller than n, for example, 3) data storing memory cell when the number of times of write-erase sequence has exceeded the predetermined number of times. The number of information items (values) which can be stored in one memory cell is decreased with respect to a predetermined number of times of write-erase sequence. Thus, a memory system including a multi-level data storing memory cell and exhibiting improved durability against write-erase sequence operations is provided.

EP0802540A3, drawing sheet 1
Sheet 1 of 1

Term

Term ended

Projected expiry passed 21 April 2017, 9.4 years ago.

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