Nova Patents
EP0798929A2

MPEG coded picture decoding apparatus

Abstract

An MPEG coded picture decoding apparatus includes a stream buffer memory (1) for storing an MPEG stream, a pack header processing section (3) for separating a pack header of the MPEG stream and extracting SCR information, a PES packet processing section (4) for separating a header of a PES stream, extracting PTS information and separating packets, a GOP detection section (5) for detecting a GOP of a video stream, a video buffer memory (6) for storing the video stream, a video MPEG decoding section (8) for MPEG decoding the video stream, a decoded data storage section (9) for storing and managing one picture frame, a video display processing section (10) for storing several picture frames and reading out at a display timing, and an error information processing section (14) for supervising a picture frame memory at each display timing and developing a video re-sending request when the picture frame memory is in an irregular condition.

EP0798929A2, drawing sheet 1
Sheet 1 of 5

Term

Term ended

Projected expiry passed 27 March 2017, 9.5 years ago.

  1. Priority
  2. Filed
  3. Published
  4. Projected expiry
  5. Today

2 claims: 2 independent, 0 dependent

  1. 1
    An MPEG coded picture decoding apparatus for MPEG coded picture data transmitted thereto from an MPEG coding multiplexing side by means of a decoding element (8), characterized in that it comprises:a memory (90) for temporarily storing video data MPEG decoded by said decoding element (8) in units of one picture frame;a memory management section (91) for supervising said memory (90) to detect whether or not picture data for one frame are stored into said memory (90) completely without a miss;a video display processing section (10) including a display memory (100) into which video data for one picture frame successively read out from said memory (90) are temporarily stored for several picture frames and from which the video data are read out so as to be displayed in the same order in units of one picture frame;an error processing section (14) for checking memory storage information at an output of said memory management section (91) at each video display timing and for outputting, when the memory storage information is not outputted from said memory management section (91), error information determining that a miss of data has occurred with a picture frame stored immediately before the display timing then and delivering a re-sending request to said MPEG coding multiplexing side to re-send video data for the one picture frame, with which the miss of data has occurred, before the video data of the picture frame, with which the miss of data has occurred, or a GOP including the picture frame are read out from said video display processing section (10);and a control section (7) for storing video data of the one picture frame or the GOP re-sent from said MPEG coding multiplexing side into said display memory (100) of said video display processing section (10) by a time at which the re-sent video data are to be displayed.
  2. 2
    An MPEG coded picture decoding apparatus, characterized in that it comprises:a first memory (1) for successively and temporarily storing a multiplexed stream inputted thereto from an MPEG coding multiplexing side via a transmission line and a line input interface (26) and multiplexed from MPEG coded bit streams of a plurality of media including video and audio data;a pack header processing section (3) for separating a pack header of the multiplexed stream read out from said first memory (1) in response to a first control signal and extracting system clock reference information for a system clock reference;a packet processing section (4) for separating a packet header from the multiplexed stream from said packet header separation section from which the pack header has been separated, extracting presentation time stamp information for a time reference and separating the multiplexed stream from said pack header processing section (3) in units of a packet of each of the plurality of media;a GOP detection section (5) for detecting a GOP from an MPEG video stream of video packets separated by said packet processing section (4);a first control section (2) for outputting the first control signal and a second control signal in response to a GOP detection signal from said GOP detection section (5);a second memory (6) for temporarily storing the MPEG video stream of the video packets separated by said packet processing section (4) and being controlled by the second control signal from said first control section (2) to read out the MPEG video stream temporarily stored therein in units of a GOP;a video MPEG decoding section (8) for being controlled by a third control signal to MPEG decode video data in units of one picture frame outputted from said second memory (6);a third memory (90) for temporarily storing decoded video data for one picture frame from said video MPEG decoding section (8);a memory management section (91) for supervising a storage condition of the decoded video data for one picture frame into a storage region of said third memory (90) and controlling, when the storage condition is regular, said third memory (90) to output the decoded video data for one picture frame stored in said third memory (90), but outputting, when the storage condition is irregular, first error information;a fourth memory (100) for temporarily storing the decoded video data for one picture frame outputted from said third memory (90) for a first number of picture frames;a video display control section (101) for controlling the decoded video data read out in units of one picture frame from said fourth memory (100) in response to a fourth control signal so that the decoded video data may be outputted at a video display timing;a digital to analog conversion section (12) for performing digital to analog conversion of the coded video data for each one picture frame from said video display control section (101) and outputting and supplying the resulting analog decoded video data as an MPEG decoded picture signal to an external video viewer;a second control section (7) for outputting the third and fourth control signals in response to a fifth control signal so that the third control signal is supplied to said second memory (6) and the fourth control signal is supplied to said fourth memory (100);a display timing production section (11) for producing and supplying the video display timing to said video display control section (101) in order to allow the MPEG decoded picture signal outputted from said digital to analog conversion section (12) to be displayed at a timing on a picture monitor of the video viewer;an error information processing section (14) for supervising an input thereto of the first error information outputted from said memory management section (91) at a timing of a period equal to that of the video display timing outputted from said display timing production section (11) and outputting, when the first error information is inputted thereto, a video resending request signal based on the error information to said MPEG coding multiplexing side to request for resending of video data of the same picture frame as that of the video data with regard to which the first error information is outputted;a clock generation section (15) for generating a decoding side clock signal to be used for MPEG decoding based on the system clock reference information extracted by said pack header processing section (3);a time information production section (16) for producing decoding side time information to be used for MPEG decoding based on the presentation time stamp information extracted by said packet processing section (4);a synchronization timing production section (20) for producing an AV synchronization timing for synchronization between the video and audio data upon MPEG decoding based on the decoding side time information outputted from said time information production section (16);and a CPU control section (25) for receiving the decoding side clock signal from said clock generation section (15), the decoding side time information from said time information production section (16), the GOP detection signal from said GOP detection section (5) and the video re-sending request signal from said error information processing section (14) to drive a host CPU (18) to control the MPEG decoding processing of said MPEG decoding section (8) via a CPU bus (17) and to output the fifth control signal to control said second control section (7) and sending out the video re-sending request signal to said MPEG coding multiplexing side via a line output interface (24) and said transmission line.