Error correction coding for digital video recording

0001The present invention relates to a digital video tape recording and reproducing method, and more particularly, to a digital video tape recording and reproducing method having an improved error correction capability during the operation of a normal reproduction, in a digital video cassette recorder which records and reproduces advanced television (ATV) or digital video broadcasting (DVB) signals.

0002A commercial digital video cassette recorder (DVCR) for recording and reproducing ATV or DVB signals on a digital video tape has been developed.

0003Especially, studies into a recording format for a specific reproduction, which satisfies the picture quality and the cost efficiency of a standard definition video cassette recorder (SD-VCR) for recording and reproducing ATV signals, are currently underway. An ATV signal is transmitted to an SD-VCR as a transport packet having an MPEG-2 structure recommended by Moving Picture Experts Group (MPEG).

0004Figure 1 specifically shows a structure of data sync blocks of video sector in a conventional standard definition - video cassette recorder (SD-VCR).

0005The video sector consists of sync blocks n=19 and 20 for first video auxiliary data area 130, sync blocks n=21∼155 for MPEG data area 140, a sync block n=156 for second video auxiliary data area 150, and sync blocks n=157∼167 for outer parity area 160.

0006Each sync block consists of 2 bytes of sync area 110, 3 bytes of identification code 120, 77 bytes of data, and 8 bytes of inner parity 170 for an inner code error correction.

0007A signal of an SD-VCR is an intra frame coded data and has an error correction code (ECC) structure. In the ECC structure, a row code is called an inner code, specified by (85,77), and a column code, an outer code, specified by (149,138).

0008During recording, an outer code error correction coding is carried out in the column direction by adding 11 bytes of outer parity 160 to 138 bytes of an outer code, and then an inner code error correction coding is carried out in the row direction by adding 8 bytes of inner parity 170 to 77 bytes of an inner code.

0009During reproduction, after an inner code error correction decoding procedure, errors of each sync block are corrected for up to a maximum 4 of 85 bytes and then it is transmitted by adding an error flag if all the errors are not corrected, in an outer code error correction decoding procedure, the errors are corrected by using the error flag for up to 11 of 149 bytes.

0010Also, in a signal of the SD-VCR, a frame is divided into segments each of which consists of 5 macro blocks, and the amount of bits on a track is fixed by a segment unit. Since the amount of bits is fixed for each 5 macroblocks, a trick reproduction is possible.

0011On the other hand, ATV and DVB signals are coded by inter frame coding to have an MPEG-2 structure, and normal and trick reproducing data areas for normal and trick reproducing data, respectively, exist separately on a video sector of the SD-VCR recording format.

0012Here, the inter frame coding is carried out in a group of picture (GOP) unit of 15 frames. Since the coding for the other frames except the intra frame is carried out only for the difference between the neighbouring frames, an error occurring within a frame results in errors of all frames within the corresponding GOP.

0013Therefore, since ATV and DVB signals are coded using the inter frame coding, in an SD-VCR for recording and reproducing them, there is a problem that they could be fatally damaged if an error occurs in their normal reproducing data.

0014Therefore, it is an aim of preferred embodiments of the present invention to provide a digital video recording method for improving the error correction capability for normal reproducing data, by recording using an ECC3 area additionally allocated for the normal reproducing data error correction of ATV and DVB signals, during the operation of an outer coding of SD-VCR.

0015Another aim is to provide a digital video reproducing method for improving the error correction capability for normal reproducing data, by reproducing using an ECC3 area additionally allocated for the normal reproducing data error correction of ATV and DVB signals, during the operation of an outer coding of SD-VCR.

0016According to a first aspect of the invention, there is provided a method for recording inter-coded video data including picture data, which are supplied at a predetermined interval and capable of being independently decoded, on a video tape by dividing the data into normal and trick reproducing data, and allocating an error correction code (ECC3) area in a predetermined position of a data sync block in which the normal reproducing data area is recorded, for the error correction of normal reproducing data, comprising the steps of: first outer code error correction coding of the normal reproducing data, after replacing the trick reproducing data and the error correction code (ECC3) area data with predetermined pattern data, and then adding outer parity data; second outer code error correction coding of the normal reproducing data, after replacing the trick reproducing data coded in said first outer code error correction coding step and additional error correction code (ECC3) area data with predetermined pattern data, and then adding outer parity; inner code error correction coding of each of the normal and the trick reproducing data, coded by the error correction coding in the above second outer code error correction coding step; and, demodulating the normal and trick reproducing data and ECC3 area data, coded by the error correction coding in the above inner code error correction coding step to record them in each predetermined location of a track on a tape.

0017According to a second aspect of the invention, there is also provided a method for recording inter-coded video data including picture data, which are supplied at a predetermined interval and capable of being independently decoded, on a video tape by dividing the data into normal and trick reproducing data, and allocating an error correction code (ECC3) area in a predetermined position of a data sync block in which the normal reproducing data area is recorded, for the error correction of normal reproducing data, comprising the steps of: first outer code error correction coding of the normal reproducing data, after replacing the trick reproducing data with predetermined pattern data, and then adding a parity to the error correction code (ECC3) area; second outer code error correction coding of the normal reproducing data, after replacing the trick reproducing data coded in said first outer code error correction coding step, and an additional error correction code (ECC3) area data with predetermined pattern data, and then adding outer parity; inner code error correction coding of each of the normal and the trick reproducing data, coded by the error correction coding in the above second outer code error correction coding step; and, demodulating the normal and trick reproducing data and error correction code (ECC3) area data, coded by the error correction coding in the above inner code error correction coding step to record them in each predetermined location of a track on a tape.

0018According to a third aspect of the invention, there is provided a digital video tape reproducing method for reproducing the normal and trick reproducing data, recorded in a video sector on a video tape, comprising the steps of: inner code error correction decoding of each of the reproduced normal and trick reproducing data; second outer code error correction decoding of the normal and trick reproducing data, after replacing the trick reproducing data, decoded in said inner code correction decoding step, with a predetermined pattern data; first outer code error correction decoding of the normal and trick reproducing data, after replacing the trick reproducing data, decoded in said second outer code error correction decoding step, and the error correction code (ECC3) area data with each predetermined pattern data; and, mixing the normal and trick reproducing data decoded in said first outer code error correction coding step to output a video signal.

0019According to a fourth aspect of the invention, there is also provided a digital video tape reproducing method for reproducing the normal and trick reproducing data, recorded in a video sector on a video tape, comprising the steps of: inner code error correction decoding of each of the reproduced normal and trick reproducing data; first outer code error correction decoding of the normal and trick reproducing data, after replacing the trick reproducing data, decoded in said inner code correction decoding step, and the error correction code (ECC3) area data with predetermined pattern data; second outer code error correction decoding of the normal and trick reproducing data, after replacing the trick reproducing data, decoded in said first outer code error correction decoding step, with each predetermined pattern data; and, mixing the normal and trick reproducing data decoded in said first outer code error correction coding step to output a video signal.

0020Preferably, in accordance with any of the abovementioned aspects, the predetermined pattern data are predetermined integer data.

0021For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which: <ul id="ul0001" list-style="none"><li>Figure 1 shows a structure of data sync blocks of video sector in a conventional standard definition - video cassette recorder (SD-VCR);</li><li>Figure 2 is a block diagram of an example of an ECC encoder for carrying out a digital video tape recording method according to an embodiment of the present invention;</li><li>Figure 3 shows a structure of data sync blocks in a video sector according to an embodiment of the present invention;</li><li>Figure 4 shows another structure of data sync blocks in a video sector according to an embodiment;</li><li>Figure 5 is a drawing for illustrating the outer error correction coding carried out in the outer ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 3;</li><li>Figure 6 is a drawing for illustrating the inner error correction coding carried out in the inner ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 3;</li><li>Figure 7 is a drawing for illustrating the outer error correction coding carried out in the outer ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 4;</li><li>Figure 8 is a drawing for illustrating the inner error correction coding carried out in the inner ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 4; and</li><li>Figure 9 is a block diagram of an example of ECC decoder for carrying out a digital video tape reproducing method according to an embodiment of the present invention.</li></ul>

0022Figure 2 is a block diagram of an example of ECC encoder for carrying out a digital video tape recording method according to an embodiment of the present invention. The ECC encoder shown in Figure 2 includes a preprocessor 10 for isolating a transport packet from a transmitted packet, a normal and trick reproducing data divider 20 for dividing the transmitted packet into normal and trick reproducing data, a mixer 30 for mixing sync signals and identification codes (ID), an outer ECC coder 40 for an outer code error correction coding, consisting of first and second outer ECC coders 41 and 42, an inner ECC coder 50 for an inner code error correction coding, and a modulator 60 for modulating an error correction coded data to be recorded on a tape.

0023Figure 3 shows a structure of data sync blocks in a video sector according to an embodiment of the present invention.

0024Here, the data structure includes sync blocks (n=19 and 20) for a first video auxiliary data area 330, sync blocks (21∼30) for an error correction coding (ECC3) area 340, sync blocks (31∼130) for a normal reproducing data area 350, sync blocks (131∼155) for a trick reproducing data area 360, a sync block (156) for a second video auxiliary data area 370, and sync blocks (157∼167) for an outer parity 380.

0025Each sync block includes 2 bytes of a sync area 310, 3 bytes of an identification code 320, 77 bytes of data, and 8 bytes of an inner parity 390 for an inner code error correction coding.

0026Figure 4 shows another structure of data sync blocks in a video sector according to a further embodiment of the present invention;

0027In Figure 4, trick and normal reproducing data areas are placed subdivided into k trick and m normal reproducing data areas, respectively, where M, N, m_i, and k_j are larger than zero.

0028Figure 4 includes sync blocks (n=19 and 20) for a first video auxiliary data area 422, N sync blocks for the first through kth trick reproducing data areas 428, 432 and 436, sync blocks (21∼30) for an error correction coding (ECC3) area 424 of normal reproducing data areas 426, 430, 434 and 438, M-byte sync blocks for the first through mth normal reproducing data areas 426, 430, 434 and 438, a sync block (156) for a second video auxiliary data area 440, and sync blocks (157∼167) for an outer parity 442. Here, m1+m2+ ....+mm=M, n1+n2+ ... + nk=N, and M+N=125.

0029Each sync block includes 2 bytes of a sync area 410, 3 bytes of an identification code 420, 77 bytes of data, and 8 bytes of an inner parity 450 for an inner code error correction coding.

0030Figure 5 is a drawing for illustrating the outer error correction coding carried out in the outer ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 3.

0031Error correction coding (ECC) blocks shown in Figure 5 include sync blocks (n=19,20) for a first video auxiliary data area 530, sync blocks (21∼30) for an error correction coding area (ECC3) 540, sync blocks (31∼130) for a normal reproducing data area 550, sync blocks (131∼155) for a trick reproducing data area 560, a sync block (156) for a second video auxiliary data area 570, and sync blocks (157∼167) for an outer parity 580.

0032Each sync block includes 2 bytes of sync area 510, 3 bytes of identification code 520, and 77 bytes of data.

0033Here, the ECC3 area 540 and trick reproducing data area 560 are replaced by "0".

0034During the operation of a first outer coding, they are outer coded by being replaced by "0" or predetermined pattern data, and then are added to the outer parity 580.

0035Figure 6 is a drawing for illustrating the inner error correction coding carried out in the inner ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 3, in which the data structure is the same as that of Figure 3.

0036Figure 7 is a drawing for illustrating the outer error correction coding carried out in the outer ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 4.

0037Figure 7 includes sync blocks (n=19 and 20) for a first video auxiliary data area 722, N sync blocks for first through kth trick reproducing data area 728, 732, and 736, sync blocks (21∼30) for an error correction coding (ECC3) area 724 for normal reproducing data areas 726, 730, 750 and 738, M sync blocks for first through mth normal reproducing data areas 726, 730, 750 and 738, a sync block (156) for a second video auxiliary data area 740, and sync blocks (157∼167) for an outer parity (information) area 742. Here, m1+m2+ ....+mm=M, n1+n2+ ... + nk=N, and N+M=125.

0038Each sync block includes 2 bytes of sync area 710, 3 bytes of an identification code 720, and 77 bytes of data.

0039Here, The ECC3 area 724 and trick reproducing data areas 728, 732 and 736 are replaced by "0".

0040During the operation of a first outer coding, they are outer coded by being replaced by "0" or predetermined pattern data, and then are added to the outer parity 742.

0041Figure 8 is a drawing for illustrating the inner error correction coding carried out in the inner ECC coder shown in Figure 2 for the structure of data sync blocks shown in Figure 4.

0042Figure 9 is a block diagram of an example of decoder for carrying out the digital video tape reproducing method according to the present invention.

0043The ECC decoder shown in Figure 9 includes a demodulator 910 for demodulating a signal read from a tape, an inner ECC decoder 920 for an inner code error correction decoding, an outer ECC coder 930 for an outer code error correction decoding, being consisted of second and first outer ECC decoders 931 and 932, a divider 940 for separating sync signals and identification codes, a normal and trick reproducing data mixer 950 for mixing normal and trick reproducing data, and an inverse preprocessor 960 for outputting ATV and DVB signals by a transmission packeting of normal and trick reproducing data.

0044The digital video tape recording and reproducing method according to embodiments of the present invention will be described in more detail below referring to Figures 2 through 9.

0045In Figure 2, video data having an MPEG2 structure, preferably a transport packet structure, of an inter frame signal is input to a preprocessor 10.

0046The preprocessor 10 separates the video data into transport layers according to the transport packet structure.

0047Data of a transport packet include video, audio, and user sectors. However, only video sector is considered in the present invention.

0048Since a DVCR has a trick playing function, trick data are extracted from the transmitted MPEG2 video data. Also, trick data needs to be recorded on a tape after being converted into MPEG2 video and transport packet structures. The normal and trick reproducing data divider 20 divides the MPEG2 video data into normal and trick reproducing data, and then transmits it.

0049Meanwhile, input data of a DVCR for recording ATV and DVB signals are inter-coded in a GOP unit. In general, this type of data signal includes intra-coded picture (I-picture) data which is independently coded, predicted-coded picture (P-picture) data which is coded by using preceding I-picture or P-picture data by a moving compensation method, and bidirectionally predicted-coded (B-picture) data which is coded by using preceding I-picture or P-picture data and succeeding P-picture data by a moving compensation method.

0050An embodiment, for a display reproducing order of an ATV signal, determined in MPEG-2, is in the order of I-B-B-P-B-B-P-B-B-P-B-B-P---, and for a transmission bit, I-P-B-B-P-B-B-P-B-B-P-B-B-P---.

0051Therefore, intra frame data, being able to be independently coding, are selected and used for trick reproducing data. Among the intra frame data, only a few coefficients (in general, a DC coefficient and 1∼2 AC coefficients for a block) of intra frame data are picked and transmitted as an MPEG2 structure.

0052The video area of an SD-VCR is recorded with the same format as shown in Figure 1. However, for an ATV signal, the video area is recorded subdivided as shown in Figure 3 and 4. In FIGs. 3 and 4, there are trick reproducing data areas 360, 428, 432 and 436, and ECC3 areas 340 and 424. Since the MPEG2 is an inter coded bit stream, it is vulnerable to errors. Therefore, in an SD-VCR, an additional error correction code is needed.

0053The Mixer 30 mixes sync codes and identification codes of normal and trick reproducing data output from the normal and trick reproducing data divider 20. Also, as shown in FIGs. 4 and 5, the mixer 30 inputs normal and trick reproducing data, separately.

0054The outer and inner ECC coders 40 and 50 carry out error correction coding for data output from the mixer 30. The code used for error correction coding is two-dimensional Reed-Solomon code. The primitive polynomial of the error correction code is, as an example, P(x) =x⁸+x⁴+x³+x²+1.

0055In the outer ECC coder 40, there are first and second outer ECC coders 41 and 42. Examples of generating polynomials for first and second outer ECC coder 41 and 42 are g(x)=(x+1)(x+a)(x+a²) ... ( x+a¹⁰) and g(x)=(x+1)(x+a)(x+a²) ... (x+a⁹), respectively.

0056The first outer ECC coder 41 carries out error correction coding of a (135, 125) structure by adding 10 bytes of ECC3 code. In other words, in the processing of an error correction outer coding of the first outer ECC coder 41, the sizes of pure data and parity are 125 and 10 bytes, respectively. As shown in Figure 3, the trick data area 360 of N sync blocks exists within the pure data area of 125 sync blocks. Also the error correction code area (ECC3) 340 (9 sync blocks), an additional error correction code area, is for only normal reproducing data.

0057Therefore, for the data structure shown in Figure 3, an error correction coding is carried out by replacing N sync blocks of trick reproducing data area 360 with "0" or with predetermined pattern data and then adding a parity for ECC3 area 340, as shown in Figure 5.

0058For the data structure shown in Figure 4, an error correction coding is carried out by replacing the first through the kth trick reproducing data areas 428, 432 and 436, with "0" or with predetermined pattern data and then adding a parity for ECC3 area 424, as shown in Figure 7.

0059The second outer ECC coder 42 carries out error correction coding of a (149, 138) structure by adding an SD-VCR outer code parity. However, the outer parity area is for normal reproducing data. In other words, in the processing of the error correction coding of second outer ECC coder 42, the sizes of pure data and parity are 138 and 11 bytes, respectively. As shown in Figure 3, trick data area 360 of N sync blocks exists within sync blocks of 138 bytes of pure data.

0060Therefore, for the data structure shown in Figure 3, an error correction coding is carried out by replacing N sync blocks of trick reproducing data area 360 and ECC3 area 340, with "0" or with predetermined pattern data and then by adding outer parity area (11 sync blocks) 380, as shown in Figure 5.

0061For the data structure shown in Figure 4, an error correction coding is carried out by replacing the first through kth trick reproducing data areas 428, 432 and 436, and ECC3 area 424 with "0" or with predetermined pattern data and then adding outer parity area (11 sync blocks) 442, as shown in Figure 7.

0062Therefore, if, in the processing of an error correction coding of outer ECC coder 40, including first and second outer ECC coders 41 and 42, N sync blocks for trick reproducing data and 10 sync blocks for ECC3 area are coded by being replaced with a predetermined number, a regular pattern data or numbers, the error correction capability in a normal reproducing procedure, can be increased in embodiments of the present invention in which 11 bytes of outer parity are added for an error correction coding of only normal reproducing data, compared to that in a conventional method in which 11 bytes of outer parity are added for an error correction coding of all the 138 bytes of data.

0063In other words, during an extra error correction decoding procedure of a normal reproducing, 11 bytes of parity were added to 138 bytes of data in a conventional method. However, in the present invention, the error correction is carried out by adding 11 bytes of parity to the pure normal reproducing data excluding trick reproducing and ECC3 area data (138-N-10) and 3 bytes of video auxiliary data area, thereby increasing the error correction rate without a big modification of a hardware.

0064Here, the roles of first and second outer code error correction portions, 41 and 42 can be exchanged.

0065In the inner ECC coder 50, 8 bytes of inner parity 390, are added to 77 bytes of data similarly as in a conventional method, as shown in Figure 6. Here, an inner code generating polynomial of inner code error correction portion 50 is g(x)=(x+1)(x+a)(x+a²) ... (x+a⁷⁾ .

0066In case of the data structure shown in Figure 4, the inner ECC coder 50 adds 8 bytes of the inner parity 450 to 77 bytes of data as shown in Figure 8, as in the conventional method.

0067Therefore, when inner code parities, 690 and 850, are added as shown in Figure 6 and 8, they are added for each of ECC3, normal, trick, auxiliary, and outer parity data.

0068Video data, corrected in error correction portions, 40 and 50, are recorded on a tape by modulating through modulator 60.

0069Figure 9 is a block diagram of an example of an ECC decoder for carrying out a digital video tape recorder reproducing method according to the present invention.

0070The reproducing method, shown in Figure 9, for reproducing data from a digital video tape, has an inverted order of the recording method, shown in Figure 1. A demodulator 910 demodulates the reproducing data from a tape carrying a modulated signal.

0071In the inner ECC decoder 920, an inner code error correction decoding is carried out for both normal and trick reproducing data output from the demodulator 910. Also, in the second outer code error correction decoder 931, an outer ECC decoding is carried out for normal and trick reproducing data after the trick reproducing data area is replaced by "0" or by predetermined pattern data.

0072In the first outer ECC decoder 932, an outer code error correction decoding is carried out for normal and trick reproducing data and ECC3 data after the trick reproducing data, and the ECC3 area is replaced by "0" or predetermined pattern data.

0073In a divider 940, sync and identification codes are separated from normal and trick reproducing data output from error correction decoders 930 and 920.

0074In a normal and trick reproducing data mixer 950, normal and trick reproducing data are separated using sync and identification code outputs from the divider 940, and mixed again according to a normal or a trick reproducing mode. In the inverse preprocessor 960, mixed normal and trick reproducing data are converted into a transport packet to be output as an ATV or a DVB signal.

0075As described above, since, in an SD-VCR for reproducing ATV and DVB signals according to the present invention, an outer ECC coding is carried out for normal and trick reproducing data after trick reproducing and additionally allocated ECC3 data areas are replaced by a predetermined number or pattern data, the error correction capability can be increased.

0076The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

0077All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.

0078Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

0079The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.