Speech coder

BACKGROUND OF THE INVENTION

FIELD OF THE INVENTION

The present invention relates to a speech coding system and, more particularly, a speech coding system intended for high-quality coding of speech signals at low bit rates, preferably at a bit rate as low as 8 to 4 kb/s. The present invention in particular relates to a speech coder which can realize reduction in the amount of operation to be conducted in a long-period prediction unit and improvement of coding precision.

DESCRIPTION OF THE RELATED ART

In recent years, dizitization of automobile cellular phones and cordless phones using radio is urgently needed. Because radio communication can be made only in a narrow frequency band, it is essential to develop a method of coding speech signals at low bit rates.

Known as a system for coding speech signals at a bit rate as low as 8 to 4 kb/s is CELP (Code Excited LPC Coding) which is recited, for example, in M. Schroeder and B.A. Atal of the U.S., "Code-Excited Liner Prediction: High quality Speech at Very Low Rates", ICASSP proceedings, pp. 937-940, 1985 (hereinafter referred to as "Literature 1").

In this method, coding processing is carried out on the transmission side in the following procedure.

First, extract a short-period prediction code indicative of frequency characteristics of speech from each frame (of 20 ms, for example) of a speech signal (short-period prediction).

Further divide each frame into small sections of subframes (of 5 ms, for example).

For each subframe, determine a delay code indicative of pitch correlation in a manner as described below by using an adaptive code book which stores a sound source signal of subframe length (adaptive code vector) obtained by delaying a previous sound source signal for a period of delay samples corresponding to each delay code (long-period prediction).

Change (try) delay codes to the amount corresponding to the size of the adaptive code book to extract an adaptive code vector corresponding each delay code.

Generate a synthesis signal by using the extracted adaptive code vector to calculate an evaluation function (error power) between the synthesis signal and the speech signal.

Then, determine an optimum delay code with which the calculated evaluation function takes the smallest value, and an adaptive code vector and its gain corresponding to the optimum delay code.

Next, determine a sound source code vector and its gain with which an evaluation function (error power) takes the smallest value between a synthesis signal generated by a sound source code vector extracted from a noise signal (sound source code book), which signal is a quantization code of a kind prepared in advance, and a residual signal obtained by long-period prediction (sound source code book search).

Transmit indexes indicative of kinds of the determined adaptive code vector and sound source code vector and indexes indicative of kinds of a gain of each sound source signal and a spectrum parameter.

More specifically, a delay code for an adaptive code vector and a quantization code for a sound source code vector are searched by the following procedure.

First, calculate a signal z[n] by weighting an input speech signal x[n] with auditory sensation and subtracting a previous effect signal from the same.

Next, calculate a synthesis signal Hej[n] by driving, with an adaptive code vector ej[n] of a delay code j, a synthesis filter H made up of spectrum parameters which are obtained by short-period prediction and quantized or inversely quantized.

Then, obtain a delay code j with which E takes the smallest value in the following formula (1) expressing an evaluation function (error power) between the signal z[n] and the synthesis signal Hej[n].<maths id="math0001" num=""><img file="EP0694907A2_D0001.tif" /></maths>    In the above formula, Ns represents a subframe length, H represents a matrix which realizes a synthesis filter and gej represents a gain of the adaptive code vector ej. In practice, the above formula (1) is expanded into the following formula (2).<maths id="math0002" num=""><img file="EP0694907A2_D0002.tif" /></maths>    In the above formula (2), a numerator Cj and a denominator Gj represent a cross-correlation and an auto-correlation which can be calculated according to the following formulas (3) and (4), respectively.<maths id="math0003" num=""><img file="EP0694907A2_D0003.tif" /></maths>    The auto-correlation Gj and the cross-correlation Cj are computed after the calculation of Hej[n] by driving the synthesis filter, that is, filtering.

In this case, filtering processing is conducted (tried) to the amount corresponding to the size of a code book (with a 7-bit sound source, for example, filtering processing will be conducted with respect to 128 codes). The amount of operation (the number of times of sum-of-product operation) for one frame to be processed will be therefore extremely increased.

Known as one approach to reduce the amount of operation for long-period prediction is open-closed search of delay codes which is recited in U.S. Patent No. 5,097,508 (Japanese Patent-Laying Open No. 3-98099), of Steude et al. of U.S. (hereinafter referred to as "Literature 2")

This method is implemented by the procedure described in the following. First, set delay codes to the amount corresponding to the size of an adaptive code book and generate code vectors corresponding to the set delay codes by using an open-loop adaptive code book where previous speech signals weighted with auditory sensation are stored.

Based on a generated code vector zd, calculate an evaluation function to extract several delay codes with small evaluation function values as candidate codes.

The foregoing processing is referred to as preliminary selection by open-loop processing.

Then, select codes located in the vicinity of the candidate codes selected by the preliminary selection to generate a code vector ad for each code by using a closed-loop adaptive code book where previous sound source signals are stored.

Using the generated code vectors, calculate an evaluation function and extract a code with which the evaluation function takes the smallest value as an optimum code.

Because the open-loop processing, which uses no results of previous coding, involves no filtering processing, it requires an extremely smaller amount of operation than that required for the above-described coding processing in which closed-loop search is conducted with respect to all codes.

In addition, selection of several candidates in the open-loop processing enables reduction of serious search errors.

As described in the foregoing, since selection of candidates for delay codes in preliminary selection by the open-loop processing allows the number of codes searched in the closed-loop processing to be effectively reduced, the open-loop processing can realize reduction in the amount of operation in long-period prediction though it provides lower precision in delay code search than that obtained by the closed-loop processing.

Closed-loop search, as mentioned above, is a method of generating an adaptive code vector corresponding to a given delay code, generating a synthesis signal by using the generated adaptive code vector and calculating an evaluation function (error power) between the synthesis signal and a speech signal to determine a delay code which makes the calculated error power the smallest. In other words, the closed-loop search is filtering processing using previous sound source signals and is different from the open-loop search which requires no filtering processing using previous speech signals.

However, search by the open-loop processing can attain lower search precision in practice compared with that obtained by the closed-loop processing, so that preliminary selection very often causes erroneous selection of delay codes. Such erroneous selection of a delay code in preliminary selection is one of the factors contributing to deterioration of sound quality.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a speech coder which solves the above described problems and realizes long-period prediction with a reduced amount of operation and to high precision.

Another object of the present invention is to provide a speech coder which can attain improved sound quality by making the number of selection errors in preliminary selection less than that occurring in preliminary selection by conventional open-loop processing using speech signals.

A further object of the present invention is to provide a speech coder which allows preliminary selection to be conducted with approximately the same amount of operation as that required for preliminary selection using open-loop processing and also enables more precise selection of delay codes.

According to one aspect of the invention, a speech coder comprising:    speech analysis means for determining a short-period prediction code indicative of frequency characteristics of a speech signal for every fixed section of said speech signal;    signal storage means for storing a previous sound source signal of a speech coding section;    delay code trial means for trying delay codes indicative of a pitch correlation of said speech signal;    long-period prediction preliminary selection means for selecting candidates for delay codes from said delay codes by closed-loop processing;    long-period prediction main selection means for determining an optimum delay code among said candidates by closed-loop processing; and    sound source code book searching means for determining an optimum quantization code for a residual signal determined by said optimum delay code.

In the preferred construction, the delay code trial means for preliminary selection tries delay codes indicative of a pitch correlation of a speech signal while evenly or unevenly thinning them out.

Also, the delay code trial means for preliminary selection tries said delay codes while thinning them out at short intervals in a range of small delay values and at long intervals in a range of large delay values.

In the preferred construction, the delay code trial means for preliminary selection selects only the codes in a predetermined section of delay codes indicative of a pitch correlation of a speech signal and tries the selected delay codes.

In the above-mentioned construction, the delay code trial means for preliminary selection selects only the codes in a predetermined section of delay codes indicative of a pitch correlation of a speech signal and tries the selected delay codes while evenly or unevenly thinning them out.

In this case, the main selection mean further comprises delay code selecting means for selecting and trying delay codes among several candidates for delay codes selected by said long-period prediction preliminary selection means.

In the preferred construction, the preliminary selection means further comprises:    means for generating an adaptive code vector corresponding to said delay code set by said preliminary selection delay code trial means from said signal storage means; and    means for calculating an evaluation function with said speech signal and said adaptive code vector as inputs; and    said long-period prediction main selection means further comprises:    means for determining a candidate for said delay code according to said evaluation function;    means for generating an adaptive code vector corresponding to a determined delay code from said signal storage means;    means for calculating an evaluation function with said speech signal and said adaptive code vector as inputs; and    means for determining said delay code which makes said evaluation function take the smallest value as an optimum delay code.

In the above-mentioned construction, the candidate determining means of said long-period prediction main selection means determines a plurality of delay codes having smaller values of said evaluation function as candidates.

According to another aspect of the invention, a speech coder comprising:    speech analysis means for determining a short-period prediction code indicative of frequency characteristics of a speech signal for every fixed section of said speech signal;    signal storage means for storing a previous sound source signal of a speech coding section;    preliminary selection delay code trial means for selecting only the codes in a predetermined section of delay codes indicative of a pitch correlation of said speech signal and trying the selected delay codes while evenly or unevenly thinning them out;    long-period prediction preliminary selection means for selecting candidates for delay codes from said delay codes by closed-loop processing;    main selection delay code selecting means for selecting delay codes among said candidates for delay codes and trying the selected delay codes;    long-period prediction main selection means for determining an optimum delay code among said delay codes by closed-loop processing; and    sound source code book search means for determining an optimum quantization code for a residual signal determined by said optimum delay code.

In the preferred construction, the said main selection delay code selecting means determines a delay code with which the evaluation function takes the smallest value among said candidates for delay codes and tries, as a delay code for main selection, a delay code whose delay value has a harmonic relationship with the delay value of the determined delay code.

Also, the main selection delay code selecting means selects a plurality of candidates among said candidates for delay codes and tries, as codes for main selection, delay codes whose delay values are approximate to the respective candidates.

In the preferred construction, the preliminary selection means further comprises:    means for generating an adaptive code vector corresponding to said delay code set by said preliminary selection delay code trial means from said signal storage means; and    means for calculating an evaluation function with said speech signal and said adaptive code vector as inputs; and    said long-period prediction main selection means further comprises:    means for generating an adaptive code vector corresponding to a determined delay code from said signal storage means;    means for calculating an evaluation function with said speech signal and said adaptive code vector as inputs; and    means for determining said delay code which makes said evaluation function take the smallest value as an optimum delay code.

In the preferred construction, the preliminary selection delay code trial means tries said delay codes while thinning them out at short intervals in a range of small delay values and at long intervals in a range of large delay values.

According to a still further aspect of the invention, a speech coder including long-period prediction means for outputting an optimum delay code of delay codes indicative of a pitch correlation of a speech signal, said long-period prediction means further comprising:    means for extracting delay codes while selecting a section of delay codes and/or thinning out the delay codes;    means for conducting preliminary selection of delay codes by executing closed-loop search with respect to the extracted delay codes; and    means for determining an optimum delay code by executing closed-loop search with respect to the preliminarily selected delay codes.

Other objects, features and advantages of the present invention will become clear from the detailed description given herebelow.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be understood more fully from the detailed description given herebelow and from the accompanying drawings of the preferred embodiment of the invention, which, however, should not be taken to be limitative to the invention, but are for explanation and understanding only.

In the drawings: <ul id="ul0001" list-style="none" compact="compact"><li>Fig. 1 is a block diagram showing the entire structure of a preferred embodiment of a speech processing unit including a speech coder according to the present invention and a speech decoder.</li><li>Fig. 2 is a block diagram showing the structure of a first embodiment of a long-period prediction circuit provided in the speech coder shown in Fig. 1.</li><li>Fig. 3 is a flow chart for use in explaining operation of the long-period prediction circuit according to the first embodiment.</li><li>Fig. 4 is a block diagram showing the structure of a second embodiment of the long-period prediction circuit provided in the speech coder shown in Fig. 1.</li><li>Fig. 5 is a diagram showing a specific example of the contents of selection of delay codes by a closed-loop preliminary selection delay code trial circuit in the long-period prediction circuit according to the second embodiment.</li><li>Fig. 6 is a block diagram showing the structure of a third embodiment of the long-period prediction circuit provided in the speech coder shown in Fig. 1.</li><li>Fig. 7 is a diagram showing a specific example of the contents of selection of delay codes by a closed-loop preliminary selection delay code trial circuit in the long-period prediction circuit according to the third embodiment.</li><li>Fig. 8 is a block diagram showing the structure of a fourth embodiment of the long-period prediction circuit provided in the speech coder shown in Fig. 1.</li><li>Fig. 9 is a diagram showing a specific example of the contents of selection of delay codes by a closed-loop preliminary selection delay code trial circuit in the long-period prediction circuit according to the fourth embodiment.</li><li>Fig. 10 is a block diagram showing the structure of a fifth embodiment of the long-period prediction circuit provided in the speech coder shown in Fig. 1.</li><li>Fig. 11 is a diagram showing a specific example of the contents of selection of delay codes by a closed-loop preliminary selection delay code trial circuit in the long-period prediction circuit according to the fifth embodiment.</li><li>Fig. 12 is a block diagram showing the structure of a sixth embodiment of the long-period prediction circuit provided in the speech coder shown in Fig. 1.</li></ul>

DESCRIPTION OF THE PREFERRED EMBODIMENT

Preferred embodiments of the present invention will be described in the following with reference to accompanying drawings.

With reference to Fig. 1, description will be given of the entire structure of a speech processing device including a speech coding processing unit and a speech decoding processing unit. The speech processing device includes a coding processing unit 10 and a decoding processing unit 20.

Respective component modules will be described with reference to Fig. 1. The speech coding processing unit 10 includes a buffer 110, an LPC analysis circuit 120, a parameter quantization circuit 130, a weighting circuit 140, an adaptive code book 150, a long-period prediction circuit 160, a sound source code book 170, a sound source code book search circuit 180, a gain code book 190, a gain code book search circuit 200 and a multiplexer 210.

100 represents a speech input terminal of the encoder. The buffer circuit 110 stores a speech signal input through the speech input terminal 100. The LPC analysis circuit 120 is for extracting an LPC coefficient, a spectrum parameter of speech. The parameter quantization circuit 130 is for quantizing LPC coefficients. The weighting circuit 140 is for weighting a speech signal with auditory sensation. The adaptive code book 150 is where previous sound source signals are stored.

The long-period prediction circuit 160 is for searching for a delay code (adaptive code vector) indicative of pitch correlation. The sound source code book 170 is where sound source code vectors of subframe length indicative of long-period prediction residues are stored. The sound source code book search circuit 180 is for determining an optimum quantization code (sound source code vector) by using the sound source code book.

The gain code book 190 is where parameters indicative of gain terms of adaptive code vectors and sound source code vectors are stored. The gain code book search circuit 200 is for determining quantization gains of adaptive code vectors and sound source code vectors by using the gain code book. The multiplexer 210 is a circuit for combining a series of codes and outputting them.

The speech decoding processing unit 20 includes a demultiplexer 220, an adaptive code book 150a, a sound source code book 170a, a gain code book 190a and a synthesis filter 230.

The demultiplexer 220 is a circuit for decoding encoded codes into a series of codes. The adaptive code book 150a, the sound source code book 170a and the gain code book 190a are the same as their counterparts in the speech coding processing unit 10.

The synthesis filter 230 is a circuit for reproducing a speech signal by using a generated sound source and a speech synthesis filter. A speech signal reproduced by the synthesis filter 230 is output from a speech output terminal 240.

Fig. 2 is a block diagram showing a first embodiment of a first long-term prediction circuit 160-1, which is a characteristic component of the present invention provided in the speech coding processing unit 10.

The first long-period prediction circuit 160-1 according to the first embodiment includes a closed-loop delay code preliminary selection unit 300 and a closed-loop delay code main selection unit 400.

The closed-loop delay code preliminary selection unit 300 includes a first closed-loop preliminary selection delay code trial circuit 310, a closed-loop adaptive code vector generating circuit 320 and a closed-loop evaluation function calculating circuit 330, while the closed-loop delay code main selection unit 400 includes a first closed-loop main selection delay code trial circuit 410, a closed-loop adaptive code vector generating circuit 420, a closed-loop evaluation function calculating circuit 430 and an optimum delay code determining circuit 440.

The closed-loop adaptive code vector generating circuits 320 and 420 generate a closed-loop adaptive code vector ad with respect to a set delay code d according to a previous sound source signal stored in the closed-loop adaptive code book 150.

With a speech signal z of the current frame stored in the speech buffer 110 and the closed-loop adaptive code vector ad as inputs, the closed-loop evaluation function calculating circuits 330 and 430 calculate an auto-correlation 〈H ad, H ad〉 and a cross-correlation 〈z, H ad〉 of a zero-state synthesis signal H ad to calculate 〈z, H ad〉2/〈H ad, H ad〉 as an evaluation function. Here, 〈,〉 denotes correlation.

In Fig. 2, since the closed-loop adaptive code vector generating circuits 320 and 420 provide the same function, either can be shared by the closed-loop delay code preliminary selection unit 300 and the closed-loop delay code main selection unit 400. The closed-loop evaluation function calculating circuits 330 and 430 also have the same function, so that they can be shared by the units 300 and 400.

The optimum delay code determining circuit 440 determines an optimum delay code with which an evaluation function takes the smallest value. As described above, the speech buffer 110 stores a speech signal of a section to be subjected to coding processing. Such a delay code is searched for that makes an error power with respect to the speech signal the smallest. The closed-loop adaptive code book 150 stores previous sound source signals as mentioned above.

The first closed-loop preliminary selection delay code trial circuit 310 is for changing (trying) delay codes to the amount corresponding to the size of the code book.

The first closed-loop main selection delay code trial circuit 410 is for preliminarily selecting a delay code according to an evaluation function calculated by the closed-loop evaluation function calculating circuit 330 and changing (trying) the selected delay code.

Now, flow of the entire processing of the speech processing device will be described with reference to Fig. 1.

First, in the speech coding processing unit 10, a speech signal is applied through the speech input terminal 100 and stored in the speech buffer 110. The LPC analysis circuit 120 conducts short-period analysis by using a fixed number of samples of speech signals stored in the speech buffer 110 to calculation an LPC coefficient indicative of spectrum characteristics of the speech signal.

The spectrum parameter obtained by the LPC analysis is quantized by the parameter quantization circuit 130 and a quantization code of the LPC coefficient is sent to the multiplexer 210, while the parameter is inversely quantized for use in the following coding processing.

Speech signals stored in the buffer 110 are weighted with auditory sensation using quantized/inversely quantized LPC coefficients by the weighting circuit 140 and used for the following code book search.

Code book search is conducted with respect to the adaptive code book, the sound source code book and the gain code book.

First, the long-period prediction circuit 160 conducts long-period prediction to determine an optimum delay code indicative of a pitch correlation and transfer the code (delay code) to the multiplexer 210, as well as generating an adaptive code vector.

Then, after subtraction of effects of the obtained adaptive code vector, the sound source code book search circuit 180 searches the sound source code book to determine a quantization code and generate a sound source code vector, as well as transferring the code (quantization code) to the multiplexer 210.

After the adaptive code vector and the sound source code vector are obtained, the gain code book search circuit 200 calculates gains of two sound sources and transfers their codes to the multiplexer 210. The multiplexer 210 combines the respective codes and converts them into transmission codes for output.

In the decoding processing by the decoding processing unit 20 shown in Fig. 1, the demultiplexer resolves applied transmission codes into respective codes. The demultiplexer decodes codes indicative of LPC coefficients into filter factors and transfers the same to the synthesis filter 230.

An adaptive code vector is generated from a delay code by using the adaptive code book 150a.

A sound source code vector is generated from a quantization code indicative of a code of a sound source by using the sound source code book 170a.

Gains of an adaptive code vector and a sound source code vector are calculated based on gain codes and each sound source is multiplied by a gain term to generate an input signal to the synthesis filter. Lastly, a speech signal is synthesized by the synthesis filter 230 in response to the input signal.

Now, with reference to Figs. 2 and 3, operation of the first long-period prediction circuit 160-1 according to the first embodiment will be described.

First, the first closed-loop preliminary selection delay code trial circuit 310 tries a delay code (Step 301) and the closed-loop adaptive vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 execute processing for each delay code.

The closed-loop adaptive vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set by the first closed-loop preliminary selection delay code trial circuit 310 by using the closed-loop adaptive code book 150 (Step 302).

Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function (Step 303).

According to the evaluation function calculated by the closed-loop evaluation function calculating circuit 330, the first closed-loop main selection delay code trial circuit 410 determines candidates for delay codes for final main selection (Step 304). Here, the candidates should be delay codes with small evaluation function values. More specifically, delay codes to the number of M will be selected, from a delay code with the smallest value of the evaluation function to a delay code with a M-th smallest evaluation function value.

With respect to the delay code set by the first closed-loop main selection delay code trial circuit 410, the closed-loop adaptive vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 440 execute common closed-loop adaptive code book search.

More specifically, the closed-loop adaptive code vector generating circuit 420 generates a closed-loop adaptive code vector ad with respect to the set delay code according to previous sound source signals stored in the closed-loop adaptive code book 150 (Step 305).

Then, with a speech signal z of the current frame stored in the speech buffer 110 and the closed-loop adaptive code vector ad as inputs, the closed-loop evaluation function calculating circuit 430 calculates an auto-correlation 〈H · ad, H · ad〉 and a cross-correlation 〈z, H · ad〉 of a zero-state synthesis signal H ad to calculate 〈z, H · ad〉²/〈H · ad, H · ad〉 as an evaluation function (Step 306).

Lastly, the optimum delay code determining circuit 440 determines an optimum delay code with which the evaluation function takes the smallest value and outputs the same as an optimum delay code d_opt (step 307).

With reference to Fig. 4, a second long-period prediction circuit 160-2 according to the second embodiment of the present invention will be described. Fig. 4 is a diagram showing the structure of the second long-period prediction circuit 160-2 according to the second embodiment of the present invention. In Fig. 4, component modules identified by the same reference numerals as those in Fig. 2 have the same structure and therefore no description thereof will be given here.

Fig. 5 is a diagram showing a specific example of selection of delay codes in the second closed-loop preliminary selection delay code trial circuit 311.

The second closed-loop preliminary selection delay code trial circuit 311, the characteristic component of the present embodiment, changes (try) delay codes while thinning them out evenly (at fixed intervals) or unevenly (at unfixed intervals). In other words, the delay codes are not all selected but are selected at certain intervals so that the number of delay codes to be selected is reduced.

Flow of the processing according to the second embodiment will be described in the following. Since the processing of the second embodiment only differs from that shown in Fig. 3 in the processing at Step 301, description will be made focusing on the difference in the following.

The second closed-loop preliminary selection delay code trial circuit 311 tries delay codes while thinning them out evenly or unevenly as mentioned above. Then, the closed-loop adaptive vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 conduct processing for each of the set delay codes.

As a manner of selecting delay codes by the second closed-loop preliminary selection delay code trial circuit 311, selection of the delay codes denoted by the sign of a circle in the section of "in case of selection" is adopted, for example. In Fig. 5, delay codes with small delay values are selected every two codes, while those with large delay values are selected every three codes. Such selection prevents degradation of coding precision. It is as a matter of course possible to select the codes at fixed intervals (e.g. every two codes) from the beginning to the end.

Thinning-out of delay codes as shown in Fig. 5 leads to reduction of the number of delay codes from 128 down to 40.

The closed-loop adaptive code vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set in the second closed-loop preliminary selection delay code trial circuit 311 by using the closed-loop adaptive code book 150. Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function. According to the evaluation function calculated in the closed-loop evaluation function calculating circuit 330, the first closed-loop main selection delay code trial circuit 410 determines a candidate for a delay code for main selection. At this time, a delay code with a small evaluation function value is selected as a candidate. More specifically, delay codes are selected to the number of M, from a delay code with the smallest evaluation function value to a delay code with a M-th smallest evaluation function value.

With respect to the delay code set in the first closed-loop main selection delay code trial circuit 410, the closed-loop adaptive code vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 440 execute the same closed-loop adaptive code book searching processing as that described in the first embodiment.

With reference to Fig. 6, description will be given of a third long-period prediction circuit 160-3 according to the third embodiment of the present invention. Fig. 6 is a diagram showing the structure of the third long-period prediction circuit 160-3 according to the third embodiment of the present invention. In Fig. 6, component modules identified by the same reference numerals as those in the first embodiment shown in Fig. 2 have the same structure and therefore no description thereof will be given here.

Fig. 7 is a diagram showing a specific example of selection of delay codes by the third closed-loop preliminary selection delay code trial circuit 312.

The third closed-loop preliminary selection delay code trial circuit 312, the characteristic component of the present embodiment, selects only the codes included in a certain section of delay codes and changes (try) them. In other words, not all the delay codes are selected but those included in a specific range set are selected so that the number of delay codes to be selected is reduced.

Flow of the processing according to the third embodiment will be described in the following. Since the processing of the third embodiment only differs from that shown in Fig. 3 in the processing at Step 301, description will be made focusing on the difference in the following.

First, the third closed-loop preliminary selection delay code trial circuit 312 selects a part of the sections of delay codes and tries the selected codes. Then, the closed-loop adaptive code vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 execute processing for each of the tried delay codes.

Adopted as a manner of selecting delay codes by the third closed-loop preliminary selection delay code trial circuit 312 is, for example, to select a range of delay codes indicated by the sign of circle in the section of "in case of selection" in Fig. 7. More specifically, only the delay codes having delay values from "40" to "59.5" are selected in Fig. 7.

The selection manner shown in Fig. 7 leads to reduction of the number of selected codes from 128 down to 40.

The closed-loop adaptive code vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set in the third closed-loop preliminary selection delay code trial circuit 312 by using the closed-loop adaptive code book 150.

Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function. According to the evaluation function calculated in the closed-loop evaluation function calculating circuit 330, the first closed-loop main selection delay code trial circuit 410 determines a candidate for a delay code for main selection. At this time, a delay code with a small evaluation function value is selected as a candidate. More specifically, delay codes are selected to the number of M, from a delay code with the smallest evaluation function value to a delay code with a M-th smallest evaluation function value.

With respect to the delay code set in the first closed-loop main selection delay code trial circuit 410, the closed-loop adaptive code vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 440 execute the same closed-loop adaptive code book searching processing as that described in the first embodiment.

With reference to Fig. 8, description will be given of a fourth long-period prediction circuit 160-4 according to the fourth embodiment of the present invention. Fig. 8 is a diagram showing the structure of the fourth long-period prediction circuit 160-4 according to the fourth embodiment of the present invention. In Fig. 8, component modules identified by the same reference numerals as those in the first embodiment shown in Fig. 2 have the same structure and therefore no description thereof will be given here.

Fig. 9 is a diagram showing a specific example of selection of delay codes by the fourth closed-loop preliminary selection delay code trial circuit 313.

The fourth closed-loop preliminary selection delay code trial circuit 313, the characteristic component of the present embodiment, selects only a certain section of delay codes and changes (try) delay codes in the selected section while evenly (at fixed intervals) or unevenly (at unfixed intervals) thinning them out. In other words, not all the delay codes are selected but those in a certain range limited are selected at fixed intervals so that the number of delay codes to be selected is reduced.

Flow of the processing according to the fourth embodiment will be described below. Processing of the fourth embodiment only differs from that shown in Fig. 3 in the processing at Step 301 and description will be therefore made focusing on the difference in the following.

The fourth closed-loop preliminary selection delay code trial circuit 313 selects a part of the sections of delay codes and tries the selected codes while evenly or unevenly thinning them out. Then, the closed-loop adaptive code vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 conduct processing with respect to each of the tried delay codes.

Adopted as a manner of selecting delay codes by the fourth closed-loop preliminary selection delay code trial circuit 313 is, for example, to select delay codes indicated by the sign of circle in the section of "in case of selection" in Fig. 9. More specifically, illustrated in Fig. 9 is selecting the range of delay values between "40" and "59.5" and selecting delay codes every other code in that range.

Such selection manner as shown in Fig. 9 leads to reduction of the number of selected codes from 128 down to 40.

The closed-loop adaptive code vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set in the third closed-loop preliminary selection delay code trial circuit 312 by using the closed-loop adaptive code book 150.

Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function. According to the evaluation function calculated in the closed-loop evaluation function calculating circuit 330, the first closed-loop main selection delay code trial circuit 410 determines a candidate for a delay code for main selection. At this time, delay codes with small evaluation function values are selected as candidates. More specifically, delay codes are selected to the number of M, from a delay code with the smallest evaluation function value to a delay code with a M-th smallest evaluation function value.

With respect to the delay code set in the first closed-loop main selection delay code trial circuit 410, the closed-loop adaptive code vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 430 execute the same closed-loop adaptive code book searching processing as that described in the first embodiment.

With reference to Fig. 10, description will be given of a fifth long-period prediction circuit 160-5 according to the fifth embodiment of the present invention. Fig. 10 is a diagram showing the structure of the fifth long-period prediction circuit 160-5 according to the fifth embodiment of the present invention. In Fig. 10, component modules identified by the same reference numerals as those in the first embodiment shown in Fig. 2 have the same structure and therefore no description thereof will be given here.

Fig. 11 is a diagram showing a specific example of selection of delay codes by the fifth closed-loop preliminary selection delay code trial circuit 314.

The fifth closed-loop preliminary selection delay code trial circuit 314, the characteristic component of the present embodiment, selects only a certain section of delay codes and changes (try) delay codes in the selected section while evenly (at fixed intervals) or unevenly (at unfixed intervals) thinning them out. In other words, not all the delay codes are selected but those in a certain selection range limited are selected at fixed intervals so that the number of delay codes to be selected is reduced.

The second closed-loop main selection delay code trial circuit 411, another characteristic component of the present embodiment, determines a delay code with which the evaluation function calculated in the closed-loop evaluation function calculating circuit 330 takes the smallest value and tries, as a code for main selection, a delay code which has a harmonic relationship with the determined delay code, that is, which has a relationship of a multiple of an integer to a fraction of an integral number, or a delay code which has a relationship approximate to the former relationship.

Flow of the processing according to the fifth embodiment will be described below. Processing of the fifth embodiment only differs from that shown in Fig. 3 in the processings at Steps 301 and 304 and description will be therefore made focusing on these differences in the following.

The fifth closed-loop preliminary selection delay code trial circuit 314 selects a part of the sections of delay codes and tries delay codes in the selected range while evenly or unevenly thinning them out. Then, the closed-loop adaptive code vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 conduct processing with respect to each of the tried delay codes.

Adopted as a manner of selecting delay codes in the fifth closed-loop preliminary selection delay code trial circuit 314 is to select delay codes indicated by the sign of circle in the section of "in case of selection" in Fig. 11, for example. More specifically, illustrated in Fig. 11 is selecting the range of delay values between "39" and "63" and selecting delay codes having small delay values while thinning them out every other code and delay codes having large delay values while thinning them out every two codes.

Such selection as shown in Fig. 11 results in reducing the number of delay codes from 128 down to 20.

The closed-loop adaptive code vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set in the fifth closed-loop preliminary selection delay code trial circuit 314 by using the closed-loop adaptive code book 150.

Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function. According to the evaluation function calculated in the closed-loop evaluation function calculating circuit 330, the second closed-loop main selection delay code trial circuit 411 determines a candidate for a delay code for main selection.

Selection of delay codes by the second closed-loop main selection delay code trial circuit 411 is carried out by first determining one delay code with which the evaluation function takes the smallest value and then selecting, as candidates to the number of N, delay codes which take delay values having a harmonic relationship (a multiple of an integer to a fraction of an integral number) with the delay value of the determined delay code, or delay codes which take delay values approximate to the delay values having the harmonic relationship (a multiple of an integer to a fraction of an integral number) with the delay value of the determined delay code.

With respect to the delay codes set in the second closed-loop main selection delay code trial circuit 411, the closed-loop adaptive code vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 440 execute the same closed-loop adaptive code book searching processing as that described in the first embodiment.

With reference to Fig. 12, description will be given of a sixth long-period prediction circuit 160-6 according to the sixth embodiment of the present invention. Fig. 12 is a diagram showing the structure of the sixth long-period prediction circuit 160-6 according to the sixth embodiment of the present invention. In Fig. 12, component modules identified by the same reference numerals as those in the fifth embodiment shown in Fig. 10 have the same structure and therefore no description thereof will be given here.

The sixth closed-loop preliminary selection delay code trial circuit 315, the characteristic component of the present embodiment, is structured to selectively adopt the delay code selecting methods used by the closed-loop preliminary selection delay code trial circuits 310, 311, 312 and 313 as described in the above first to fourth embodiments. The remaining part is the same as that of the above-described fifth embodiment.

Flow of the processing according to the sixth embodiment will be described below. Processing of the sixth embodiment only difrs frfeom that shown in Fig. 3 in the processings at Steps 301 and 304 and description will be therefore made focusing on these differences in the following.

In this embodiment, the sixth closed-loop preliminary selection delay code trial circuit 315 first selects and tries delay codes by any of the methods described in the above first to fourth embodiments. Then, the closed-loop adaptive code vector generating circuit 320 and the closed-loop evaluation function calculating circuit 330 conduct processing with respect to each of the tried delay codes.

With respect to a speech signal having a large energy which requires higher quality coding, for example, delay codes are tried without thinning them out as is described in the first embodiment.

The closed-loop adaptive code vector generating circuit 320 generates a closed-loop adaptive code vector ad corresponding to a delay code d set in the sixth closed-loop preliminary selection delay code trial circuit 315 by using the closed-loop adaptive code book 150. Then, the closed-loop evaluation function calculating circuit 330 calculates an evaluation function.

According to the evaluation function calculated by the closed-loop evaluation function calculating circuit 350, the second closed-loop main selection delay code trial circuit 411 determines a candidate for a delay code for main selection.

Selection of delay codes by the second closed-loop main selection delay code trial circuit 411 is carried out by first determining one delay code with which the evaluation function takes the smallest value and then selecting, as candidates to the number of N, delay codes which take delay values having a harmonic relationship (a multiple of an integer to a fraction of an integral number) with the delay value of the determined delay code, or delay codes which take delay values approximate to the delay values having the harmonic relationship (a multiple of an integer to a fraction of an integral number) with the delay value of the determined delay code.

With respect to the candidates for delay codes set by the second closed-loop main selection delay code trial circuit 411, the closed-loop adaptive code vector generating circuit 420, the closed-loop evaluation function calculating circuit 430 and the optimum delay code determining circuit 440 conduct the same closed-loop adaptive code book searching processing as that shown in the first embodiment.

As described in the foregoing, according to the above-described respective embodiments, closed-loop preliminary selection can realize reduction of the amount of operation, without decreasing precision, through selection of only a part of sections of delay codes and selection of delay codes at fixed intervals while evenly or unevenly thinning them out.

In the closed-loop preliminary selection where 30 delay codes are selected, for example, an obtained SNR (signal-noise ratio) is 0.1 dB higher than that obtained with conventional open-loop processing using 60 delay codes.

Although (cross-correlation)²/(auto-correlation) is used as an evaluation function in the above-described embodiments, (cross-correlation)² or energy of an error signal may be used to obtain the same effect.

In addition, while it is assumed in the above-described embodiments that a signal stored in the speech buffer is a zero-state subtraction signal z, the same effect can be attained by using an input speech signal, a residual signal or a signal weighted with auditory sensation.

Furthermore, while the above embodiments employ filtering using the synthesis filter H for the calculation of cross-correlation and auto-correlation, using an approximation expression can produce the same effect. As a method of this approximation, incorporated herein by reference is, for example, IM. Transco and B.S. Atal, U.S., "EFFICIENT PROCEDURES FOR FINDING THE OPTIMUM INNOVATION IN STOCHASTIC CORDERS", ICASSP Proceedings, pp. 2375-2378, 1986.

Although one optimum delay code is selected in the above embodiments, the embodiments can produce the same effect by selecting a plurality of candidates and conducting main selection in the following steps (search of a sound source code book or a gain code book) or by conducting optimum delay code search simultaneously with the following code book search.

In addition, although delay codes have been described with respect to decimal fractional delay in the above embodiments, the same effect can be obtained in a case of integral number delay.

Furthermore, while no sound source cook book is specified in the above embodiments, a noise code book or a learning code book obtained by leaning with the vector quantization (VQ) algorithm may be used to produce the same effect. The Literature 1 may be referred to for the noise code book.

Although in the above fifth and sixth embodiments, the description has been given of a case where one candidate is selected as a delay code and a delay code which has a harmonic relationship with the selected delay code is further selected as a method of selecting delay codes for main selection, the same effect can be obtained by selecting a plurality of candidates in preliminary selection and further selecting delay codes whose delay values are approximate to the respective candidates.

While description has been given of a case where the above embodiments use an LPC analysis circuit, the BURG method where spectrum parameters are extracted or other analysis methods may be employed to attain the same effect.

Although the above embodiments have been described using an LPC coefficient, it is apparent that the same effect can be obtained by using other spectrum parameters such as a PARCOR coefficient or an LSP coefficient.

It is also apparent that the sound source code book search circuit of one-stage structure in the above embodiments may be of multistage structure to produce the same effect.

The present invention realizes long-period prediction by two-stage selection including the closed-loop preliminary selection and the closed-loop main selection. Preliminary selection by closed-loop processing enables preliminary selection with higher precision than conventional open-loop preliminary selection. In addition, the present invention can realize reduction of the amount of operation, without decreasing precision, by selecting only delay codes of a part of sections (for example, extracting delay codes with medium delay values out of all the delay codes) at the time of closed-loop preliminary selection or evenly or unevenly thinning out selected codes (for example, thinning out delay codes every other code in a range of small delay values and every two codes in a range of large delay values).

As described in the foregoing, because the present invention realizes long-period prediction by two-stage selection including preliminary selection employing closed-loop processing and main selection employing closed-loop processing and realizes preliminary selection of delay codes by closed-loop processing using sound source signals, the preliminary selection involves less selection error than that occurs in preliminary selection by conventional open-loop processing using speech signals, whereby sound quality is improved.

As compared with a conventional manner employing open-loop processing for preliminary selection, the present invention enables approximately the same extent of reduction in the amount of operation and pitch estimation with higher precision, thereby effectively preventing deterioration of sound quality.

In addition, the present invention realizes reduction of the amount of operation, without decreasing precision in estimation, by selecting a part of sections of delay codes or evenly or unevenly thinning out the delay codes.

Although the invention has been illustrated and described with respect to exemplary embodiment thereof, it should be understood by those skilled in the art that the foregoing and various other changes, omissions and additions may be made therein and thereto, without departing from the spirit and scope of the present invention. Therefore, the present invention should not be understood as limited to the specific embodiment set out above but to include all possible embodiments which can be embodies within a scope encompassed and equivalents thereof with respect to the feature set out in the appended claims.