Signal processing circuit for switch capable of reducing insertion loss.
Abstract
A high frequency power amplifier is implemented by a GaAs FET and is supplied with a positive and a negative power supply. The amplifier amplifies the power of an input signal and delivers the amplified signal to a high frequency switch (1). The high frequency switch is supplied with switch control voltages in the form of the positive and negative voltages. Since the switch control voltages are implemented as the positive and negative voltages, a great difference in level between the switch control voltages is achievable which improves insertion loss. While the high frequency switch may also be implemented by GaAs FETs, the insertion loss will be further reduced if the negative voltage is applied to the high frequency switch only during transmission. In this case, current consumption will also be reduced if the generation of the negative voltage is controlled at the negative voltage source side.

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Projected expiry passed 26 April 2014, 12.4 years ago.
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3 sheets
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| EP0982796A2 | Cited by | European Patent Office (EPO) | Search report |
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| US3872325A | Cites | United States of America | Examiner |
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| JPS62159921A | Cites | Japan | Examiner |
8 members in 4 offices; this record represents the family
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 12551393 | Japan | – | |
| 12551393 | Japan | A | |
| JP19930125513 | – | – | – |
| 12551393 | – | – | – |
Members8
| Document | Office | Kind | |
|---|---|---|---|
| EP0622901A2This record | European Patent Office (EPO) | A2 | |
| JPH06314985A | Japan | A | |
| EP0622901A3 | European Patent Office (EPO) | A3 | |
| JPH07118666B2 | Japan | B2 | |
| US5554892A | United States of America | A | |
| EP0622901B1 | European Patent Office (EPO) | B1 | |
| DE69416338D1 | Germany | D1 | |
| DE69416338T2 | Germany | T2 |
37 legal events, as 3 offices reported them to INPADOC
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| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Gb: european patent ceased through non-payment of renewal feeCeasedGBPC | GBPC | EP | |
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| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
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| European patent in force as of 2002-01-01IF02 | IF02 | GB | |
| Se: european patent has lapsedLapsedEUG | EUG | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
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Numbers
- Publication
- 0622901
- Publication, DOCDB
- 0622901
- Publication, EPODOC
- EP0622901
- Application
- 941064784
- Application, DOCDB
- 94106478
- Application, EPODOC
- EP19940106478
Titles6
- German
- Signalverarbeitungsschaltung für einen Schalter zur Reduzierung von Überladungsverlusten
- English
- Signal processing circuit for switch capable of reducing insertion loss
- French
- Circuit de traitement d'un signal pour un commutateur capable de réduire les pertes d'insertion
- German
- Signalverarbeitungsschaltung für einen Schalter zur Reduzierung von Überladungsverlusten.
- English
- Signal processing circuit for switch capable of reducing insertion loss.
- French
- Circuit de traitement d'un signal pour un commutateur capable de réduire les pertes d'insertion.
Classification
- CPC, 2
- H03K17/063
- Y10T307/76
- IPC, 4
- H03K17 693
- H03K17 06
- H04B1 18
- H04B1 40
Designated states6
- Contracting states, 6
- Germany
- France
- United Kingdom
- Italy
- Netherlands (Kingdom of the)
- Sweden