Multiple error correcting method.

The present invention relates to an error correcting method and, more particularly, to a multiple error correcting method for correcting erroneous symbols included in data which is encoded in accordance with an error correcting code, and then modulated based on a modulation code such as eight-to-fourteen modulation (EFM), eight-to-ten modulation (ETM), etc.

In the conventional digital audio apparatus, such as a digital audio tape recorder (DAT) or compact disk (CD), audio data is encoded in accordance with the C1/C2 cross interleave product code. In more detail, audio data with a plurality symbols is first encoded in accordance with a second Reed-Solomon code (C2 code) capable of correcting triple errors, interleaved according to a predetermined order, and then encoded in accordance with a first Reed-Solomon code (C1 code) capable of correcting double errors.

In the conventional decoding system, a double-error correcting method or a quadruple-erasure correcting method is performed for decoding the data encoded based on the first Reed-Solomon code, a double-error correcting method or a sixfold-erasure correcting method are performed for decoding the data encoded based on the second Reed-Solomon code, under the constraint of real-time processing.

Here, an erasure is an erroneous symbol whose location is known. A symbol is a sequence of adjacent binary digits operated upon as a unit, and is the constitutional element of a word.

Conventional technologies related to this are disclosed in U.S.P. No. 4,476,562 by Sony, and U.S.P. No. 4,875,211 by Matsushida.

Referring to the Matsushida patent, the positions of two or more multiple-errors can be detected by a chain search algorithm. Here, however, the calculation for the chain search algorithm must be repeatedly performed as times as the number of symbols included in a word. On the other hand, in the Sony patent, a double-error correction and a quadruple-erasure correction can be easily performed, but an triple (or more) error correction cannot be performed.

An object of the present invention is to provide a multiple error correcting method for correcting multiple erroneous symbols.

Another object of the present invention is to provide a multiple error correcting method which can produce the error locations of three or more erroneous symbols and is easily performed in a Galois Field calculator in real time.

According to one aspect of the present invention, there is provided a multiple error correcting method for correcting erroneous symbols included in data encoded in accordance with an error correcting code and then modulated in accordance with a modulation code, comprising the steps of: demodulating the data in accordance with the modulation code and producing demodulated data with a demodulation flag indicating whether demodulation is possible; producing syndromes using a receiving word constituted by a plurality of said demodulated data based on said error correcting code; generating the number of erroneous symbols included in said receiving word based on said syndromes, and the number of erasures included in said receiving word based on said demodulation flags; determining the error form of the receiving word based on the number of erroneous symbols and the number of erasures; and correcting the receiving word based on said error correcting code and said error form.

According to another aspect of the present invention, there is also provided a multiple error correcting method for decoding data sequentially encoded in accordance with a first error correcting code and a second error correcting code and then modulated in accordance with a modulation code, comprising the steps of: demodulating the data based on said modulation code and producing demodulated data with a demodulation flag indicating whether demodulation is possible; producing first syndromes using a first receiving word constituted by a plurality of said demodulated symbol in accordance with said first error correcting code; determining the first error form of the first receiving word based on said first syndromes and demodulation flags therein; correcting the first receiving word based on said first error correcting code and the first error form, and then producing a decoded data including a plurality of error corrected symbols and error flags thereof indicating whether the error is corrected; producing second syndromes using a second receiving word including a plurality of said error corrected symbols in accordance with said second error correcting code; determining the second error form of the second receiving word based on said second syndromes and said error flags therein; and second-error-correcting by correcting the second receiving word based on said second error correcting code and the second error form.

According to a further aspect the present invention provides a multiple error correcting method for correcting erroneous symbols included in data encoded based on an error correcting code, comprising the steps of: producing syndromes using the data; producing coefficients of an error location polynomial based on said syndromes, producing an index based on said coefficients, reading out a plurality of virtual roots of said error location polynomial from a specified memory related to said index, transforming said virtual roots into error locations based on a specified relationship, producing error values based on said syndromes and said error locations; and transforming the data into error-corrected data based on said error locations and said errorval- ues.

In an embodiment of said further aspect of the present invention, one aspect of the multiple error correcting method comprises the steps of: producing an index<maths id="math0001" num=""><img file="EP0592229A2_D0001.tif" /></maths> wherein σ₁, σ₂ and α₃ represent said error locations k1 represents σ₁²+σ₂ and k₂ represents σ₁σ₂ + α3, if said error correcting code is a Reed-Solomon code capable of correcting a triple erroneous symbols; <ul id="ul0001" list-style="none"><li>reading out virtual roots using said index from a specified memory which stores roots of the equation f(Z)=_Z3+Z+A; and</li><li>transforming said virtual roots into error locations as follows<maths id="math0002" num=""><img file="EP0592229A2_D0002.tif" /></maths><maths id="math0003" num=""><img file="EP0592229A2_D0003.tif" /></maths><maths id="math0004" num=""><img file="EP0592229A2_D0004.tif" /></maths></li><li>wherein Z₁, Z₂ and Z₃ present said virtual roots, and x^j1, _Xj² and x^j3 represent said error locations.</li></ul>

Embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which; <ul id="ul0002" list-style="none"><li>Fig.1 is a schematic diagram of the digital audio recording system.</li><li>Fig.2 is a flowchart which illustrates the operation of the error-correcting encoder shown in Fig. 1.</li><li>Fig.3 illustrates memory map of the C1/C2 cross interleave product code</li><li>Fig.4 is a flowchart illustrating the multiple error correcting method according to an embodiment of the present invention.</li><li>Fig.5 is a flowchart for explaining step 403 shown in Fig.4, under the constraint of the error correcting code being a Reed-Solomon code.</li><li>Fig.6 is for explaining the step 502 shown in Fig.5.</li><li>Fig.7 is for explaining the step 503 shown in Fig.5, provided that the error form is pure error form in which the receiving polynomial includes only erroneous symbols whose locations are not known.</li><li>Fig.8 is for explaining step 503 shown in Fig.5, provided that the error form is that for a pure erasure in which the receiving polynomial includes only erroneous symbols whose locations are known.</li><li>Fig.9 is for explaining step 503 shown in Fig.5, provided that the error form is that for a composite error in which the receiving polynomial includes both pure errors and erasures;</li><li>Fig.10 is a flowchart for illustrating the multiple error correcting method according to another embodiment of the present invention;</li><li>Fig. 11 is for explaining the method of producing error locations according to an embodiment of the present invention, and</li><li>Fig.12 is for explaining the method of producing error locations of a third-order error location polynomial.</li></ul>

Fig.1 is a schematic diagram of the digital audio recording system. The digital audio recording system includes an analog-to-digital converter 101, a source encoder 102, an error-correcting encoder 103, a modulator 104, a signal encoder 105 and a recording medium 106.

An audio signal is converted into digital data through analog-to-digital converter 101. This digital data is applied to source encoder 102, to be compressed in accordance with a specified algorithm. The compressed data is applied to error-correcting encoder 103, whereby it is encoded in accordance with an error code scheme such as C1/C2 cross interleave product code. Modulator 104 receives the output of error-correcting encoder 103 and then modulates the output based on a modulation code such as an EFM or ETM code.

Modulation code is also called run-length limited code, which constrains a run-length of 1 and/or 0 in binary sequence to a predetermined number. The EFM transforms 8-bit data into 14-bit data with run-length constraints, and the ETM transforms 8-bit data into 10-bit data with run-length constraints.

Binary information supplied from modulator 104 is recorded on recording medium 106 such as magnetic tape and magnetic disk in the form of a coded binary waveform. This coded binary waveform includes a non-return-to-zero (NRZ) coded waveform and a modified non-return-to-zero (NRZI) coded waveform. In the NRZ coding, a logic "1" and a logic "0" of the binary data can be identified by the positive-going and negative-going transitions of the waveform, respectively. In NRZI coding, a logic "1" and a logic "0" of the binary data may be represented by the presence and absence of transition in the binary waveform, respectively. Signal encoder 105 performs such signal encoding as NRZ coding or NRZI coding.

Fig.2 is a flowchart which illustrates the operation of the error-correcting encoder shown in Fig.1.

In step 201, C2 coding is performed, which is for encoding the data supplied from source encoder 102 in accordance with a second Reed-Solomon code capable of correcting double errors to produce C2 code words which include a plurality of symbols. The plurality of symbols included in the C2 code words are then interleaved in predetermined order in step 202. In step 203, C1 encoding is performed, which is for encoding the interleaved data in accordance with a first Reed-Solomon code capable of correcting triple errors.

Fig.3 illustrates memory map of the C1/C2 cross interleave product code, wherein the symbols arranged horizontally constitute a second code word concerning the C2 code and the symbols arranged vertically constitute a first code word concerning the C1 code. The C2 code is a Reed-Solomon code as denoted by RS(32,26,7) which is capable of correcting triple erroneous symbols and the C1 code is a Reed-Solomon code as denoted by RS(24,20,5) which is capable of correcting double erroneous symbols. As shown in Fig.3, each C1 code word includes 24 symbols and each C2 code word includes 32 symbols. In more detail, each C1 code words include 20 information symbols and four parity symbols (called P parity symbols), and each C2 code word includes 26 information symbols and six parity symbols (called Q parity symbols). Here, C2 coding generates the Q parity symbols which, together with the information symbols for the C2 code words, constitute the information symbols for a C1 code word. Meanwhile, the P parity symbols are generated in C1 coding.

Each symbol is comprised of 8-bits. In the memory map, D_#._# denotes the symbols included in the data supplied from source encoder 102, P_#._# denotes P parity symbols, and Q_#._# denotes Q parity symbols.

Fig.4 is a flowchart illustrating the multiple error correcting method according to an embodiment of the present invention.

Referring to Fig.4, in step 401, the data made by encoding based on an error correcting code and then modulating in accordance with a modulation code, is first demodulated based on the modulation code. For example, 14-bit data is demodulated into 8-bit data in accordance with EFM demodulation, while 10-bit data is demodulated into 8-bit data accordance with ETM demodulation. Here, if the 14-bit data (to be demodulated via EFM) or the 10-bit data (to be demodulated via ETM) includes an unallowable pattern, the demodulated 8-bit data (i.e., a demodulated symbol) can be set as a special bit pattern (e.g., "00000000" or "11111111"). In step 402, demodulation flags are produced, which signify whether or not the demodulation of each symbol is possible. Accordingly, after step 402. each symbol has one bit beyond the basic eight, which acts as a demodulation flag. The demodulation flag bit may be set to "1" in the case of demodulation being impossible and to "0" in the case of demodulation being possible. In step 403, the demodulated data is decoded using the demodulation flag of each symbol in accordance with the error correcting code. The demodulation flag plays an important role in producing the error location of an error location polynomial.

Fig.5 is a flowchart for explaining step 403 shown in Fig.4, under the constraint of the error correcting code being a Reed-Solomon code.

Referring to Fig.5, syndromes are produced based on the error correcting code and the demodulated 8- bit data. In more detail, syndromes (S_k) are produced in accordance with the formula S_k = r(_ak + ₁₎ wherein k is a whole number, a is a primitive polynomial of the Reed-Solomon code in Galois Field GF(2⁸), and r(x) represents a receiving polynomial made of a plurality of demodulated symbols. For example, the receiving polynomial is 24 symbols if the Reed-Solomon code is a RS(24,20,5), and the receiving polynomial is 32 symbols if the Reed-Solomon code is a RS(32.26,7). The number of syndromes is 4t or more, provided that the Reed-Solomon code is for correcting t errors, because the total number of erroneous symbols is 2t. Here, the erroneous symbols includes errors and erasures.

In step 502, the error form of the receiving polynomial is determined based on the numbers of syndromes and erasures, erasure being representative of symbols having a demodulation flag of "1." Step 503 is for producing error locations of the error location polynomial, using the demodulation flag. Error locations represent the location of the erroneous symbols in the receiving polynomial. Accordingly, if the nth symbol in the receiving polynomial has the demodulation flag set to "1," the error location is "n." Step 504 is for producing error values using the error locations based on the Reed-Solomon code, and step 505 is for correcting the receiving polynomial in accordance with the error locations and the error values. That is, by letting the error values be e₁, e₂..., e_", and the error presumption polynomial S2(x) be σ_v + (σ_vS₀+σ_{v- i})x + (σ_vS₁+σ_{v- 1}S₀+σ_v-2)x² +... + (σ_vS_{v- 1}+σ_{v 1}S_v-2+...+1 )x^v, the error values are produced in accordance with the following:<maths id="math0005" num=""><img file="EP0592229A2_D0005.tif" /></maths>

Then, the correcting of the receiving polynomial is performed based on the following:<maths id="math0006" num=""><img file="EP0592229A2_D0006.tif" /></maths>wherein e(x) satisfies the equation<maths id="math0007" num=""><img file="EP0592229A2_D0007.tif" /></maths> c(x) represents the corrected polynomial or the corrected word, and r(x) represents the receiving polynomial or the receiving word.

Fig.6 is for explaining the step 502 shown in Fig.5.

Referring to Fig.6, step 601 is for producing the number of erasures by counting the number of symbols having their corresponding demodulation flags set to "1" in a receiving polynomial. In step 602, the number of erroneous symbols included in the receiving polynomial is produced in accordance with the syndromes.

To determine the number of erroneous symbols, a matrix M is used, and is expressed<maths id="math0008" num=""><img file="EP0592229A2_D0008.tif" /></maths> where v is a variable of 2t+1, 2t, 2t-1..., 1.

Among values of the variable v, the maximum value which causes the determinant value of matrix M not to equal "0" (i.e., det[M]≠0), is the number of erroneous symbols in the receiving polynomial. Here, if the maximum value or the number of erroneous symbols is 2t+1, error correction is not possible.

Step 603 is for determining whether or not the number of erroneous symbols N is more than 2t, provided that the Reed-Solomon code is capable of correcting t multiple errors. If the number of erroneous symbols N is more than 2t, the error form is determined to be an "uncorrectable" error form in step 609. In step 604, the number of pure errors N_error is produced by subtracting the number of erasures (N_erasure) from the number of erroneous symbols N. Here, the pure error is an erroneous symbol whose location is not known. Step 605 is for determining whether or not the number of pure errors (N_error) is more than t, provided that the Reed-Solomon code is capable of correcting t multiple errors. If the number of pure errors N_error is greater than t, the error form is determined to be the uncorrectable error form in step 609. Step 606 is for determining whether or not the number of erroneous symbols N is zero. If the number of erroneous symbols is zero, the error form is determined to be a "no error" form in step 610. In step 607, it is determined whether or not the number of pure errors N_error is zero, and if so, the error form is determined to be a pure erasure form in step 611. In step 608, it is determined whether the number of erasures N_erasure is zero. If the number of erasures N_erasure is zero, the error form is determined to be a "pure error" form in step 612, if not, the error form is determined to be a "composite" error form in step 613. The composite error form is for the receiving polynomial including at least one pure error and at least one erasure.

Fig.7 is for explaining the step 503 shown in Fig.5, provided that the error form is pure error form in which the receiving polynomial includes only erroneous symbols whose locations are not known.

Referring to Fig.7, step 701 is for producing the coefficients of a vth-order error location polynomial a(x). Here, the order value v is equal to the number of erroneous symbols and, in more detail, equals the number of pure errors. The error location polynomial of the vth order can be represented<maths id="math0009" num=""><img file="EP0592229A2_D0009.tif" /></maths> where α1 through σ_v are coefficients.

The coefficients of error location polynomial are produced as follows:<maths id="math0010" num=""><img file="EP0592229A2_D0010.tif" /></maths>

For example, if v is two (2nd order), the error location polynomial can be represented by σ(x)=x²+σ₁x+σ2. The coefficients a₁ and a₂ of this error location polynomial are produced by using the following equations.<maths id="math0011" num=""><img file="EP0592229A2_D0011.tif" /></maths><maths id="math0012" num=""><img file="EP0592229A2_D0012.tif" /></maths><maths id="math0013" num=""><img file="EP0592229A2_D0013.tif" /></maths>

Step 702 is for producing the error locations which are the roots of the error location polynomial of vth order. With regard to obtaining the roots of an equation such as error location polynomial, the higher the order of the equation is, the more difficult producing the roots thereof is. Ordinarily, fifth-order equations and higher are, in many cases, unsolvable.

However, in the Galois Field for Reed-Solomon code, the roots can be theoretically obtained, because the roots are the elements included in the Galois Field which includes a finite number of elements. That is, the roots are produced by substituting all elements included in the Galois Field for in the error location polynomial and then seeking the element which satisfies the equation.

However, the roots of an equation have to be obtained in more efficient manner, when underthe constraints of real-time processing and considering hardware realization. The algorithms related thereto are disclosed in the embodiments of the prior art, but are insufficient for triple error correction and higher.

The present invention aims to provide a method for efficiently producing the error locations of the error location polynomial, particularly for triple-error-corrections. This method will be explained in reference with Fig.11.

Fig.8 is for explaining step 503 shown in Fig.5, provided that the error form is that for a pure erasure in which the receiving polynomial includes only erroneous symbols whose locations are known.

Referring to Fig.8, in step 801, the error locations are produced by the position of erasures being substituted for the error locations x^j1, xi²..., x^jv, where "v" is the number of erroneous symbols or erasures.

Step 802 is for producing the coefficients of the error location polynomial σ(x), that is, σ_v + σ_v-1x + σ_{v- 2}x² + ... + xv. Here, "x" of the error location polynomial is substituted by the error locations x^j1-x^jv, thereby v simultaneous equations are composed. The solutions of v simultaneous equations are coefficients of the error location polynomial. Accordingly, coefficients are produced in accordance with the error locations.

Fig.9 is for explaining step 503 shown in Fig.5, provided that the error form is that for a composite error in which the receiving polynomial includes both pure errors and erasures.

Referring to Fig.9, Step 901 is for producing coefficients of error location polynomial σ(x), that is, xv + σ₁x^v- + ... σ_v-1x + σ_v. where "v" is the number of erroneous symbols or the sum of N_error and N_erasure. The coefficients σ₁ through σ_v are produced in accordance with the above Equation 2.

In step 902, N_erasure error locations are substituted by the positions of erasures in the receiving polynomial. Step 903 is for producing N_error error locations in accordance with the relationship of the error locations and the coefficients, or the relationship of the roots and the coefficients of an equation. A more detailed description related to step 903 is referenced in U.S.P 4,476,562 by Sony.

Fig.10 is a flowchart for illustrating the multiple error correcting method according to another embodiment of the present invention.

Referring to Fig.10, in step 1001, the data made by sequentially encoding based on a second error correcting code and a first error correcting code and then modulating in accordance with a modulation code, is first demodulated based on the modulation code. (This step is the same as step 401 of Fig.4.)

In step 1002, the demodulation flags are produced, which signifies whether or not the demodulation of each symbol is possible. Step 1003 is for decoding a first receiving polynomial based on the first error correcting code such as Reed-Solomon code RS(24,20,5) which is capable of correcting double errors. Here, the first receiving polynomial includes a plurality of demodulated symbols (e.g., 24 symbols), provided that the first Reed-Solomon code is RS(24,20,5). Also. step 1003 is for producing error flags indicating whether or not each symbol has been corrected. (Decoding the first receiving polynomial in step 1003 can be explained by Fig.5 through Fig.9.)

In step 1004. the decoded symbols is deinterleaved in accordance with a predetermined order which is the inverse of the interleaving order. Step 1005 is for decoding a second receiving polynomial based on the second error correcting code such as Reed-Solomon code RS(32,26,7) which is capable of correcting triple errors. The second receiving polynomial is composed of a plurality of decoded symbols (e.g., 32 symbols) of step 1003, provided that the second error correcting code is RS(32,26,7). (Step 1005 can be also explained by Figs.5-9.)

Fig.11 is for explaining the method of producing error locations according to an embodiment of the present invention.

Referring to Fig.11, step 1101 is for producing an index 8 using coefficients of the error location polynomial. In step 1102, virtual roots are read out from a specified memory related to the index 0. The specified memory is also called a look-up table (LUT) which includes a plurality of roots with regard to a predetermined equation such as Z³+Z+A=₀. Step 1103 is for transforming the virtual roots into error locations in accordance with a predetermined relationship.

Hereinafter, characteristics of a higher-order equation and the solutions thereof will described.

The general forms of third-order (or higher) equations are expressed as follows: <tables id="tabl0001" num="0001"><img file="EP0592229A2_D0014.tif" /></tables> and so on.

In the above equations, once the coefficients are determined, the roots thereof can be obtained because the roots are the elements of a finite field such as GF(2⁸). That is, all elements included in the finite field are sequentially substituted for the xvalue, and thus the element satisfying the equation is detected. This method, however, requires too much time, so as to make it impractical.

Another method for producing the roots is performed by a large LUT which stores the roots themselves. The roots included in the large LUT are calculated in a preprocessing state, and addresses of the large LUT have a one-to-one correspondence with the coefficients of the equation. Accordingly, the large LUT uses up too much memory, thereby rendering it also impractical.

Here, let us consider the third order equation. The above third order equation can be rewritten as f(Z) = Z³ + Z + θ = 0.

First, substituting the term mZ+n for the variable x in the equation x³+cx²+bx+a=0, gives us the equation<maths id="math0014" num=""><img file="EP0592229A2_D0015.tif" /></maths>which develops into<maths id="math0015" num=""><img file="EP0592229A2_D0016.tif" /></maths>

By grouping similar terms of the above equation, the resulting equation can be expressed<maths id="math0016" num=""><img file="EP0592229A2_D0017.tif" /></maths>Then, dividing the equation by m³, in order to make the coefficient of the highest term (Z³) equal unity, results in the equation<maths id="math0017" num=""><img file="EP0592229A2_D0018.tif" /></maths>

Here, comparing the coefficients of the equation with those of equation Z³+Z+A=0 shows that 3m²n+cm²=0 and 3mn²+2cmn+bm=_m3.

At this moment, the above step of calculating the solution of the aforementioned polynomial is executed on the finite field, that is GF(q), so that the above equations can be equivalently transformed into<maths id="math0018" num=""><img file="EP0592229A2_D0019.tif" /></maths>and<maths id="math0019" num=""><img file="EP0592229A2_D0020.tif" /></maths>Therefore, in terms of a, b and c, the above variable m is equal to (c²+b)^½ and the above variable n is equal to c. Likewise, 0 can be expressed as follows:<maths id="math0020" num=""><img file="EP0592229A2_D0021.tif" /></maths>

The roots Z₁, Z₂ and Z₃ satisfying the equation f(Z)=Z³+Z+0=0, according to possible values of θ, are obtained by the preprocessing step, to be stored in the ROM table (or LUT). Thereafter, only the address or index θ are designated by the processing step.

Fig.12 is for explaining the method of producing error locations of a third-order error location polynomial.

Referring to Fig.12, step 1201 is for producing an index θ in accordance with the following:<maths id="math0021" num=""><img file="EP0592229A2_D0022.tif" /></maths> wherein k₁=(σ₁²+σ₂)^3/2, k₂=σ₁σ₂+σ₃, and σ₁, σ₂ and σ₃ represent coefficients of the error location polynomial with 3 order.

Step 1202 is for reading out virtual roots Z₁, Z₂ and Z₃ from the specified memory which stores the roots of the equation f(Z)=Z³+Z+e=₀.

In step 1203, virtual roots Z₁, Z₂ and Z₃ are transformed into error locations X^j1, Xj² and Xj³ in accordance with the following:<maths id="math0022" num=""><img file="EP0592229A2_D0023.tif" /></maths><maths id="math0023" num=""><img file="EP0592229A2_D0024.tif" /></maths><maths id="math0024" num=""><img file="EP0592229A2_D0025.tif" /></maths>

The triple error correcting method above described will be explained with reference to a detailed example.

Assume that the code word c(x)=0 from encoding by means of RS(36,26,7) is recorded onto, and then reproduced from, a predetermined recording medium. Thus, the receiving polynomial becomes<maths id="math0025" num=""><img file="EP0592229A2_D0026.tif" /></maths>Here, since the error polynomial e(x) becomes c(x)+r(x), then<maths id="math0026" num=""><img file="EP0592229A2_D0027.tif" /></maths>wherein a3, a¹⁵ and a²¹ conform to the error values e₁, e₂, and e₃, respectively, and x⁵, x¹² and x¹⁷ conform to the error locations x^j1, x^j2 and x^j3, respectively. In an RS decoder which receives the receiving polynomial, six syndromes So-S5 are produced based on the receiving polynomial. These are:<maths id="math0027" num=""><img file="EP0592229A2_D0028.tif" /></maths><maths id="math0028" num=""><img file="EP0592229A2_D0029.tif" /></maths><maths id="math0029" num=""><img file="EP0592229A2_D0030.tif" /></maths><maths id="math0030" num=""><img file="EP0592229A2_D0031.tif" /></maths><maths id="math0031" num=""><img file="EP0592229A2_D0032.tif" /></maths><maths id="math0032" num=""><img file="EP0592229A2_D0033.tif" /></maths>

Then, three coefficients σ₁, σ₂ and σ₃ are produced in accordance with the above syndromes, with the following results.<maths id="math0033" num=""><img file="EP0592229A2_D0034.tif" /></maths><maths id="math0034" num=""><img file="EP0592229A2_D0035.tif" /></maths><maths id="math0035" num=""><img file="EP0592229A2_D0036.tif" /></maths>

After obtaining the coefficients of the error location polynomial, an index θ is produced for accessing the specified memory (ROM table or LUT) according to the following:<maths id="math0036" num=""><img file="EP0592229A2_D0037.tif" /></maths> and<maths id="math0037" num=""><img file="EP0592229A2_D0038.tif" /></maths><maths id="math0038" num=""><img file="EP0592229A2_D0039.tif" /></maths>

The virtual roots are read out from a specified memory with reference to index 0 (α⁵¹). The virtual roots are<maths id="math0039" num=""><img file="EP0592229A2_D0040.tif" /></maths><maths id="math0040" num=""><img file="EP0592229A2_D0041.tif" /></maths><maths id="math0041" num=""><img file="EP0592229A2_D0042.tif" /></maths>

These virtual roots are transformed into error locations, with following results.<maths id="math0042" num=""><img file="EP0592229A2_D0043.tif" /></maths><maths id="math0043" num=""><img file="EP0592229A2_D0044.tif" /></maths><maths id="math0044" num=""><img file="EP0592229A2_D0045.tif" /></maths>

Then, the error values are produced in accordance with the thus-produced error locations, whereby the error polynomial is composed and the receiving polynomial is corrected.

Table 1, which follows, shows the ROM table used in the triple error correcting, where the index 0 corresponds to an address of the ROM and Z₁,Z₂ and Z₃ are the roots of the equation f(Z)=Z³+Z+θ stored in the ROM. Moreover, in each element, the superscripted alpha value (α###) on the left is all exponential presentation thereof, and the hexadecimal data on the right is an binary presentation thereof. <tables id="tabl0002" num="0002"><img file="EP0592229A2_D0046.tif" /></tables><tables id="tabl0003" num="0003"><img file="EP0592229A2_D0047.tif" /></tables><tables id="tabl0004" num="0004"><img file="EP0592229A2_D0048.tif" /></tables><tables id="tabl0005" num="0005"><img file="EP0592229A2_D0049.tif" /></tables><tables id="tabl0006" num="0006"><img file="EP0592229A2_D0050.tif" /></tables><tables id="tabl0007" num="0007"><img file="EP0592229A2_D0051.tif" /></tables>

As mentioned above, the present invention enables multiple erroneous symbols to be corrected and enables the realization of real-time processing of triple error correction with a memory of practical size.

While the present invention has been particularly shown and described with reference to particular embodiments thereof. it will be understood by those skilled in the art that various changes in form and details may be effected therein without departing from the scope of the invention.