Method and apparatus for testing integrated circuits

A membrane probe (10, 12, 14, 16, 58, 144) for testing integrated circuits (56,138) while still on the wafer upon which they are manufactured includes a flexible visually clear and self planarizing membrane (26) having circuit traces (20) and ground shielding planes (14), terminating resistor (152) and active buffer chips (172) formed thereon. Probe contact pads (36,38) electroplated on areas of the traces, and connector pads (32) plated on the membrane facilitate rapid detachable connection to a test fixture (50). The probe has a configuration, dimension and structure like that of the wafer itself so that automated pick and place equipment (136,142) employed for handling the wafers (138) may also be used to handle the probes (144). An unique test fixture (50) is adapted to receive and detachably secure a selected probe to the fixture. A metal-on-elastomer annulus (88,104) is employed in the test fixture to make electrical contact between contact pads (32) plated on the back side of the membrane probe and a printed circuit board that is used to route signals to the testing equipment.