Waveform equalizer using a neural network.

The present invention relates to a waveform equalizer using a neural network, and a system for supervising and controlling the equalizer.

In the field of data communications, signals suffer distortion in their waveforms during transmission thereof, and highly precise equalization of the signals is required when the signals are received to prevent an error. The distortion is often non-linear. In addition, in particular, in the field of radio communications and mobile communications, the distortion may vary time-dependently. Since the Baud rate in recent data communication is increasing, a very high speed response is required to eliminate the distortion. Thus, a waveform equalizer is required to adaptively respond to time-dependently varying distortion including non-linear distortion in a waveform of a received signal with very high speed, to realize a highly precise equalization of the signal.

Figure 1 shows a typical construction of a transversal type adaptive filter which is conventionally used for equalizing waveforms of received signals. The transversal type adaptive filter comprises: a tapped delay line holding a time series of data which is sampled from a received signal which is to be equalized; adaptive multipliers which multiply the time series of data by respective weight coefficients; and an adder which calculates a sum of the outputs of the multipliers. The weight coefficients are adaptively determined to realize an equalization of the received signal. However, the waveform equalizer using the transversal type adaptive filter cannot eliminate the non-linear distorsion in the received signal.

An object of the present invention is to provide a waveform equalizer which can adaptively respond to time-dependently varying distorsion including non-linear distorsion in a waveform of a received signal, and can realize high-speed, highly precise equalization of the signal.

According to the first aspect of the present invention, there is provided a waveform equalizer for equalizing a distorted signal, comprising: a sampling unit for sampling a level of the distorted signal at a predetermined rate; a time series generating unit for serially receiving the sampled level and outputting in parallel a predetermined number of the levels which have been last received; and an equalization neural network unit for receiving the outputs of the time series generating unit, and generating an equalized signal of the distorted signal based on the outputs of the time series generating unit using a set of equalization network weights which are preset thereto.

According to the second aspect of the present invention, there is provided a detector and waveform equalizer for detecting and equalizing a modulated and distorted signal, comprising: a sampling unit for sampling a level of the modulated and distorted signal at a predetermined rate; a time series generating unit for serially receiving the sampled level and outputting in parallel a predetermined number of the levels which have been last received; and a demodulation/equalization neural network unit for receiving the outputs of the time series generating unit, and generating a demodulated and equalized signal of the modulated and distorted signal based on the outputs of the time series generating unit using a set of demodulation/equalization network weights which are preset therein.

According to the third aspect of the present invention, there is provided a waveform equalizer comprising: in addition to the construction of the first or second aspect of the present invention; a distortion characteristic detecting unit for detecting a distortion characteristic of the distorted signal, an equalization network weight holding unit for holding a plurality of sets of equalization network weights each for being set in the equalization neural network unit; and a selector unit for selecting one of the plurality of sets of equalization network weights according to the distortion characteristic which is detected in the distortion characteristic detecting unit, and supplying the selected set to the equalization neural network unit to set the selected set therein.

According to the fourth aspect of the present invention, there is provided a waveform equalizer comprising: in addition to the construction of the third aspect of the present invention; an optimum equalization network weight obtaining unit for obtaining an optimum set of the equalization network weights for each distortion characteristic so that the equalization neural network unit outputs a best equalized signal for a distorted signal having that distortion characteristic when the optimum set of the equalization network weights is preset in the equalization neural network unit, and supplying the obtained set to the equalization network weight holding unit so that the equalization network weight holding unit stores therein the set of equalization network weights obtained for each of the distortion characteristics.

According to the fifth aspect of the present invention, there is provided a waveform equalizer comprising the same construction as the fourth aspect of the present invention, and the above optimum equalization network weight obtaining unit comprising: a model distorted signal generating unit for generating a plurality of model distorted signals each having a certain distortion characteristic, and supplying the model distorted signals to the equalization neural network unit; an equalization network weight setting unit for setting a set of equalization network weights in the equalization neural network unit; an output monitoring unit for monitoring the output of the equalization neural network unit; an equalization network weight modifying unit for modifying the set of equalization network weights which are set by the equalization network weight setting unit in the equalization neural network unit; a learning control unit for controlling the equalization network weight setting unit and the equalization network weight modifying unit based on the output of the equalization neural network unit to obtain the optimum set of the equalization network weights; and a presetting unit for presetting the obtained optimum set of the equalization network weights in the equalization neural network unit.

The above operation may be carried out by using a simulated equalization neural network unit instead of the above equalization neural network unit. The simulated equalization neural network unit receives the above model distorted signals which are to be applied to the equalization neural network unit, and simulates the operation of the equalization neural network unit, in the above operation in the fifth aspect of the present invention.

In the drawings: <ul id="ul0001" list-style="none"><li>Figure 1 is a diagram showing a typical construction of a transversal type adaptive filter which is conventionally used for equalizing waveforms of received signals;</li><li>Figure 2 is a diagram showing the construction of the first embodiment of the present invention;</li><li>Figure 3 is a block diagram showing input-output connections between input layer units, hidden layer units, and output layer units in a three layer unit neural network;</li><li>Figure 4 is a block diagram of an analog neuroprocessor;</li><li>Figure 5 is a block diagram of an example of three layer unit neural network using the analog neuroprocessors;</li><li>Figure 6 is a block diagram of an example of recurrent network which may be used instead of the hierarchical network;</li><li>Figures 7 and 8 are diagrams showing an example of a frame format of the input signal;</li><li>Figure 9 is a diagram showing the construction of the second embodiment of the present invention;</li><li>Figure 10 is a diagram showing the construction of the third embodiment of the present invention;</li><li>Figure 11 is a diagram showing the construction of the range selector unit in the construction of Fig. 10;</li><li>Figure 12 is a diagram showing the construction of the fourth embodiment of the present invention;</li><li>Figure 13 is a diagram showing waveforms of the non-distorted signal corresponding to the pattern "10" and an example of a model distorted signal corresponding to the non-distorted signal;</li><li>Figures 14 and 15 are diagrams showing the waveforms of the distorted signals which are obtained for the data pattern "10" and the various combinations of values of the amplitude distortions A and the delay distortions τ; and</li><li>Figure 16 is a diagram showing waveforms of the non-distorted signal corresponding the the pattern "10", an example of a model distorted signal corresponding to the non-distorted signal, and an equalized signal of the model distorted signal by simulation</li></ul>

(1) First embodiment

Fig. 2 (signal input)

Figure 2 is a diagram showing the construction of the first embodiment of the present invention. In Fig. 2, reference numeral 10 denotes a signal sampler unit, 20 denotes an equalizer unit, 21 and 41 each denote a tapped delay line, 22 denotes an equalization neural network, 30 denotes an equalization network weights control unit, 31 denotes an equalization network weights storage, 32 denotes an equalization network weights selector, 40 denotes a signal characteristics measuring unit, 42 denotes a detection neural network, 43 denotes a network weights setting circuit, 50 denotes a learning controller, 60 denotes a learning data storage unit, and 80 denotes a clock extracting circuit.

In the signal sampler unit 10, an input signal which may include distortion and is to be equalized, is sampled at a predetermined rate. Hereinafter, the input signal which may contain distortion may be referred to as a distorted signal. The sampled level of the input signal is serially supplied to the tapped delay line 21 in the equalizer unit 20, and the tapped delay line 41 in the signal characteristics measuring unit 40. The tapped delay lines 21 and 41 respectively realize the aforementioned time series generating unit, and serially successively receive the sampled levels and outputs in parallel a predetermined number (five in Fig. 2) of the sampled levels which have been last received, to the equalization neural network 22 and the detection neural network 42, respectively.

Fig. 3 (neural network)

Figure 3 is a block diagram showing input-output connections between input layer units and hidden layer units, and between the hidden layer units and the output layer units in a three layer unit neural network. Each of the equalization neural network 22 and the detection neural network 42 has a construction, for example, as shown in Fig. 3. As shown in Fig. 3, the neural network 22 or 42 is a hierarchical network which comprises a predetermined number of input layer units 1-h (h=1, 2, ...), a plurality of hidden layer units 1′-i (i=1, 2, ...), and at least one output layer unit 1˝-j (j=1, 2, ...). The input layer units in each of the equalization neural network 22 and the detection neural network 42 receive the outputs of the corresponding tapped delay line 21 or 41, each of the hidden layer units inputs the values received at a predetermined combination of the input layer units and outputs a value which is a function of the inputs thereof, and each of the output layer units inputs the outputs of a predetermined combination of the hidden layer units and outputs a value which is a function of the inputs thereof. The network weights W_ih and W_ji are respectively net in the hidden layer units and the output layer units, and each of the hidden layer units and the output layer unit comprises a linear combination unit for obtaining a linear combination of the inputs thereof using the set of the equalization network weights W_ih and W_ji, and a non-linear function unit for obtaining a non-linear function of the linear combination.

Fig. 4 (analog neuroprocessor)

Each of the hidden layer units and the output layer unit in the neural network can be realized by an analog neuroprocessor, for example, as shown in Fig. 4. The analog neuroprocessor of Fig. 4 comprises an analog data processing block 101, a weight data loading block 102, and a control block 103. The analog data processing block 101 comprises a multiplying digital to analog converter 104, an adder 105, and a Sigmoid function converter 106. The multiplying digital to analog converter 104 and the adder 105 calculate a linear combination of its serial input signals y_ph or y_pi (p, h, i=1, 2, ...) thereof using the set of the network weights W_ih or W_ji. The above-mentioned (equalization or detection) network weights are supplied to the multiplying digital to analog converter 104 through the weight data loading block 102. The analog input signals are all or a part of the parallel outputs of tapped delay line 21 or 41 in the equalizer unit 20 and the tapped delay line 41 in the signal characteristics measuring unit 40. For example, the network weights W_i1, W_i2, ... W_in, are serially supplied to the multiplying digital to analog converter 104 in the analog neuroprocessor which is used for a hidden layer unit 1′-h, and analog input signals yph corresponding to the network weights W_i1, W_i2, ... W_in are serially supplied to the multiplying digital to analog converter 104 so that the inputs of the analog input signals yph respectively coincide with the inputs of the corresponding network weights W_i1, W_i2, ... W_in. The multiplying digital to analog converter 104 serially outputs an analog signal having an amplitude y_ph·W_ih which is proportional to the multiplication of respective pairs of amplitudes of the above analog input signals and the corresponding network weights. The adder 105 serially receives the above analog output signals from the multiplying digital to analog converter 104, and accumulates the received signals to obtain a signal having an amplitude which is proportional to the linear combination Σy_ph·W_ih. The Sigmoid function converter 106 transforms the output of the adder 105 in accordance with the Sigmoid function. The Sigmoid function is a non-linear function which is continuous and has a gradient equal to or more than zero. The analog output of the Sigmoid function converter 106 is output from the analog processing unit 101 of the analog neuroprocessor of Fig. 4, under the control of the control block 103.

Fig. 5 (neural network)

Figure 5 is a block diagram of an example of a three layer unit neural network using the analog neuroprocessors. In Fig. 5, reference numeral 111 denotes an input bus, 112 to 114, and 119 to 121 each denote a static RAM, 115 to 117 each denote an analog neuroprocessor for a hidden layer unit, 118 denotes an intermediate bus, 122 to 124 each denote an analog neuroprocessor for an output layer unit, and 125 denotes an output layer unit.

In the example of Fig. 5, the static RAMs 112 to 114 and 119 to 121 are respectively provided for the analog neuroprocessors 115 to 117 and 122 to 124, to hold the network weights therein and supply the network weights to the corresponding analog neuroprocessors. The transfer of the outputs from the tapped delay line 21 or 41 to the respective analog neuroprocessors 115 to 117 in the hidden layer through the input bus 111; the transfer of the outputs from the analog neuroprocessors 115 to 117 in the hidden layer to the respective analog neuroprocessors 122 to 124 in the output layer through the intermediate bus 118; and the transfer of the outputs of the analog neuroprocessors 122 to 124 in the output layer, are respectively carried out in a time sharing manner. It is known that a transformation including a non-linear transformation can be realized by a neural network as above. The analog neuroprocessor is commercially available as a semi-conductor chip from Fujitsu Limited.

Otherwise, all the above functions which are realized by the analog neuroprocessors, can be realized by software using a digital signal processor(s). In this case, signals are supplied from the signal sampler unit 10 in a digital form to the tapped delay lines 21 and 41, and the tapped delay lines 21 and 41 are realized by shift registers.

Although the hierarchical network is used in the above example, a recurrent network may be used instead of the hierarchical network as shown in Figure 6 as an example. The recurrent network is disclosed in "Encoding Sequential Structure in Simple Recurrent Networks" by Servan-Schreiber, Axel Cleeremans, and James L. McClelland, CMU Technical Report CMU-CU-88-183, 1988. It is known that recurrent networks may be treated as equivalent to hierarchical networks.

Fig. 2 (equalization)

Returning to Fig. 2, the equalization neural network 22 receives the outputs of the time series generating unit, and equalizes the distorted signal to generate an equalized signal, based on the outputs of the tapped delay line 21 using a set of equalization network weights which are preset therein. That is, the equalizer unit 20 containing the equalization neural network 22 operates as a waveform equalizer for the above-mentioned distorted signal when an optimum bet of the equalization network weights are set therein an explained later.

The signal characteristics measuring unit 40 detects distortion characteristics of the distorted signal when an optimum set of the detection network weights are set therein as explained later. As shown in Fig. 2, the detection neural network 42 has three outputs, which respectively output values indicating an amplitude distortion, a delay distortion, and a phase distortion, in this example.

The equalization network weights storage 31 holds a plurality of optimum sets of equalization network weights corresponding to a plurality of possible distortion characteristics, each for being set in the equalization neural network 22, and the equalization network weights selector 32 selects one of the plurality of sets of equalization network weights according to the distortion characteristic (actually, a combination of the amplitude distortion, the delay distortion, and the phase distortion), which is detected in the distortion characteristic measuring unit 40, and supplies the selected set to the equalization neural network 22 to set the selected set therein. The equalization network weights selector 32 comprises a writing control circuit for the SRAMs as shown in Fig. 5 in the equalization neural network 22. When the equalization network weights storage 31 is realized by a RAM, the equalization network weights selector 32 comprises a reading/writing control circuit for the RAM, and the output of the detection neural network 42 is used as an address signal for reading the content of the RAM. The clock extracting unit 80 extracts a clock (timing) signal from the output (equalized) signal of the equalization unit 20. The clock signal is supplied to the equalization network weights selector 32 to provide a timing of the selection.

Fig. 2 (learning of the network weights)

The learning controller 50 obtains an optimum set of the equalization network weights for each distortion characteristic (each combination of values of the amplitude distortion, the delay distortion, and the phase distortion) so that the equalization neural network 22 outputs a best equalized signal for a distorted signal having the distortion characteristic when the optimum set of the equalization network weights is preset in the equalization neural network 22, and supplies the obtained set to the equalization network weights storage 31 so that the equalization network storage 31 stores therein the set of equalization network weights obtained for each of the distortion characteristics (each of the combinations of values of the amplitude distortions, the delay distortions, and the phase distortions). When the equalization network weights storage 31 is a RAM, the above obtained set of the equalization network weights is written in the RAM through the above reading/writing control circuit.

The above functions of the learning controller 50 for obtaining and supplying the optimum set of the equalization network weights through following units is realized by a software program which contains the following units:    a unit for storing a model signal which is not distorted;    a unit for generating a plurality of model distorted signals being respectively generated from the model signal by distorting the model signal according to a plurality of types of distortion characteristics, and supplying the model distorted signals to the equalization neural network;    a unit for setting a set of equalization network weights to the equalization neural network;    a unit for monitoring the output of the equalization neural network;    a unit for modifying the set of equalization network weights which are set by the unit for setting the set of equalization network weights to the equalization neural network unit;    a unit for controlling the unit for setting the set of equalization network weights and the unit for modifying the set of equalization network weights based on successive outputs of the equalization neural network unit so that a waveform which is made by the successive outputs of the equalization neural network unit accords to the waveform of the model signal, to obtain the optimum set of the equalization network weights for each of the plurality of model distorted signals; and    a unit for controlling an operation of storing the obtained optimum set of the equalization network weights for each of the plurality of model distorted signals, in the equalization network weights storage 31.

The above operation may be carried out by using a simulated equalization neural network unit instead of the above real equalization neural network 22. The simulated equalization neural network unit (by a software) receives the above model distorted signals to the equalization neural network unit, and simulates the operation of the equalization neural network 22.

Similarly, the learning controller 50 obtains an optimum set of the detection network weights which is common to all distortion characteristics (all combinations of values of the amplitude distortions, the delay distortions, and the phase distortions) so that the detection neural network 42 outputs the distortion characteristics corresponding to the distorted signals when the distorted signals after sampled by the signal sampler 10, are received by the signal characteristics measuring unit 40 when the obtained set is preset to the detection neural network 42; and presets the obtained set to the detection neural network 42.

The above functions of the learning controller 50 for obtaining and supplying the optimum set of the detection network weights is realized by a software program which contains the following units:    a unit for generating a plurality of model distorted signals each having a certain distortion characteristic, and supplying the model distorted signals to the detection neural network 42;    a unit for setting a set of detection network weights to the detection neural network 42;    a unit for monitoring the output of the detection neural network 42;    a unit for modifying the set of detection network weights which are set in the above unit for setting the set of the detection network weights in the detection neural network 42;    a unit for controlling the above unit for setting the detection network weights and the unit for modifying the detection network weights, based on the output of the detection neural network 42 to obtain the optimum set of the detection network weights; and    a unit for presetting the obtained optimum set of the detection network weights in the detection neural network 42. The presetting is effected, for example, in the SRAMs as shown in Fig. 5.

Any distortion including non-linear distortion can be detected as distortion values by using the neural network 42.

The above operation may be carried out by using a simulated detection neural network unit instead of the above real detection neural network 42. The simulated detection neural network unit (by software) receives the above model distorted signals which are to be applied to the detection neural network 42, and simulates the operation of the detection neural network 42.

The details of an example of the above operations of the learning controller 50, are explained later.

Figs. 2, 7, and 8 (operation of equalization)

Figures 7 and 8 are diagrams showing an example of a frame format of the input signal. In the frame format of Fig. 7, a predetermined training data is included after a synchronization pattern SYNC, and before a real message. On the other hand, in the frame format of Fig. 8, a predetermined training data is inserted intervening the real message. The training data is the same data as the aforementioned model distorted signal which is used for obtaining the optimum set of the detection network weights.

First, it is assumed that the above setting of the optimum set of detection network weights in the detection neural network 42, and the storing of the plurality of optimum sets of equalization network weights are completed. In the case the frame format of Fig. 7 is used, after each frame is received and sampled in the signal sampler unit 10, the sampled training data is supplied through the tapped delay line 41 to the detection neural network 42. Receiving the training data signal, the detection neural network 42 outputs the values of the amplitude distortion, the delay distortion, and the phase distortion from the three output layer units thereof. These outputs are supplied to the equalization network weights selector 32, and than the equalization network weights selector 32 reads from the equalization network weights storage 31 a set of equalization network weights corresponding to the combination of the supplied values of the amplitude distortion, the delay distortion, and the phase distortion, and sets the set of the equalization network weights in the equalization neural network 22. The equalization neural network 22 eliminates the above distortion from its input signal when the set of the equalization network weights corresponding to the distortion characteristics is set thereto. Therefore, when the real message portion of the above frame is supplied through the tapped delay line 21 to the equalization neural network 22, the real message portion of the above frame is equalized. As mentioned before, any distortion including non-linear distortion can be eliminated by using the neural network 22.

In the case where the functions of Fig. 2 are realized by the digital signal processor, each frame of the distorted signal sampled in the sampler unit 10 is once held in a buffer memory (not shown), and then the training data portion in the frame is first read from the buffer memory to be supplied to the detection neural network 42 as explained above, and the distortion characteristic values are determined from the distortion in the training data portion at the outputs of the detection neural network 42. Then, a set of equalization network weights corresponding to the combination of the supplied distortion characteristic values, are set in the equalization neural network 22. After that, the real message portion of the above frame is read out of the buffer memory to be supplied through the tapped delay line 21 to the equalization neural network 22, and the real message portion of the above frame is equalized. Therefore, in the case where the functions of fig. 2 are realized by the digital signal processor, since the sampled values of each frame are once held in the buffer memory, the training data portion can be first supplied to the signal characteristics measuring unit 40 before the real massage portion is supplied to the equalization unit 20 even when the frame format of Fig. 8 is used. As understood by comparing the frame formats of Figs. 7 and 8, the frame format of Fig. 8 is advantageous because the maximum time difference from the training data portion to the farthest portion of the real message portion in each frame in Fig. 8 is smaller than Fig. 7, and therefore, the maximum difference of the distortion characteristic in the training data portion and the real message portion in Fig. 8 is smaller than Fig. 7.

(2) Second Embodiment

Fig. 9

Figure 9 is a diagram showing the construction of the second embodiment of the present invention. Fig. 9 shows the construction of the demodulation and equalization apparatus for demodulating and equalizing a received signal which is modulated by the quadrature phase shift keying (QPSK) by delay detection. In the construction of Fig. 9, reference numeral 20a denotes an equalizer unit, 23 and 24 each denote an equalizer, 30a denotes an equalization network weights control unit, 31a denotes an equalization network weights storage, 32a denotes an equalization network weights selector, 40a denotes a signal characteristics measuring unit, 41a, 41a′ and 41a˝ each denote a tapped delay line, 42a, 42a′ and 42a˝ each denote a detection neural network, 43 denotes a network weights setting circuit, 70 denotes a demodulator unit, 71 denotes an band pass filter, 72 denotes a limiter, 73 denotes a delay detection circuit, 74 and 76 each denote a low pass filter, 75 and 77 each denote an analog to digital converter, and 80a denotes a clock extracting circuit. The frequency range of the received signal which is modulated by the quadrature phase shift deying (QPSK) is limited the carrier frequency of the modulated signal by the band pass filter 71. Then, the output signal of the band pass filter 71 is transformed to a rectangular form by the limiter 72, and the I-channel and the Q-channel of the received signal is obtained by the delay detection circuit 73. The I-channel and the Q-channel are then sampled and converted to digital forms in the analog to digital converters 75 and 77 after the higher harmonic components are eliminated by the low pass filters 74 and 76, respectively. The digital sampled signals of the I-channel and the Q-channel are supplied to first and second equalization units 23 and 24, respectively. In addition, the I-channel signal is supplied to the signal characteristics measuring unit 40a.

In the above construction of the modulation unit 70, the existence of the limiter 72 and the delay detection circuit 73 will cause a non-linear distortion in the received signal.

As shown in Fig. 9, the signal characteristics measuring unit 40a comprises a plurality of detection neural network units 42a, 42a′ and 42a˝ which respectively receive the outputs of the tapped delay lines 41a, 41a′ and 41a˝ in the distortion characteristic detecting unit 40a, and generate a value indicating one of the distortion characteristics of the distorted signal based on the outputs of the corresponding one of the tapped delay lines 41a, 41a′ and 41a˝ using a set of detection network weights which are preset therein. The set of the detection network weights are determined and preset in a similar way to the first embodiment, although the learning controller 50 is not shown in Fig. 9. For example, each of the plurality of detection neural network units 42a, 42a′ and 42a˝ outputs one of the above distortion characteristics, the amplitude distortion, the delay distortion, and the phase distortion. Further, instead of providing the plurality of tapped delay lines 41a, 41a′ and 41a˝ for the plurality of detection neural network units 42a, 42a′ and 42a˝, only one tapped delay line may be provided commonly to the plurality of detection neural network units 42a, 42a′ and 42a˝.

The equalization network weights storage 31a stores all the optimum sets of the equalization network weights which are to be set in the first and second equalization units 23 and 24, where the optimum sets are determined by the learning controller 50, and are stored by the equalization network weights storage 32a as in the first embodiment.

The equalization network weights selector 32a receives the above outputs of the plurality of detection neural network units 42a, 42a′ and 42a˝, and reads and sets one of the plurality of sets of the equalization network weights in the first and second equalization units 23 and 24. Therefore, the above I-channel and the Q-channel signals are respectively equalized through the first and second equalization units 23 and 24. The clock extracting unit 80a extracts a timing signal (clock) from the equalized I-channel signal to supply a timing of its operation.

Further, the function of the delay detection in the demodulation unit 70 may be included in the equalization unit 20a. That is, the first and second equalization units 23 and 24 each can operate as a demodulator at the same time as an equalizer.

(3) Third Embodiment

Figs. 10 and 11

Figure 10 is a diagram showing the construction of the third embodiment of the present invention. Fig. 10 shows the construction of the signal characteristics measuring unit 40b in the third embodiment of the present invention. In the construction of Fig. 10, reference numeral 10b denotes a signal sampler unit, 40b denotes a signal characteristics measuring unit, 41b and 41b′ each denote a tapped delay line, 42b and 42b′ each denote a detection neural network, 43b denotes a network weights setting circuit, and 44b denotes a zone selector unit, and 45b and 45b′ each denote a range selector unit.

As shown in Fig. 10, the signal characteristics measuring unit 40b comprises a plurality of detection neural networks 42b and 42b′. Each of the plurality of detection neural networks 42b and 42b′ receives the outputs of the tapped delay lines 41b and 41b′ in the distortion characteristic detecting unit 40b, generates and outputs values respectively indicating the distortion characteristics (the amplitude distortion, the delay distortion, and the phase distortion) of the distorted signal, when each of the amounts of the distortion characteristics which are contained in the distorted signal, is within a part, which is assigned to the detection neural network, of the whole range of the distortion characteristic to be detected, and generates and outputs a predetermined value (for example, the maximum value of the output range of the detection neural network units 42b and 42b′) when an amount of the detection characteristic which is contained in the distorted signal, is out of the part assigned to the detection neural network, based on the outputs of the tapped delay line in the signal characteristics measuring unit 40b using a set of detection network weights which are preset therein. The set of the detection network weights are determined and preset in a similar way to the first embodiment, although the learning controller 50 is not shown in Fig. 10. For example, each of the plurality of detection neural network units 42b and 42b′ outputs a value indicating one of the above distortion characteristics, the amplitude distortion, the delay distortion, and the phase distortion. Further, instead of providing the plurality of tapped delay lines 41b and 41b′ for the plurality of detection neural network units 42b and 42b′, only one tapped delay line may be provided commonly to the plurality of detection neural network units 42b and 42b′.

The plurality of range selector units 45b and 45b′ are each provided for one of the distortion characteristics (for example, the amplitude distortion) which are detected by the signal characteristics measuring unit 40b. Each of the plurality of range selector units 45b and 45b′ receives the outputs of the plurality of detection neural network units 42b and 42b′ regarding one of the of distortion characteristics, and selects the output of one of the plurality of detection neural network units 42b and 42b′. Figure 11 is a diagram showing the construction of each of the plurality of range selector units 45b and 45b′. As shown in Fig. 11, each range selector unit comprise a selector 142 and a selector controller 141.

The selector controller 141 in each range selector unit receives the outputs of the plurality of detection neural network units 42b and 42b′ regarding the corresponding one of the distortion characteristics, and then controls the corresponding selector 142 based on the received outputs of the plurality of detection neural network units 42b and 42b′, so that the corresponding selector selects the output of one of the detection neural network units 42b and 42b′ which does not output the predetermined value, and outputs the above predetermined value (for example, the maximum value of the output range of the detection neural network units 42b and 42b′) when all of the outputs of the detection neural network units 42b and 42b′ regarding the corresponding one of the distortion characteristics are equal to the predetermined value (the maximum value).

The above selector controller 141 sends information on the above selection to the equalization network weights storage 32b in the equalization network weights control unit 30b. Receiving the information together with the output of the selector 141, the equalization network weights storage 32b can recognize the real amount of the distortion characteristic, and select and read the corresponding optimum set of the network weights.

According to the above construction of Figs. 10 and 11, the whole output range of each detection neural network is used for indicating only a part of the total range of the value of a distortion characteristic, the precision of the distortion characteristics is improved.

(4) Fourth Embodiment

Figs. 11 and 12

Figure 12 is a diagram showing the construction of the fourth embodiment of the present invention. Fig. 12 shows the construction of the signal characteristics measuring unit 40c in the fourth embodiment of the present invention. In the construction of Fig. 12, reference numeral 40c denotes a signal characteristics measuring unit, 41c-1 to 41c-4 each denote a tapped delay line, 42c-1 to 42c-4 each denote a detection neural network, 43c denotes a network weights setting circuit, and 44c denotes a zone selector unit. In Fig. 12, for simplicity of the explanation, it is assumed that the signal characteristics measuring unit 40c detects only two distortion characteristics, the amplitude distortion and the delay distortion.

As shown in Fig. 12, the signal characteristics measuring unit 40c comprises a plurality of detection neural networks 42c-1 to 42c-4. Each of the plurality of detection neural networks 42c-1 to 42c-4 receives the outputs of the tapped delay lines 41c-1 to 41c-4 in the distortion characteristic detecting unit 40c, generates and outputs a value respectively indicating a distortion characteristic (the amplitude distortion, the delay distortion, and the phase distortion) of the distorted signal, when an amount of the distortion characteristic which is contained in the distorted signal, is within a part, which is assigned to the detection neural network, of the whole range of the distortion characteristic to be detected, and generates and outputs a predetermined value (for example, the maximum value of the output range of the detection neural network units 42c-1 to 42c-4) when the amount of the distortion characteristic is out of the part assigned to the detection neural network, based on the outputs of the tapped delay line in the signal characteristics measuring unit 40c using a set of detection network weights which are preset therein.

For example, the detection neural network 42c-1 outputs a value indicating the amplitude distortion when the amplitude distortion to be detected is not more than the center value of the total range of the amplitude distortion to be detected, and outputs the maximum value of the output range of the detection neural network 42c-1 when the amount of the amplitude distortion which is contained in the distorted signal, is more than the center value of the total range of the amplitude distortion to be detected. The detection neural network 42c-2 outputs the value indicating the amplitude distortion when the amount of the amplitude distortion which is contained in the distorted signal, is not less than the center value of the total range of the amplitude distortion to be detected, and outputs the maximum value of the output range of the detection neural network 42c-2 when the amount of the amplitude distortion is less than the center value of the total range of the amplitude distortion to be detected. The detection neural network 42c-3 outputs the value indicating the delay distortion when the amount of the delay distortion is not more than the center value of the total range of the delay distortion to be detected, and outputs the maximum value of the output range of the detection neural network 42c-3 when the amount of the delay distortion is more than the center value of the total range of the delay distortion to be detected. The detection neural network 42c-4 outputs the value indicating the delay distortion when the amount of the delay distortion is not less than the center value of the total range of the delay distortion to be detected, and outputs the maximum value of the output range of the detection neural network 42c-4 when the amount of the delay distortion is less than the center value of the total range of the delay distortion to be detected. Therefore, each of the above values respectively indicating the amplitude distortion and the delay distortion can be output in the output range substantially twice the output range as the total ranges of the amplitude distortion or the delay distortion is output from one detection neural network.

The zone selector unit 45c has the same construction as the above-mentioned third embodiment except that only two distortion characteristics are shown in the fourth embodiment. <tables id="tabl0001" num="0001"><img file="EP0454445A2_D0001.tif" /></tables><tables id="tabl0002" num="0002"><img file="EP0454445A2_D0002.tif" /></tables>

Table 1 shows the range assignment for the amplitude distortion and the delay distortion, where the range 0 to 1.0 is assigned to each of the detection neural network units 42c-1 to 42c-4. In Table 1, A, B, C, and D each denote a zone which is determined by a combination of the ranges of the amplitude distortion and the delay distortion. Further, as shown in Table 2, in each zone, each of the above values respectively indicating the amplitude distortion and the delay distortion can be output in the output range substantially twice the output range as the total ranges of the amplitude distortion or the delay distortion is output from one detection neural network.

The set of the detection network weights are determined and preset in a similar way to the first embodiment, although the learning controller 50 is not shown in Fig. 12. Further, instead of providing the plurality of tapped delay lines 41c-1 to 41c-4 for the plurality of detection neural network units 42c-1 to 42c-4, only one tapped delay line may be provided commonly to the plurality of detection neural network units 42c-1 to 42c-4.

According to the above construction of Figs. 10 and 11, the whole output range of each detection neural network is used for indicating only a part of the total range of the value of a distortion characteristic, so the precision of the distortion characteristics is improved.

(5) Preparation of model Distorted signal

Before the operation of the learning controller 50 for obtaining the optimum set of the network weights, the aforementioned model distorted signals are obtained as explained below.

The aforementioned model distorted signals each having a certain distortion characteristic, are generated based on a two-wave interference model of a signal on a transmission line. According to the two-wave interference model, a signal which is received at the receiver is approximated by a superimposition of a direct non-distorted wave and a reflected wave which contains distortion such as an amplitude distortion, a delay distortion, and a phase distortion. For example, when the transmitted signal is modulated by the quadrature phase shift keying (QPSK), a modulated signal, i.e., I(t)coswct + Q(t)sinwct is transmitted from a sender side, the reflected wave in the I-channel is expressed an<maths id="math0001"><math display="block"><mrow><msub><mrow><mtext>A·(I(t-τ)cosω</mtext></mrow><mrow><mtext>a</mtext></mrow></msub><msub><mrow><mtext>(t-φ) + Q(t-τ)sinω</mtext></mrow><mrow><mtext>c</mtext></mrow></msub><mtext>(t-φ)),</mtext></mrow></math><img file="EP0454445A2_D0003.tif" /></maths> where A denotes the amplitude distortion, τ denotes the delay distortion which is normalized as 0 ≦ τ ≦ 1, and φ denotes the phase distortion which is normalized as 0 ≦ φ ≦ 1.

Based on the above model, it is supposed that a predetermined successive data pattern, for example, "010" is received on the I-channel, waveforms of demodulated signals (corresponding to the input of the equalization unit 20 of Fig. 2) corresponding to the reception of the pattern "010" which contain distortion corresponding to various values for the amplitude distortion A, the delay distortion τ, and the phase distortion φ, are generated by computer simulations, and the waveforms of the portion "10" in the above pattern "010" is extracted for use as learning signals (the model distorted signals). The first bit "0" is provided only for stabilizing the waveforms corresponding to the following bits "10", and therefore, is discarded after the above simulation. The above pattern "10" with the preceding bit "0" is predetermined to be the same as the aforementioned training data, i.e., the training data also contains the pattern "010".

Figure 13 is a diagram showing waveforms of the non-distorted signal corresponding to the pattern "10" and an example of a model distorted signal corresponding to the non-distorted signal, and Figures 14 and 15 are each a diagram showing the waveforms of the distorted signals which are obtained as above for the data pattern "10" and the various combinations of values of the amplitude distortions A and the delay distortions τ. In Fig. 14, the value of the amplitude distortion A is fixed to A=0, and the values of the delay distortion τ is varied from 0.1 to 0.8. In Fig. 15, the value of the amplitude distortion A is varied from 0.1 to 0.9, and the value of the delay distortion τ is fixed to 0.8. It is assumed that the signal levels are inverted through the demodulation in the simulations. In the examples of Figs. 13 and 14, seven samples of signal levels are shown for each simulation case, where the sampling rate is four times the Baud rate of the signal.

The waveform data and the corresponding combinations of the distortion characteristic values are stored in the learning data storage unit 60 (Fig. 2). Thus, the model simulated signals have been prepared.

(6) Obtaining of Optimum Set of Weights

The details of an example of the functions of the learning controller 50 for obtaining the optimum set of the network weights are explained below. For the example, the aforementioned back propagation method is explained. The explanation is made based on the construction of the hierarchical network shown in Fig. 3.

In Fig. 3, y_ph (p, h=1, 2, ...) denotes an input signal to the hierarchical network, and y_pj (p, j=1, 2, ...) denotes an output signal of the hierarchical network, where the index p is used for indicating different input signals (corresponding to different model distorted signals containing different distortion characteristics), h is used for different input layer units, i is used for different hidden layer units, and j is used for indicating generaly different output layer units (although only one output layer unit is shown in Fig. 3). When a taget value (the above-mentioned model non-distorted signal, or an amount of a distortion characteristic, for example, an amount of the ampliture distortion A) of the output signal y_pj is denoted by d_pj (p, j=1, 2, ...), a difference y_pj-d_pj between the output signal y_pj and the target value d_pj is calculated, and then, a value α_pj = y_pj·(1-y_pj)·(d_pj-y_pj) is calculated. Next, a correction of the network weight between the hidden layer and the output layer is calculated as <chemistry id="chem0001" num="0001"><img file="EP0454445A2_D0004.tif" /></chemistry> where ε and ζ each denote a constant, and t denotes a number of learning cycles. In addition, a value β_pi = y_pi·(1-y_pi)·Σ α_pj·W_ji(t-1) is calculated. Next, a correction of the network weight between the input layer and the hidden layer is calculted as <chemistry id="chem0002" num="0002"><img file="EP0454445A2_D0005.tif" /></chemistry>

Thus, using the above correction values ΔW_ji(t) and ΔW_ih(t), the network weight values are repeatedly modified as

W_ji(t) = W_ji(t-1) + ΔW_ji(t), and

W_ih(t) = W_ih(t-1) + Δ_Wih(t), to obtain an optimum set of the network weights W_ji and W_ih which leads to the above target (the aforementioned optimum) values. The above operation back propagation method can be used for obtaining both the equalization network weights and the detection network weights.

In the case of obtaining the detection network weights, the learning controller 50 presets the above-obtained optimum network weights in the detection neural network. When the neural network is realized by software using a digital signal processor, the obtained network weights are stored in a predetermined region of a RAM which is used by the digital signal processor. In the case of obtaining the equalization network weights, the learning controller 50 obtains the optimum set of the equalization network weights for each of the plurality of model distorted signals, and stores the obtained set in the equalization network weights storage 32 for each distortion characteristic corresponding to the model distorted signal.

In operation, when a distorted training signal corresponding to the same pattern as the model simulated signal is input, the signal characteristics measuring units 40, 40a, and 40b (in Fig. 2, 9, and 10) in which the optimum sets of the network weights are preset, respectively output the values of the distortion characteristics which the distorted training signal contain, as explained before. <tables id="tabl0003" num="0003"><img file="EP0454445A2_D0006.tif" /></tables><tables id="tabl0004" num="0004"><img file="EP0454445A2_D0007.tif" /></tables>

(7) Evaluation by Simulation

Tables 3 and 4 show results of simulations which have been carried out for verifying the credibility of the signal characteristics measuring unit 40c in Fig. 11. In Tables 3 and 4, the simulations are carried out for smaller and larger ranges of the amplitude distortion and the delay distortion. For the smaller range, thirty-five basic model distorted signals are prepared for seven points of the amplitude distortion between A=0.4 to 1.0, and five points of the delay distortion between 0.4 to 0.8, and six types of bit patterns before and after the model pattern "010" are assumed for the input signal, and therefore, 6X35=210 types of the model distorted signals are generated as input signals to obtain the optimum set of the network weights to be set to the detection neural network 42c. For the larger range, forty-eight basic model distorted signals are prepared for eight points of the amplitude distortion between A=0.2 to 1.0, and six points of the delay distortion between 0.2 to 0.8, and six types of bit patterns before and after the model pattern "010" are assumed for the input signal, and therefore, 6X48=288 types of the model distorted signals are generated as input signals to obtain the optimum set of the network weights to be set in the detection neural network 42c.

In the case of the smaller ranges, then, the above 210 types of the model distorted signals are input into the signal characteristics measuring unit 40c, and it is determined whether or not the desired distortion characteristic values are output from the signal characteristics measuring unit 40c within the error of 0.05%, and within the error of 0.1%. Further, three types of bit patterns before and after the model pattern "010", other than the above 210 types are assumed, and therefore, 3X35=105 types of the model distorted signals are generated as input signals to the signal characteristics measuring unit 40c.

In the case of the above larger ranges, then, the above 288 types of the model distorted signals are input into the signal characteristics measuring unit 40c, and it is determined whether or not the desired distortion characteristic values are output from the signal characteristics measuring unit 40c within the error of 0.05%, and within the error of 0.1%. Further, three types of bit patterns before and after the model pattern "010", other than the above 210 types are assumed, and therefore, 3X48=144 types of the model distorted signals are generated as input signals to the signal characteristics measuring unit 40c.

Table 3 shows the possibility of the outputs for the delay distortion t with an error not more than 0.05%, and Table 4 shows the possibility of the outputs for the amplitude distortion A with an error not more than 0.05%. In Tables 3 and 4, the above case where the input signals are respectively the above 210 model distorted signals; the above case where the input signals are respectively the above 288 model distorted signals; the case where the input signals are the 105 signals other than 210 model distorted signals; and the case where the input signals are the 144 signals other than the 288 model distorted signals are shown.

Fig. 16

Figure 16 is a diagram showing waveforms of the non-distorted signal corresponding to the pattern "10", an example of a model distorted signal corresponding to the non-distorted signal, and an equalized signal of the model distorted signal by simulation, where the amplitude distortion A is set to 0.1, and the delay distortion t is set to 0.1. <tables id="tabl0005" num="0005"><img file="EP0454445A2_D0008.tif" /></tables>

Table 5 shows results (error rates) of simulations which have been carried out for verifying the credibility of the equalization unit 23 in Fig. 9. In the above simulations, the optimum set of the network weights is obtained by supplying eighty model distorted signals for ten points of the amplitude distortion between A=0.1 to 1.0, and eight points of the delay distortion between 0.1 to 0.8. Then, distorted signals corresponding to the pattern "10" and different from the above model distorted signals are input into the equalization unit 23, and corresponding outputs are compared with the non-distorted signal. The simulations are carried out without the signal characteristics measuring unit 40a and the equalization network weights control unit 30a. That is, the optimum sets of the network weights are correctly set in the equalization unit 23 in the simulations. The output signals are sampled at the sampling points shown in Fig. 16 by circles, are digitized by discriminating the signals using a threshold level of 0.5, and are respectively compared with the non-distorted signal. <tables id="tabl0006" num="0006"><img file="EP0454445A2_D0009.tif" /></tables>

Table 6 shows results (error rates) of simulations which have been carried out without using the equalization unit, and is provided for comparison with the above results using the equalization unit. In the simulations for Table 6, equalized signals are digitized by discriminating the signals using a threshold level of 0, and are respectively compared with the non-distorted signal. <tables id="tabl0007" num="0007"><img file="EP0454445A2_D0010.tif" /></tables>

Table 7 shows results (error rates) of simulations which have been carried out for verifying the credibility of the equalization unit 23 in Fig. 9. In the above simulations, the optimum set of the network weights is obtained in the same way as the results of Table 5. The simulations are carried out so that the signal characteristics measuring unit 40a and the equalization network weights control unit 30a cooperate with the equalization unit 23. Then, distorted signals corresponding to the pattern "10" and different from the above model distorted signals are input into the equalization unit 23, and corresponding outputs are compared with the non-distorted signal. The output signals are sampled at the sampling points shown in Fig. 16 by circles, are digitized by discriminating the signals using a threshold level of 0.5, and are respectively compared with the non-distorted signal. From the results of Tables 6 and 7, it is understood that the signal characteristics measuring unit 40a and the equalization network weights control unit 30a effectively cooperate with the equalization unit 23.