Signature circuit for non-volatile memory device

A signature circuit stores signature information indicative of one of a plurality of device functions of a non-volatile memory device which includes first memory cells (MS₀-MS2m+1) which are respectively coupled to one of a plurality of word lines (X₀-Xn) and to one of a plurality of bit lines (b₀-b2m+1). The signature circuit includes second memory cells (SS₀-SS2m+1, T1a, T2a, T1x, T2x) which are respectively connected to the bit lines which are grouped into a plurality of blocks, at least one predetermined word line (Xn+1) which is provided exclusively for the second memory cells and is connected to each of the memory cells, and a selecting circuit (Q₀-Q2m+1, Qx, Qx+1, Q1a, Q2a, Q1x, Q2x, Q3a, Q3x) coupled to the bit lines for selecting one of the blocks. The second memory cells in each of the blocks store one kind of signature information, so that a number of blocks is equal to a number of kinds of signature information that can be stored in the signature circuit.