Method of controlling the operating speed of an information processing unit, and related information processing unit

An information processing unit has a central processing unit (1) and means (3, 4, 5; 3, 4, 5A; 3, 10; 40) for generating clock pulses (CLK) for supply to a clock input terminal of the central processing unit for controlling the timing of the central processing unit. The frequency of the clock pulses is arranged to be altered for selectively varying this timing, for example in dependence upon the current operation of a bus cycle of the central processing unit, addresses to be accessed by the central processing unit, ambient temperature or line voltage.