Nonvolatile memory circuit device performing stable operation in wide range of power source voltage level

An electrically programmable nonvolatile memory circuit device includes a plurality of memory cell tran­sistors (11-1, 11-2) from which data is read out, dummy cell transistors (12-1, 12-2) which are each selectively operated at the same time as the operation of a selected one of said memory cell transistors in the same condi­tion as the selected memory cell transistor at the time of reading out data from the selected memory cell transistor, and a sense amplifier (16) including a logic gate circuit for converting the programming state of the memory cell transistor (11-1, 11-2) into a logic value based on a difference between the current characteris­tics of the memory cell transistor (11-1, 11-2) and the dummy cell transistor (12-1, 12-2). When the source-­drain current of the memory cell transistors (11-1, 11-2) set in the non-programmed state is denoted by I1, the source-drain current of the dummy cell transistor (12-1, 12-2) is denoted by I2, and the source-drain cur­rent of the memory cell transistors (11-1, 11-2) set in the programmed state is denoted by I3, then current I1, I2 and I3 are so set as to satisfy the current relation of "I1>I2>I3".