Electroacoustic system with electronic filters.

Notice

0001Copyright <img file="EP0342782A2_D0001.tif" /> 1988 Central Institute for the Deaf. A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to th facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trade Mark Office patent file or records, but otherwise reserves all copyright rights whatsoever.

Field of the Invention

0002The present invention relates to electronic filters for hearing aids, public address systems, and other electroacoustic systems, hearing aids with electronic filters and methods of operation. More particularly, the present invention relates to electronic adaptive filters and filtering methods to offset disadvantageous acoustic feedback in hearing aids, public address systems and other electroacoustic systems.

Background of the Invention

0003Electronic hearing aids and methods are discussed in coassigned U.S. patent 4,548,082 which is incorporated herein by reference as an example of an electroacoustic system in which the present invention can be used.

0004Without limiting the scope of the present inven­tion in hearing aids, public address systems and electroa­coustic systems in general, the background of the invention is described specifically in connection with its applica­tion to hearing aids.

0005A person's ability to hear speech and other sounds well enough to understand them is clearly important in employment and many other daily life activities. Improvements in hearing aids which are intended to compen­sate or ameliorate hearing deficiencies of hearing impaired persons are consequently important not only to these per­sons but also to the community at large.

0006Unfortunately, presently available hearing aids are often subject to a feedback phenomenon which produces distortion, ringing, and squealing. If the hearing aid can be adjusted by the hearing impaired person to reduce the feedback, the volume delivered is usually reduced also. Not only is the person enmeshed in a dilemma of choosing between feedback and reduced volume, but also the adjust­ment process itself is one more inconvenience in that per­son's life. Not surprisingly, many users of hearing aids leave the aid misadjusted or simply put the hearing aid aside because of the inconvenience and lack of satisfactory operation with which they must cope.

0007Conventionally, a microphone in the hearing aid generates an electrical output from external sounds. An amplifying circuit in the aid provides a filtered version of the electrical output corresponding to the sounds picked up by the microphone. The filtering can be due to an inherent characteristic of the amplifying circuit or may be deliberately introduced. The amplified and filtered output of the hearing aid is fed to an electrically driven "receiver" for emitting sound into the ear of the user of the hearing aid. (In the hearing aid field, a receiver is the name of an electronic element analogous to a loudspeak­er or other electroacoustic transducer.) Some of the sound emitted by the receiver returns to the microphone to add a feedback contribution to the electrical output of the microphone. The feedback is amplified by the hearing aid, and ringing or squealing often arise in an endlessly circu­lar feedback process.

Summary of the Invention

0008Among the objects of the present invention are to provide improved electronic filters, hearing aids, other electroacoustic systems and methods which substantially prevent undesirable feedback ringing and squealing; to provide improved electronic filters, hearing aids and other electroacoustic systems which are reliable, compact and economical; to provide improved electronic filters, hearing aids and methods which reliably reject undesirable feedback which otherwise could occur in the daily life of a hearing aid user as when the user puts a hand near the ear or the ear is near a chair back or wall; and to provide improved electronic filters, hearing aids and methods which reliably reject undesirable feedback when the user's jaw moves in talking or chewing.

0009Generally, one form of the invention is an elec­tronic filter for an electroacoustic system. The system has a microphone for generating an electrical output from external sounds and an electrically driven transducer for emitting sound. Some of the sound emitted by the trans­ducer returns to the microphone means to add a feedback contribution to its electrical output. The electronic filter includes a first circuit for electronic processing of the electrical output of the microphone to produce a filtered signal. An adaptive filter, interconnected with the first circuit, performs electronic processing of the filtered signal to produce an adaptive output to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone, and the adap­tive filter includes means for adapting only in response to polarities of signals supplied to and from the first cir­cuit.

0010Generally and in another form of the invention, an electronic filter has a first circuit for electronically processing the electrical output of the microphone to pro­duce a filtered signal and for combining the filtered sig­nal with a second distinct signal for the transducer. Another circuit varies the second distinct signal in magni­tude as a function of the magnitude of the filtered sig­nal. An adaptive circuit, interconnected with the first circuit, processes the filtered signal and second distinct signal to produce an adaptive output to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone means.

0011In general, and in a further form of the inven­tion, an electronic filter includes a circuit for electron­ic processing of the electrical output of the microphone to produce a filtered signal. A first combining means com­bines the filtered signal with a second distinct signal for the transducer in a proportion wherein the magnitude of the second distinct signal is generally less than the magnitude of the filtered signal at loudness of normal speech. A second combining means combines the filtered signal with the second distinct signal to produce a control signal for affecting the processing by the circuit for electronic processing wherein the magnitude of the second distinct signal is generally greater than the magnitude of the fil­tered signal at loudness of normal speech.

0012Generally, still another form of the invention includes a circuit for generating a probe signal for the transducer so that a sound corresponding to the probe sig­nal is included in the sound emitted by the transducer. A filter performs electronic processing of the probe signal in accordance with a series of coefficients to produce a filter output. Some of the sound corresponding to the probe signal returns to the microphone. Means for combin­ing the filter output with the electrical output from the microphone means produces a combined signal input having a changing polarity. Another circuit electronically derives a series of values having polarities responsive to the probe signal. A further circuit increases and decreases running totals in a first storage circuit depending on whether a corresponding value in the series of values has the same or opposite polarity compared to the combined signal input. A yet further circuit respectively adds the running totals in the first storage circuit to the coeffi­cients in a second storage circuit to update the coeffi­cients for the filter less frequently than the increasing and decreasing of the running totals in the first storage circuit occurs.

0013In general, yet another form of the invention for use in a hearing aid is an electronic filter comprised of a VLSI die, a first circuit fabricated on the VLSI die for electronic processing of the electrical output of the microphone to produce a filtered signal and for combining the filtered signal with a second distinct signal for the receiver of the hearing aid. An all-hardware adaptive filter is united with and connected to the first circuit on the VLSI die for processing the filtered signal and second distinct signal to produce an adaptive output to said first circuit to substantially offset the feedback contribution in the electrical output of the microphone in the hearing aid.

0014In general, a yet further form of the invention for use in a hearing aid is an electronic filter having a circuit for amplifying the electrical output of the micro­phone to produce an amplified signal and for combining the amplified signal with a pseudorandom noise signal to pro­duce a combined amplified signal for the receiver. An all-hardware filter performs electronic processing of the combined amplified signal in accordance with a series of coefficients to produce an adaptive output. Further pro­ vided is a means for combining the adaptive output with the electrical output from the microphone as a combined signal input to the circuit for amplifying, the combined signal input having a polarity that changes with time. Circuits temporarily store a series of values representing recent polarities of the pseudorandom noise signal and vary each coefficient in magnitude in the series of coefficients by increasing or decreasing each coefficient as a function of the combined signal input, the increasing or decreasing of each coefficient depending on whether a value corresponding thereto in the series of values is the same as or opposite from the currently-occurring polarity of the combined sig­nal input. The adaptive output thereby substantially off­sets the feedback contribution in the electrical output of the microphone.

0015Generally, a still further form of the invention is an electronic filter that includes a first circuit for electronic processing of the electrical output of the microphone means to produce a filtered signal and for com­bining the filtered signal with a second distinct signal for the transducer. Adaptive filter circuitry is intercon­nected with the first circuit and responds to signals sup­plied to and from the first circuit. The adaptive filter circuitry performs electronic infinite impulse response (IIR) processing of the filtered signal and second distinct signal to produce an adaptive output to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone means. In this way resonances and very long feedback paths in hearing aids, public address systems and other electroacoustic systems are even further obviated.

0016Other forms of the invention are also disclosed, including hearing aid and other system combinations and methods for operating them and other electroacoustic sys­tems.

0017Other objects and features will be in part appar­ent and in part pointed out hereinafter.

Brief Description of the Drawings

0018<ul id="ul0001" list-style="none"><li>Fig. 1 is a pictorial of a user with a hearing aid of the invention including an electronic filter accord­ing to the invention, part of the hearing aid shown in cross-section;</li><li>Fig. 2 is a pictorial side view of the hearing aid of Fig. 1;</li><li>Fig. 3 is an electrical block diagram of the hearing aid of Fig. 1 including an inventive electronic filter circuit with an inventive all-hardware circuit, also showing an acoustic feedback path;</li><li>Fig. 4 is an electrical block diagram of an inventive all-hardware circuit for the electronic filter of Fig. 3;</li><li>Fig. 5 is an electrical block diagram of a serial interface, random access memory and several filter-limit-­filter sections in the electronic filter of Fig. 3;</li><li>Fig. 6 is a partially graphical, partially block diagrammatic representation of a finite impulse response (FIR) digital filter used in the some of the inventive circuits;</li><li>Fig. 7 is partially graphical, partially block diagrammatic illustration of operations in a preferred embodiment for making a digital filter adaptively simulate or mimic the characteristics of a feedback path;</li><li>Fig. 8 is a diagram of a feedback path supplied with a probe signal wherein the feedback path has a disper­sion that offers many different delays to the same probe signal;</li><li>Fig. 9 is three graphs of voltage versus time, the first two graphs showing a combined input signal and a probe signal in synchronism, and the third graph showing a product signal being persistently positive for increasing a filter coefficient for simulating the feedback path;</li><li>Fig. 10 is another set of three graphs of voltage versus time, the first two graphs showing the combined input signal delayed relative to the probe signal, and the third graph showing a product signal sometimes positive and sometimes negative and thus having negligible effect on the value of another filter coefficient for simulating the feedback path;</li><li>Fig. 11 is a pair of graphs of voltage versus time showing that the polarity of a combined input signal including speech corresponds in polarity to a pseudorandom noise probe signal near zero crossings of the speech;</li><li>Fig. 12 is a partially block, partially schematic diagram of an inventive logic circuit for controlling an adaptive filter in Fig. 4;</li><li>Fig. 13 is a schematic diagram of a data bus carrying a digital signal having a magnitude and a polari­ty;</li><li>Fig. 14 is a schematic diagram of an analog sig­nal line with a comparator for detecting a polarity signal;</li><li>Fig. 15 is another block diagram of an all hard­ware circuit on a VLSI die having first and second combin­ing circuits for the noise signal according to another inventive embodiment;</li><li>Fig. 16 is a partially block, partially schematic diagram of another inventive form of logic circuit for controlling an adaptive filter for simulating a feedback path;</li><li>Fig. 17 is a block diagram of another inventive all-hardware circuit on a VLSI die;</li><li>Fig. 18 is a graph of speech and pseudorandom probe noise components versus time in a combining circuit wherein the magnitude of the noise, as a second distinct signal, is generally greater than the magnitude of the filtered signal at loudness of normal speech;</li><li>Figs. 19 and 20 are a pair of graphs of speech and pseudorandom probe noise components versus time in another combining circuit wherein the magnitude of the noise, as a second distinct signal, is generally less the magnitude of the filtered signal at loudness of normal speech, and the magnitude of the noise is varied in magni­tude as a function of the magnitude of the speech;</li><li>Fig. 21 is a block diagram of an inventive all-­hardware circuit on a VLSI die where a subtracter is used as a combining circuit for offsetting the feedback contri­bution;</li><li>Fig. 22 is a partially block, partially schematic diagram of an inventive logic circuit for use in the cir­cuit of Fig. 21;</li><li>Fig. 23 is a partially block, partially schematic diagram of an inventive logic circuit for producing running totals and adding them to coefficients for a digital filter from time to time;</li><li>Fig. 24 is a partially block, partially schematic diagram of another inventive logic circuit for producing running totals and adding them to coefficients for a digi­tal filter from time to time;</li><li>Fig. 25 is a graph of decibels (dB) versus fre­quency (kiloHertz, kHZ.) showing a frequency spectrum (in solid) of the output of a hearing aid without feedback offset compared to a frequency spectrum (in dashed) of the output of a hearing aid with feedback offset according to the invention;</li><li>Fig. 26 is a block diagram of another inventive electronic filter for a hearing aid according to the inven­tion improved with an infinite impulse response adaptive filter;</li><li>Fig. 27 is a block diagram of yet another inven­tive electronic filter for a hearing aid according to the invention improved with an infinite impulse response adap­tive filter and an error filter; and</li><li>Fig. 28 is a process flow diagram illustrating some inventive methods for operating an electronic filter and a hearing aid of the invention.</li></ul>

0019Corresponding reference characters indicate cor­responding parts throughout the several views of the draw­ings.

Detailed Description of Preferred Embodiments

0020In Fig. 1 a hearing aid 11 receives external sounds at an input microphone 13 in an earpiece 14. Micro­phone 13 generates an electrical output from sounds exter­nal to the user of the hearing aid for an over-the-ear-unit 15 which produces an electrical output for a receiver or transducer 17 that emits filtered and amplified sound from earpiece 14 into the ear of the user of the hearing aid. (In another hearing aid, not shown, the microphone 13 and receiver 17 are in a behind-the-ear (BTE) unit and not in an earpiece, and the improvements described herein are equally applicable to this and other units.)

0021For purposes of the present disclosure it is important to note that some of the sound emitted by receiver 17 returns to the microphone 13 as feedback indi­cated by arrows such as 19 and 21 from the opening of a channel 23 by which receiver 17 communicates with the ear canal of the user. Other feedback passes through the side of earpiece 14 and takes a shorter path to the input micro­phone as illustrated by arrow 25. Some sound 29 feeds back directly from receiver 17 through interior absorber mater­ial 27 of earpiece 14 to the microphone 13.

0022Feedback is disadvantageously associated with squealing, ringing, erratic operation and instability in the operation of hearing aid 11. Accordingly it is desir­able to find some way to permit hearing aid 11 to operate more satisfactorily even though feedback according to the numerous paths indicated by arrows 19, 21, 25 and 29 unavoidably occurs.

0023Fig. 2 shows a side view of hearing aid 11 with its over-the-ear unit 15 which includes filtering and amplifying circuitry. In a clinical fitting procedure, unit 15 is loaded with digital information through a con­nector 35 connected by a cord 37 from a host computer sys­tem such as that described in U.S. patent 4,548,082 which is incorporated herein by reference. After the hearing aid 11 has been loaded at the clinic with information which suits it to ameliorate the particular hearing deficiency of the user, connector 35 is detached from the rest of the hearing aid and replaced with a battery pack 39 for con­venient daily use. One type of preferred embodiment is improved with inventive feedback offsetting circuitry that requires no additional information from the host system to govern the offsetting operations.

0024In Fig. 3 a block diagram of unit 15 includes an electronic filter 41 that has an all-hardware circuit 43 that accomplishes numerous functions for ameliorating the hearing deficiency of the user and offsets feedback contri­bution 44 which unavoidably occurs in hearing aid 11 as already discussed. Circuit 43 is discussed in greater detail hereinbelow.

0025Also as shown in Fig. 3, connector 35 of Fig. 2 includes terminals for a pair of serial lines from the host computer system, a line for external supply voltage V and a DC return common line. A battery in connector 39 of Fig. 2 is shown in Fig. 3. The serial lines of connector 35 from the host system as an external source are connected to a serial interface integrated circuit 45 in unit 15. Serial interface circuit 45 provides the received filter coeffi­cients in parallel form along a data bus 47 to all-hardware circuit 43. A random access memory (RAM) 49 holds coeffi­cient data which have been downloaded from the host sys­tem. RAM 49 is supplied with voltage V through a diode 51. When the external connector 35 is being replaced with connector 39, RAM 49 retains the coefficients by using temporary power from a small battery 53.

0026All-hardware circuit 43 processes digitized audio information from input microphone 13. Microphone 13 is suitably an electret microphone which receives battery voltage V for operating power and provides an output to an anti-aliasing low pass filter (LPF) 59 which has a cutoff frequency of 6 kiloHertz. LPF 59 in turn feeds a sample and hold circuit S/H 61. S/H 61 in turn feeds analog sam­ples to an analog-to-digital converter (ADC) 63 which con­verts the samples to digital form and temporarily holds them in an ADC output register. The samples are provided from the ADC register to the all-hardware circuit 43. Circuit 43 processes them and supplies a digital output, corresponding to filtered and amplified external sound with feedback offset, to a digital to analog converter (DAC) 65. The analog output of DAC 65 is fed to an analog active filter (AAF) 67 which amplifies the analog output and drives receiver 17 through a blocking capacitor 69. Receiver 17 produces sound corresponding to the analog output for the ear as described in connection with Fig. 1. Unavoidable feedback to the input microphone 13 is indi­cated by curved feedback arrow 44 of Fig. 3.

0027All-hardware circuit 43 of Fig. 3 has an associ­ated clock and decoder circuit 81 and a control latch 83. Circuit 81 provides clock pulses to all-hardware circuit 43 on a line 85 and various control pulses for operating ser­ial interface 45 via a line 87. Sample and hold circuit 61 is controlled via a line 89 from control latch 83, which in turn is controlled by circuit 81 through a decoder output line 91. ADC 63 is controlled via a line 93 from control latch 83. Circuit 81 also clocks the output register REG of ADC 63 via a line 95. Circuit 81 further clocks DAC 65 through a line 97. The details of the control circuitry, as well as of a power-on reset circuit POR, are suitably provided in a conventional manner and need not be discussed further herein.

0028In Fig. 4 further details of the all-hardware circuit 43 are illustrated, together with blocks indicating the transfer functions of the microphone 13 and receiver 17.

0029External sound Xi is converted by microphone 13 and circuits 61 and 63 of Fig. 3 to digital electrical form for circuit 43 according to a transfer function Hm indi­cated by block 101 of Fig. 4. A further transfer function Hr indicated by block 103 represents conversion by DAC 65, additional amplification by AAF 67 beyond that provided by circuit 43, and transducer action by receiver 17. Part of a resulting acoustic output Xo from receiver 17 is fed back according to another transfer function Hf block 105 and inherently acoustically summed at the input microphone 13 (Hm 101). Accordingly feedback contribution 44 is mingled with the external sound Xi when it reaches all-hardware circuit 43.

0030The digital output of block 101 is fed to a com­bining circuit such as a summer 107 of circuit 43. The output of combining circuit 107 is designated En and is supplied to a digital filter 109 operating according to the data in RAM 49 of Fig. 3 to ameliorate the hearing defi­ciencies of the user. This digital filter 109 has a trans­fer function Hs. The output of filter 109 constitutes a filtered signal which is supplied to an additional combin­ing circuit 111 that produces an output Y to drive the Hr block 103. The circuitry with elements 107, 109 and 111 is an example of a first means for electronic processing of the electrical output of the microphone to produce a fil­tered signal and for combining the filtered signal with a second distinct signal for the receiver of the hearing aid. Filter 109 and combining circuit 111 also act as an example of a means for amplifying the electrical output of the microphone to produce an amplified signal and for combining the amplified signal with a pseudorandom noise signal to produce a combined amplified signal for the receiver.

0031In this preferred embodiment of Fig. 4 the output Y is further also fed back through a special adaptive fil­ter 113, with transfer function He, which continually and variably further filters the output Y and produces a resulting output of its own for the combining circuit 107. The output of adaptive filter 113 thereby substantially offsets the feedback contribution 44 from block 105 even though not only the level but also the transfer function Hf of that feedback is changing with time.

0032For example, when the user sits near a wall the feedback transfer function Hf is different from Hf when the user is in the center of a large room. The user also changes the feedback path and thus Hf by moving a hand near the ear, or by chewing or otherwise moving the jaw or in numerous other ways, in the daily life routine. Remarkably the adaptive filter 113 offsets this varying feedback in a manner which considerably increases the convenience and value of the hearing aid to the user.

0033Control for adaptive filter 113 involves a pseudorandom noise generator 115 and a logic circuit 117. Noise generator 115 produces a digital pseudorandom noise signal Se, which is supplied to combining circuit 111 and there weighted by an appropriate weight W1 (or multiplying factor) for the pseudorandom noise signal so that the out­put of combining circuit 111 is Y = HS*En + W1.Se      (1) where Y is the output of circuit 111, En is the combined signal input processed by the filter function Hs, W1 is a weight multiplied by pseudorandom noise Se, which is a function of sample number n. Asterisk "*" refers to con­volution, as discussed hereinbelow in connection with Fig. 6.

0034The Y output of combining circuit 111 is provided to logic circuit 117 which has as an additional input a single one of the bits of input signal En. Logic circuit 117 acts as a controller for the adaptive filter 113, which remarkably varies the transfer function He of filter 113 to equal (or mimic) the feedback loop transfer function HrHfHm as Hf varies. In this way the feedback can be offset at all times by the output of filter 113 to combining circuit 107.

0035Advantageously, pseudorandom noise Se is thus supplied to the hearing aid circuitry at combining circuit 111 as a second electrical signal (or probe signal) that probes the feedback path Hf 105 since some sound corre­sponding to the probe signal is emitted by receiver 17 along with amplified speech. Also, the noise is acousti­cally fed back to the microphone 13 with the rest of feed­back contribution 44 and becomes included in signal En to which the logic circuitry 117 that controls filter 113 responds.

0036The block diagram of Fig. 4 is illustrative of both inventive apparatus and methods for use in hearing aid applications and is also applicable in systems generally in which instability occurs because of undesirable coupling between output and input transducers, such as often occurs in public address systems.

0037Key parts of the apparatus and process are illus­trated in Fig. 4 and include excitation source Se 115 and adaptive equalization filter 113 with transfer function He. Other parts in Fig. 4 represent the input signal Xi, input transducer and circuit Hm 101, system process Hs 109, output circuit and transducer Hr 103, output signal Xo, and undesirable external feedback path with transfer function Hf 105. The adaptive process is such that the error signal En is minimized in the least mean square sense by adjusting the coefficients of the filter transfer function He to offset or cancel the presence of the external feedback path, assuming a zero mean signal at the output of Hm. Adjustment of the filter coefficients in filter 113 of Fig. 4 is accomplished according to the recursive expression: C_i(n+1) = C_i(n) + 1.sgn[En.Y(n-i)]      (2) where C_i(n+1) represents the <u style="single">i</u>th coefficient at sample number n+1, C_i(n) represents the <u style="single">i</u>th coefficient at sam­ple number n, En represents the error (also called combined signal input herein) at sample number n, and Y(n-i) repre­sents the input to the filter at sample number n-i. The second term on the right of the equation adds or subtracts a positive constant 1 (lambda) to each <u style="single">i</u>th coefficient depending on the sign of the product term. In this way the coefficients are adjusted over time to minimize the mean square of the error En, which is primarily the difference between the signals due to the external feedback path and the internal adaptive filtering path (also called an equal­ization path herein) if the external input Xi be ignored. The influence of the externally derived signal Xi is mini­mized by the combined signal delay through system process Hs and either feedback path Hf or adaptive filter path He. The system readily accommodates the addition of extra delay in system process Hs or in series with system process Hs as desired to even further reduce any effect of the external signal Xi.

0038The recursive expression in the above equation (2) is uncomplicated and is economically implemented in VLSI (very large scale integration) form. Calculation of the sign of the product term is readily accomplished with an exclusive-or logical operation on the polarity informa­tion in error signal En and each sample of output Y repre­sented by Y(n-i) going back in time from latest value n (i=0). When lambda is made to be unity, updating each coefficient is an up-down counter operation that is con­trolled by the sign of the product term. The rate of adap­tion is determined by the recursion rate, or clock rate in the electronic embodiments.

0039In Fig. 4, circuit elements 107, 109, 111, 113, 115 and 117 are implemented in VLSI on a VLSI die or sub­strate 121. A discussion of VLSI principles which is gen­erally available to workers in the field is found in C.A. Meade, Introduction to VLSI Systems, Addison-Wesley, 1980, see for instance pages 60-84, 91-115, 155-164 and Plates 1-15 . System process Hs 109 is implemented as a first all-hardware digital filter for electronic processing of the electrical output of the microphone in accordance with a first series of digital coefficients to produce a fil­tered signal and for combining the filtered signal with a second distinct signal for the receiver. Adaptive filter He 113 is also implemented as a second all-hardware digital filter united with and connected to the first all-hardware digital filter as one VLSI circuit on die or substrate 121, for electronic processing of the filtered signal and second distinct signal in accordance with a second series of digi­tal coefficients to produce an adaptive output. The adap­tive output is combined with the microphone output, to produce a combined signal input for the first digital fil­ter, by combining circuit 107 which is suitably also laid down on die 121 with such other elements in Fig. 3 as maxi­mize convenience, economy and reliability. Further, cir­cuit 117 is implemented as an all-hardware logic circuit united with and connected to the first all-hardware digital filter for adaptively varying the digital coefficients of the second all-hardware digital filter as a function of the combined signal input so that the adaptive output substan­tially offsets the feedback contribution in the electrical output of the microphone.

0040Adaptive filter 113 is thus an example of a digi­tal adaptive filter means, interconnected with the first means, for electronic processing of the filtered signal and second distinct signal to produce an adaptive output to the first means to substantially offset the feedback contribu­tion in the electrical output of the microphone means in the hearing aid, the digital adaptive filter means includ­ing means for adapting only in response to polarities of signals supplied to and from said first means.

0041In logic circuit 117, the coefficient updating for filter 113 is suitably accomplished by implementing an adder-subtractor in which case the positive integer lambda 1 is added to or subtracted from particular <u style="single">i</u>th coefficient value depending on the sign of the product of En with Y(n-i). In this case the rate of adaption is determined by the recursion (clock) rate and the magnitude of lambda 1.

0042An excitation signal such as Se that drives the adaptive process is readily implemented as a pseudorandom maximal-length sequence which has values of plus and minus one (1), with a zero mean, and is very wideband with a flat spectrum. Illustratively, this signal Se is produced by a 15-bit shift register with a two-input exclusive-OR gate fed from arbitrarily selected bit positions (e.g., 1 and 3) on the shift register. The output of the exclusive-OR gate is connected to the input of the shift register. The shift register generates a pseudorandom signal that repeats only after 2¹⁵-1 cycles or bits. The excitation signal Se can be provided at a low level so that it is below threshold for users with severe hearing impairment or near threshold in which case it is perceived as a low-level sound, such as a white noise when noise is used.

0043In one embodiment of Fig. 4 a clock rate of 12.5 kiloHertz (twice the Nyguist rate of at least the frequency of the highest audio component to be sampled) is derived from circuit 81 of Fig. 3. Adaptive filter 113 is a digi­tal finite impulse response (FIR) filter with a register length of 20 stages and preferably even 40 stages. Sound in air takes about 30 microseconds to travel one centi­meter. A clock rate of 12.5 kiloHertz is 80 microseconds per repetition period and thus 80 microseconds per filter 113 register stage. This means that each register stage is a snapshot of the feedback (mixed up with the external input to be sure) each 80 microseconds, and thus about every 2 or 3 centimeters of acoustic delay in the feedback path is mapped into the shift register in addition to the delay through receiver 17. Consequently, an acoustic feed­back path roundtrip length of illustratively as much as 54 centimeters and more is readily accommodated with 20-stage FIR adaptive feedback filtering in this way. Since reflec­tions from substantially greater distances are likely to be low in amplitude in hearing aid applications, such long-­distance reflections are unlikely to materially exacerbate a feedback condition. Adaptation to obtain a new set of He coefficients when the feedback path changes is preferably accomplished in less than about 2 seconds and even more preferably in less than a second.

0044The system of Fig. 4 and the adaptive process or method also represented by the above equation and descrip­tion were implemented and evaluated on a laboratory-based digital signal processing system and on an experimental wearable digital hearing aid. In both implementations an ear module consisting of a microphone and receiver as in Fig. 2 in an in-the-ear module and a second version con­sisting of a microphone and receiver in a behind-the-ear module coupled acoustically to the ear were used. In both instances the hearing aid gain Hs could be adjusted so that oscillation due to acoustic feedback between receiver and microphone occurred in the absence of equalization or offsetting. When the offsetting process was used under the same conditions by introducing adaptive feedback filtering as disclosed herein, oscillation ceased.

0045The performance of the adaptive system is excel­lent. The apparatus and process are stable over a wide range of system gains, system transfer characteristics and adaption rates. The adaptive system does not require that the system process Hs be linear, and indeed in Fig. 5 a system process Hs is shown that includes nonlinear limiter elements. The adaptive filter 113 coefficients can be updated singly upon the occurrence of each latest sample, or they can be updated as a whole or together essentially simultaneously after a period of time when many samples have arrived. Mixtures of these two processes are also feasible. The updating of individual coefficients can occur by independent processes. Accordingly, numerous embodiments of the invention are made available to the skilled worker.

0046Any self oscillation which occurs when the unde­sirable, external feedback characteristic Hf changes sud­denly, if such oscillation occurs at all, is accommodated by the apparatus and processes disclosed herein. The self oscillation signal would act and does act as a distinct signal from the sound which is to be amplified by the hear­ing aid, and is thus treated in similar fashion to already present distinct signal Se. Therefore, when any accidental oscillations occur briefly, if at all, the system continues to adapt to an equalized state of complete offset of feed­back, and no auxiliary circuits and processing to detect and inhibit self oscillation are needed.

0047The system of Fig. 4 not only prevents self-­oscillation, but also equalizes or adjusts the system to prevent underdamped or near-oscillatory conditions from occurring. In conventional hearing aids, near oscillatory conditions result in undesirable signal distortion and poor performance.

0048In Fig. 5 a preferred version of filter 109 of Fig. 4 includes four sections of all-hardware filter-limit-­filter hardware blocks operating in four different frequen­cy bands to act as a four-channel filter-limit-filter digi­tal filter. As in Fig. 4 the combining circuit 107 adds an adaptive output from block 113 of Fig. 4 to the digitized output of the external microphone 13. Combining circuit 107 feeds each of four finite impulse response (FIR) digi­tal filters 131.1, 131.2, 131.3 and 131.4. Each of these four filters is provided with coefficients from the serial interface 45 of Fig. 3 which are stored in RAM 49. The outputs of the four filters 131.1 -.4 are respectively fed to four limiter circuits 133.1, 133.2, 133.3 and 133.4. The limiters are nonlinear devices which prevent or limit an output from the previous filter blocks from exceeding a predetermined level which also is provided as input data from the serial interface 45 and stored in RAM 49. The outputs of the limiter circuits are in turn respectively fed to additional digital filters 135.1, 135.2, 135.3 and 135.4. Both the filters in the group 131 and filters in the group 135 are suitably finite impulse response (FIR) filters which are tuned according to the coefficients pro­vided to them to establish four contiguous frequency bands generally spanning the audible frequency range. The out­puts of the filters 131.1 -.4 are all fed to the combining circuit 111 to which the W1-weighted pseudorandom noise Se is also provided to produce the output Y.

0049Fig. 6 illustrates principles of operation of finite impulse response (FIR) filters generally and of each and any of the finite impulse response digital filters 113, 131.1-.4, and 135.1-.4 of Figs. 4 and 5 for instance. An impulse response 141 of a filter is the output of the fil­ter when it is excited with a single impulse input (as expressed by a mathematical delta function). The actual input 143 of a real filter in a real application is of course some general voltage over time and not an impulse. However, the actual voltage input over time can be regarded as a succession of impulses. The impulse responses of the filter to the succession of input impulses are curves like impulse response 141, except time-shifted and scaled rela­tive to impulse response 141. These impulse responses are added together in order to determine an output 145 of the filter in response to the actual voltage input over time. The shifting, scaling and adding process is called convolu­tion of the input 143 with impulse response 141.

0050In Fig. 6 the impulse response 141 illustrated for one example, begins at zero, rises to a peak and then gradually decays away over infinite time. A set of coeffi­cients C₀, C₁, C₂, C₃, C₄, C₅, ..., C_i, ... C_M of the filter are loaded as digital representations into the RAM 49. The coefficients represent selected values on impulse response 141 over a finite initial length of time, hence the name "finite impulse response" filter.

0051The input 143 is a series of sample values in digital form which are input to a shift register for hol­ding the digital values beginning with a most recent sample S_n and going backwards in time to previous samples S_n-1, S_n-2, S_n-3, S_n-4, S_n-5, ... S_n-i, ... S_n-M. Multiplying arithmetic logic circuitry and adding circuitry forms the products C₀S_n plus C₁S_n-1 plus ... plus C_iS_n-i ... plus C_MS_n-M. The just-­described sum of products at any given time constitutes the electrical output of the FIR filter at that time. Upon the arrival of an additional input sample all of the samples in the shift register are moved one to the right so that S_n is now the latest most recent sample and S_n-1 is the sample which was S_n in the previous computation. Then the sum of products is recalculated forming the next suc­cessive electrical output of the FIR filter. This process is repeated over time to produce a time-domain output 145 of the FIR filter as shown in Fig. 6.

0052For brevity FIR filters where used in the present work are simply indicated with blocks, it being understood that the operations and circuitry are provided as appro­priate to achieve the filter operation desired. Coeffi­cients are designated for general discussion herein by the letter C with a subscript for the particular coefficient. Coefficients for particular filters are also designated by their transfer function designator followed by parenthesis designating the particular coefficient, e.g. He(M). Coef­ficients for the filters are varied by associated logic circuitry controlling them, as indicated by a slanting arrow through each filter box. Where no logic circuitry is indicated, and a slanting arrow is used, the logic circui­try is included with the filter and the logic circuitry has two inputs, the first input being from the source of the slanted arrow and the second input being from the input to the filter box.

0053Fig. 7 is an illustration for a heuristic expla­nation of the adaptive filter operations which are imple­mented in a preferred embodiment such as that of Fig. 4. Most of the elements of Fig. 4 are suppressed for clarity. The pseudorandom noise signal Se is supplied to the hearing aid system as bipolar pulses, and an individual pulse of this pseudorandom noise is shown entering the hearing aid system as a pulse 151. Measurements on one receiver indi­cate that it has a linear phase delay of about 480 micro­seconds, meaning that it produces a sound corresponding to an electrical signal input to it about 480 microseconds later, or 6 time units of 80 microseconds per sample. A sound corresponding to the noise signal Se is included in the sound emitted by the receiver. Some of the sound cor­responding to the probe signal returns to the microphone after a delay period roughly equal to the sum of the 6 time units of delay of the receiver plus more delay attributable to the feedback path.

0054In Fig. 7, the single illustrated pulse 151 passes back to the input microphone and then to combining circuit 107 as part of the feedback contribution 44. It will be understood as shown in Figs. 1 and 8 that there are actually many acoustic feedback paths of differing propaga­tion delay times among which the impulse 151 becomes divided. The various preferred embodiments remarkably are able to accommodate the very substantial complexity of the many feedback paths. Only three of the feedback paths are shown in Fig. 8 having delays of eight, nine and ten time units, (including 6 units for receiver 17 delay) for instance. Since the coefficients in adaptive filter 113 of Fig. 4 are independently updated, it is sufficient for example to describe the inventive operations in logic cir­cuit 117 with respect to a Fig. 8 portion of the feedback path with 9 time units of delay.

0055Referring to Fig. 7, a shift register in the logic circuit 117 of Fig. 4 stores the last 20 samples of the pseudorandom noise signal Se (or some signal such as Y that includes Se). Also, the output of combining circuit 107 is fed as combined signal input En to the logic circuit 117. The polarity of combined signal input En is compared with the polarity of each one of the values of the pseudo­random noise signal in the shift register store. The ninth stage in the shift register has a polarity of the pseudo­random noise signal that matches the polarity of the arriv­ing pulse 151 because pulse 151 has been delayed for 9 time units. The comparing process then produces a positive or increasing magnitude of output for the ninth stage which then is used to successively increase the magnitude of the ninth coefficient C₉ in the coefficients of FIR digital filter 113.

0056Fig. 9 illustrates the comparing process. A first graph 161 shows a progression of polarities of the imput signal En. Another waveform 163 represents the polarity of the ninth stage of the shift register of Fig. 7 over time. The polarities of waveform 163 exactly match those of the waveform 161 at any given time. By multipli­cation or by an exclusive-OR (or exclusive-NOR) operation, the product of the two waveforms 161 and 163 over time is always positive as represented by incrementing signal INC in Fig. 9. This consistently positive value of increment­ing signal INC is used to persistently increase the magni­tude of coefficient C₉.

0057Referring again to Fig. 7 the sign of the ninth coefficient is arranged to offset the feedback in combining circuit 107. Since circuit 107 is a summer, the sign of the coefficient is made negative as it increases in magni­tude.

0058Accordingly, coefficient C₉ is initially increased to a small value 153 in Fig. 7 since uncancelled feedback is detected in a feedback path with delay of 9 time units. The signal Y in Fig. 4 includes the pseudoran­dom noise and is filtered by adaptive filter 113 according to coefficient C₉, among other coefficients. That part of the output of filter 113 which has a delay of nine time units due to the action of the coefficient C₉ partially offsets the feedback in the part of the feedback path with delay of 9 time units. Since the small value 153 for coef­ficient C₉ is insufficient to provide enough offset to cancel the corresponding feedback, then there will still be uncancelled feedback detected when the polarity of signal En is next compared with the polarity in the ninth stage of the shift register in the logic circuit 117. As time goes on, coefficient C₉ consequently becomes increased more and more until it reaches a larger value 155 which success­fully cancels the feedback in the path with a delay of nine time units. Once the offsetting is complete, the compari­son process in logic circuit 117 produces an output of zero and the coefficient C₉ in the filter 113 reaches an equi­librium. If the process overshoots or the acoustic feed­back decreases due to activities of the hearing aid user, the magnitude of coefficient C₉ is decreased back to equilibrium because the polarity of the feedback becomes consistently opposite to the polarity of the value in the ninth cell of the shift register of logic circuit 117 and the comparing process causes the decrease.

0059External sound and feedback from feedback paths with other amounts of delay in Fig. 8 average out to zero in the comparison process and produce only statistical fluctuations rather than bias in coefficient C₉. Fig. 10 illustrates this averaging process between a feedback com­ponent of delay 7 and the polarity in shift register stage 9. In Fig. 10, waveform 163 (polarity of Se in shift reg­ister stage 9) and a waveform 165 (polarity of feedback component with delay 7) are compared. The result, unlike the incrementing waveform INC of Fig. 9, is a waveform 167 which is negative about as much of the time as it is posi­tive. Therefore, the coefficient C₉, for example, fluc­tuates somewhat but on average is unaffected by the signal resulting from the feedback path portion having delay equal to 7 or any other delay besides 9 time units.

0060Reference is made again to Fig. 7. Since all of the other coefficients as well as C₉ in the filter 113 are concurrently varied toward their equilibria by analo­gous processing, the logic circuit 117 in effect causes adaptive filter 113 to simulate or mimic the impulse response of the entire feedback path to the extent of available coefficients, taps, or length, in the FIR filter 113. Moreover, since all the coefficients are varied toward equilibrium values which offset and cancel the probe signal returning by acoustic feedback, they are of necessi­ty the correct values to offset and cancel the feedback of the external sound itself, thus eliminating the entire feedback contribution in the hearing aid.

0061As thus described, the combined signal input (e.g. En) is a digital signal that has a magnitude and includes a polarity signal representing a changing polarity of the combined signal input. The logic circuit 117 has a shift register which acts as an example of a means for temporarily storing a series of values, connected to the first means (e.g. Hs and summer 111 of Fig. 4) so that the series of values represent samples of polarity of the fil­tered signal combined with the second distinct signal, or alternatively represent samples of polarity of the second distinct signal alone. The shift register is also regarded as an example of a means for electronically deriving a series of digital values having polarities responsive to the probe signal. The logic circuit also has add/subtract circuitry that increases and decreases each coefficient in magnitude for the all-hardware digital filter. The increasing and decreasing of each coefficient respectively depend on whether a corresponding value in the series of values has the same or opposite polarity compared to the polarity currently represented by the polarity signal. As a result, the He filter 113 acts as an example of a digital filter for electronic processing of the probe signal in accordance with a series of digital coefficients to produce a filter output that substantially offsets the feedback contribution in the electrical output of the microphone in the hearing aid. Remarkably, the preferred embodiments constantly simulate the impulse response of the feedback path as it is at any given time and modify the impulse response as the actual impulse response of the feedback path itself changes during the daily routine of the user, whereby acoustic feedback is offset and eliminated.

0062To even further illustrate advantageous operation in the presence of external sound such as speech, Fig. 11 provides a graph of an input waveform of speech 171 (dashed), together with a graph (beneath) of pseudorandom noise 173. Adding these two waveforms 171 and 173 together and detecting the polarity of the sum produces a waveform 175. The noise 173 contributes to the polarity of waveform 175 near the zero crossings of the speech waveform 171. Other periods of positive or negative polarity due to the speech cause averaging to zero in the comparing process with noise 173 in logic circuit 117.

0063Fig. 12 shows a detailed circuit diagram of logic circuit 117 of Fig. 4. Output Y from combining circuit 111 of Fig. 4 is shifted through a storage circuit such as a series of registers 181.0, 181.1, ... and 181.M which are the counterparts of the stages of the shift register of Fig. 6 marked with samples S_n, S_n-1...S_n-M. Polarity signals from each of the registers in the group 181 are respectively supplied to a set of exclusive-OR gates 183.0, 183.1...183.M. The registers in the group 181 are effi­ciently shared with FIR filter 113 since they hold the samples of the output Y needed for filter 113. A polarity bit from the input signal E_n is provided in common to an additional input of every one of the exclusive-OR gates in the group 183. The exclusive-OR gates in the group 183 have outputs which control add-subtract circuits 185.0, 185.1...185.M. When the polarity of the input signal E_n is the same as the polarity of the contents of any given register, such as 181.1 for example, then the exclusive-OR gate 183.1 produces a low output. Add-subtract circuit 185.1 corresponding thereto is responsive to an input high to add and to an input low to subtract. Accordingly, when the polarity of the input signal E_n is the same as the polarity of the contents of register 181.1, add-subtract circuit 185.1 performs a subtract operation. In the embod­iment of Fig. 12, a subtract operation decrements by one as indicated by input from a square block marked "1" for each of the add-subtract circuits in the group 185. In this particular embodiment the increasing and decreasing of each coefficient thus occurs by a predetermined amount (e.g., lambda = 1) independent of both the magnitude of the com­bined signal input and the magnitude of the filtered signal combined with the second distinct signal (e.g. output Y). Repeated subtractions produce a negative coefficient value He(1) for the FIR filter 113 for offsetting purposes.

0064A clock output from clock and decoder circuit 81 of Fig. 3 clocks the registers in the group 181 as well as an additional group of registers 187.0, 187.1...187.M respectively fed by the add-subtract circuits 185.0, 185.1...185.M. The outputs of the registers in the group 187 are respectively coupled to an additional input of the corresponding add-subtract circuits in the group 185. As a result of the operations of the logic circuit 117 of Fig. 12, the registers in the group 187 produce outputs which digitally represent the coefficients He(0), He(1),...He(M) for the adaptive filter 113.

0065If the entire register length of each register 187.0, 187.1... 187.M is used to represent the value of each filter coefficient, then a degree of statistical fluc­tuation can occur in each coefficient in adaptive opera­tions. An uncomplicated approach for reducing statistical fluctuations in coefficients is to connect higher-order bits of each coefficient from each register to FIR filter 113, leaving the two (or other selected number ) lowest order bits (or least significant bits) isolated from FIR filter 113.

0066The circuitry of Fig. 12 is thus an example of a logic circuit for adaptively varying the digital coeffi­cients of an all-hardware digital filter as a function of polarity of the combined signal input independently of its magnitude so that the adaptive output substantially offsets the feedback contribution in the electrical output of the microphone.

0067Fig. 13 illustrates circuitry by which the polar­ity signal En(polarity) of Fig. 12 is derived. The output of combining circuit 107 of Fig. 4 is suitably an 8-line data bus 201 for carrying signal En. In Fig. 13 one of the lines of the data bus 201 represents the polarity or posi­tive or negative character of the input signal En. The rest of the lines collectively carry a parallel digital signal which represents the magnitude of the input signal En.

0068Fig. 14 illustrates that in other embodiments the input signal En is analog. The analog signal is fed to a comparator 203 which acts as a polarity detector and pro­duces a digital 1 or 0 corresponding to the positive or negative polarity of the input signal En.

0069Other embodiments for even further improved oper­ation are next discussed. It is desirable to reduce any uncertainty or statistical fluctuations in estimating the filter coefficients that represent a simulation of the external feedback path. For instance, the external sound signal Xi and its amplified counterpart generated by the receiver 17 are believed to introduce some fluctuations, see discussion in connection with Fig. 11. These fluctua­tions can be reduced by the proper choice of the probe signal level and the combined signal delay of the hearing aid and the external feedback path.

0070Therefore, improvements of apparatus and method such as: 1) maintaining a constant ratio between the exter­nal signal level and the internal excitation signal used to "probe" the feedback path, and 2) to add processing delay so that the autocorrelation of the external signal in the error function (combined signal input En) is small, can be effective in reducing the uncertainty of estimation.

0071A further measure 3) involves supplying the probe signal such as noise Se, instead of output Y, to logic circuit 117. Since the external signal Xi and the internal probe signal Se are uncorrelated, it is possible to sepa­rate the contributions of the external signal Xi and inter­nal probe signal Se to the combined signal input En by directly comparing the signal En with the probe signal Se itself, and thereby advantageously accomplish an operation having the same benefits as cross correlating the signal En with the probe signal itself. This can be shown as fol­lows. The signal En in Fig. 4 is given by a sum of convo­lutions En = g1*xi + g2*Se      (3) where En, Xi and Se are the combined input signal (also called the error signal herein), external signal, and internal probe signal respectively and g1 and g2 are the inverse transforms of a pair of transfer functions G1 and G2 respectively given by G1 = Hm/(1-HsH) and      (4) G2 = H/(1-HsH)      (5) where H = HrHfHm + He is the combined transfer function of the external feedback path and the internal equalization feedback path and Hs, Hr and Hm are as shown in Fig. 4.

0072An even more elaborate analysis establishes G1 and G2 by recognizing that (Xi + HfHr(HsFn + Se))Hm + He(HSEn + Se) = En      (6) Rearranging yields XiHm + (HfHrHm + He)Se = En(1 - HeHs - HfHrHsHm)      (7) Dividing through by the parenthesized quantity after En and comparing with the hereinabove defining equation for G1 and G2 yields G1 = Hm/(1 - HeHs - HfHrHsHm)      (8) G2 = (HfHrHm + He)/(1 - HeHs - HfHrHsHm)      (9)

0073A cross-correlation of the error signal En with the probe signal Se produces E[En(n).Se(n-i)] = g2(i)      (10) because the probe signal is uncorrelated with the input signal Xi and the term involving g1 advantageously van­ishes.

0074Accordingly, g2(i) thus obtained is an unbiased estimator of the difference between the external feedback path and the internal equalization path. Therefore, g2(i) can be used to adaptively adjust the coefficients of the adaptive filter or equalization filter to cancel the exter­nal feedback path according to an adjustment process defined by <u style="single">He</u>(j+1) = <u style="single">He</u>(j) - <u style="single">g2</u>(j)      (11) where <u style="single">He</u> refers to the vector of coefficients (and not to the transfer function itself in the Laplace or z domain) and j is an iteration index in the adjustment process and not a designator (like index i) of a particular coeffi­cient. <u style="single">g2</u>(j) refers to the vector of cross-correlations at iteration j.

0075When <u style="single">g2</u> is reduced to the zero vector, the adap­tive filter transfer function He in this example cancels the feedback path according to the equation (involving the transfer functions themselves and not their inverse trans­forms) He = -HrHfHm      (12)

0076"Equalization" as the term is used herein, refers to the process of making the coefficients of the adaptive filter process simulate the coefficients which would describe the path HrHfHm so that feedback can be offset by subtraction, summation or any other combining process, and is not to be confused with equalization as the term is used in some other contexts in the literature for series filter­ing of communication channels, for instance.

0077These processes can be implemented by a variety of apparatus embodiments. In one embodiment, an electronic block computation of cross correlation is performed over one period of the probe signal which is a maximal-length noise sequence. The resulting values of <u style="single">g2</u>(j) are then subtracted from the coefficients corresponding to <u style="single">He</u>(j) to update the adaptive filter.

0078Fig. 15 shows a further VLSI embodiment incorpo­rating improvements to reduce fluctuations caused by the external sound in the estimation of the feedback path. Only those circuit portions which are different from the circuitry of Fig. 4 are explained in additional detail. The output of system process digital filter 109 is fed to an additional combining circuit 211 and weighted with a weighting factor W2. Weight W2 is set to some fraction in a range, illustratively, of about 0.1 to 0.5. Pseudo­random noise signal Se is an additional input to the com­bining circuit 211. At normal levels of speech the weighted contribution of the output of filter 109 does not affect the polarity of its sum in circuit 211 with noise signal Se (see Fig. 18 and discussion later hereinbelow). The output of the combining circuit 211 is fed as a signal U to the logic circuit 117.

0079Logic circuit 117 operates in generally the same way as described hereinabove in connection with Figs. 4, 7 and 12. However, in an abnormal situation in hearing aid use, a feedback instability might substantially increase the output of filter 109. The output would then exceed normal speech loudness levels and contribute in a polarity-­determinative manner to the output U of combining circuit 211 notwithstanding the fractional value of W2. The input En and the output U would correlate substantially to one another due to the feedback itself. Combining cir­cuit 211 thus causes logic circuitry 117 to speed up the adaption process in the abnormal situation, using the feed­back itself for controlling the logic circuitry 117 to eliminate the instability.

0080In another improvement, noise input weight W1 of combining circuit 111 of Fig. 15 is made variable by adding an automatic gain control (AGC) circuit 215. AGC circuit 215 is responsive to output S of system filter 109. AGC circuit 215 is made to operate so that the amount of pseudorandom noise signal Se which is combined with the output S of filter 109 increases directly with average sound volume level in the output S. In this way, when the external sound is faint, there is less pseudorandom noise injected into the hearing aid circuit. Advantageously, the presence of the pseudorandom noise signal becomes less noticeable at such times due to the action of automatic gain control circuit 215.

0081On the other hand, when sound output S of filter 109 has greater magnitude due to loud external sounds, a substantial amount of pseudorandom noise signal is injected into the hearing aid circuit at combining circuit 111 due to an increased value of weight W1 established by the AGC circuit 215 in response to the output S. In this way, a significant presence of the pseudorandom noise signal is established at the zero crossings of speech (compare Fig. 11) at all speech magnitudes, and the operation of logic circuit 117 is made even more reliable and effective in controlling the adaptive filter 113.

0082ACG circuit 215 suitably has an energy or enve­lope detector (such as a rectifier and low pass filter) connected to a voltage controlled multiplier connected to the Se noise generator to vary the noise level provided to the input of combining circuit 111 as described herein.

0083AGC circuit 215 thus is an example of a means for varying the second distinct signal (e.g. Se) in magnitude as a function of the magnitude of the filtered signal, and indeed as a direct function of an average of the magnitude of the filtered signal. Also, the circuitry including combining circuits 111 and 211 constitutes an example of first combining means for combining the filtered signal with a second distinct signal for the receiver of the hear­ing aid in a proportion wherein the magnitude of the second distinct signal is generally less than the magnitude of the filtered signal at loudness of normal speech and second combining means for combining the filtered signal with the second distinct signal to produce a control signal or sec­ond combined signal for affecting the processing by the means for electronic processing (e.g. filter 113) wherein the magnitude of the second distinct signal is generally greater than the magnitude of the filtered signal at loud­ness of normal speech. The logic circuit 117 of Fig. 15 adaptively varies the filter coefficients He(0), He(1),... He(M) of filter 113 as a function of polarity of the second combined signal independently of its magnitude.

0084Fig. 16 shows an alternative circuit arrangement for logic circuit 117 of Figs. 4 and 15. Corresponding circuitry is numbered with corresponding numerals in Fig. 16. Add-subtract circuits in the group 185 are supplied with inputs that are produced by a set of multiplying cir­cuits 221.0, 221.1...212.n which have one input respective­ly for one or more of the magnitude bits from the corre­sponding registers in the group 181. The shift register group 181 derives its input either from the input Y of Fig. or the input Y or U of Fig. 15 as the skilled worker elects. An additional input to each of the multiplying circuits 221.0, 221.1,...221.n is derived from the most significant bit (MSB) of the combined input signal En. In this way, the add-subtract circuits in the group 185 increase or decrease their corresponding coefficients in the registers 187, namely, He(0), He(1),...and He(M). A greater accuracy of estimation is obtained by the circuit of Fig. 16 at the expense of increased complexity of pro­viding the multiplying circuits.

0085Fig. 17 illustrates another all-hardware VLSI processing apparatus 231 according to another preferred embodiment in which a VLSI die 241 has a processing area 243. Processing area 243 includes a circuit 245 for imple­menting system process Hs filter functions which is fed by the output of a microphone Hm through a combining circuit 247. The output of the combining circuit is also fed to a logic circuit for adaptively controlling an additional filter section He numbered 249. The output of this filter 249 is fed back to combining means 247. Similarly, an output S of filter 245 is supplied to first and second combining circuits 251 and 253. A pseudorandom noise sig­nal generator 255 also feeds combining circuits 251 and 253 respectively. The noise is weighted with weight W1 in com­bining circuit 251 and the Hs filter output S is weighted with a weight W2 at the input of combining circuit 253. An output Y of combining circuit 251 is supplied to block Hr and also is fed back to filter 249. The LOGIC control block for filter 249 is fed with signal U from combining circuit 253.

0086In this way, the processing area 243 and its cir­cuitry constitutes an example of a means for electronic processing of the electrical output of the microphone means to produce a filtered signal. The combining circuit 251 acts as an example of a means for combining a filtered signal with a second distinct signal for the receiver of a hearing aid in a proportion wherein the magnitude of the second distinct signal is generally less than the magnitude of the filtered signal at loudness of normal speech. The combining circuit 253 acts as an example of a means for combining the filtered signal with the same second distinct signal to produce a control signal for the means for elec­tronic processing wherein the magnitude of the second dis­tinct signal is generally greater than the magnitude of the filtered signal at loudness of normal speech.

0087Fig. 18 shows the relative proportion of normal speech 261 when weighted in accordance with the weight W2 in circuit 211 of Fig. 15 or circuit 253 of Fig. 17. The level of the speech 261 is less than about a half the level of pseudorandom noise 263 of Fig. 18.

0088Fig. 19 illustrates the relative proportion of normal speech 271 when pseudorandom noise 273 is combined with weight W1 in circuit 251 of Fig. 17 or circuit 111 of Fig. 15. When the normal speech is at a loud volume the weight W1 is adjusted so that the height of the pseudo­random noise is on the order of one tenth to one half of the amplitude of the speech. However, in Fig. 20 speech 277 at lower loudness levels is also used to control AGC circuit 215 to deemphasize or reduce the level of the noise pulses 275 so that they bear approximately the same propor­tion to the amplitude of the lower volume speech 277 as noise 273 bears to louder speech 271 of Fig. 19.

0089Fig. 21 illustrates a circuit in which a combin­ing circuit 281 is implemented as a subtracter instead of a summer at the input of a system process Hs filter 283. In Fig. 21 adaptive FIR filter 113 is driven by a logic cir­cuit 285 which is appropriately modified to take account of the change to a subtracter. The Hs filter 283 suitably has sections of delay added to it in order to even further reduce the likelihood of feedback squealing and instabili­ty. Logic circuit 285 acts as an example of a means for temporarily storing a series of values, which means is connected to said first means (e.g. 285) so that the series of values represent samples of polarity of the second dis­tinct signal (e.g. Se), and means for increasing and decreasing each coefficient in magnitude for all-hardware digital filter means by a function of the combined signal input, the increasing and decreasing of each coefficient respectively depending on whether a corresponding value in the series of values has the same or opposite polarity compared to a polarity signal representing the polarity of the combined signal input.

0090In Fig. 22 logic circuitry 285 of Fig. 21 is detailed. The logic circuitry 285 of Fig. 22 is analogous to the circuitry of Fig. 12 except that a set of add/­subtract units 285.0, 285.1,...285.M are substituted for the units in the group 185 of Fig. 12. As indicated by control input "bubbles," the add/subtract units in the group 285 of Fig. 22 have their control input low active for addition instead of subtraction, and high active for subtraction instead of addition. This means that an add/­subtract unit in Fig. 22 adds when the output of its con­trolling exclusive OR gate is low instead of when it is high as in Fig. 12. The result is that the coefficients of the adaptive filter 113 of Fig. 21 have the opposite sign from the coefficients which are generated by logic circuit 117 of Fig. 12 for the adaptive filter 113 of Fig. 4.

0091The output of the FIR filter 113 of Fig. 21 is thus made of the appropriate sign to operate the sub­tracting circuit 281 of Fig. 21 in a manner to effectively offset the feedback contribution. By way of comparison, in Fig. 4 the output of the FIR filter 113 is of the proper sign to cooperate with a summing circuit used as the com­bining circuit 107 of Fig. 4.

0092Circuitry 285 in Fig. 22 constitutes an example of a means for adapting only in response to polarities of signals supplied to and from first filter means (e.g., filter 283 of Fig. 21). Each of the exclusive-OR gates 183.0, 183.1, ... 183.n is supplied with a single line carrying a digital signal representative of the polarity of the combined input signal En. A series of D latches 291.0, 291.1,...291.M are connected as a shift register to hold digital signals respective of the polarity history of any appropriate signal with which signal En is to be compared. An appropriate signal is any of noise signal Se, or signal U of Fig. 17 or signal Y of Figs. 4, 17 or 21, for exam­ple. The signal utilized is supplied to the first D-latch or bit register 291.0 and then the successive polarities of this signal are shifted into the rest of the registers 291.1 to 291.n. A signal from the clock circuit 81 of Fig. 3 is connected to clock the registers in the group 187 and the D-latches in the group 291 in Fig. 22. In this way, the coefficients of the impulse response for adaptive fil­ter 113 are successively increased and decreased according to the principles discussed in connection with Figs. 6, 7, 9 and 10.

0093Fig. 23 shows an embodiment for reducing statis­tical fluctuations by keeping running totals in a first set of registers 301.0, 301.1, ... 301.M and updating the coef­ficients He(0), He(1), ... He(M) less frequently in a sec­ond set of registers 303.0, 303.1 ... 303.M. A set of add/subtract circuits 305.0, 305.1, ... 305.M increase and decrease each running total in the first set of registers 301.0, 301.1, 301.M by the value of combined signal input En, including sign and magnitude, depending on whether a corresponding value in the series of digital values such as polarity of Se, U or Y in the shift register 291.0, 291.1, ... 291.M have the same or opposite polarity compared to combined signal input En.

0094In the embodiment of Fig. 23 the exclusive-OR gates in the group 183 of Fig. 22 are omitted. Instead combined signal input En is itself supplied to every one of the add/subtract circuits in the group 305. In this way the add/subtract circuits are an example of means respon­sive to the temporarily stored series of digital values representing polarities of the pseudorandom noise signal for increasing or decreasing each running total in magni­tude by an amount directly related to the magnitude of the combined signal input.

0095The stages of the shift register 291 are supplied to low active Add inputs of the add/subtract circuits 305 respectively. A clock circuit 81 provides clock pulses for actuating all of the stages in the shift register 291 as well as all of the registers in the group 301. The output of every register in the group 301 is connected back to its corresponding add/subtract circuit 305.0, 305.1, ... 305.M respectively so that running total r(0), r(1), ... r(M) have the value of signal En added to or subtracted from them.

0096Running totals r(0), r(1), ... r(M) in the regis­ters in the group 301 as a first set of registers are respectively supplied to corresponding adding logic cir­cuits 307.0, 307.1, ... 307.M. Each of the second set of registers in the group 303 for holding coefficients has its output connected to the corresponding input of the add circuits in the group 307. A divide-by-L circuit 309 has an input connected to the clock circuit 81 to divide the clock pulses by a constant L such as 20. Circuit 309 ini­tiates updating of registers 303 by adding the running totals respectively to the coefficients, and then resets the running totals to zero in the registers in the group 301 at intervals.

0097In this way, the divide by L circuit 309 together with the add/subtract circuits in the group 307 constitute an example of a means for respectively adding the running totals in the first set of registers (e.g., group 301) to the coefficients in the second set of registers (e.g., the group 303) to update the coefficients for the digital fil­ter (e.g., filter 113) less frequently than the increasing and decreasing of the first set of registers occurs. Cir­cuit 309 is an example of a means for frequency dividing the clock pulses to supply a second set of clock pulses to the second set of registers to update them at a frequency divided rate from the means for adding. Clock circuit 81 is an example of a means for supplying clock pulses to initiate the incrementing and decrementing of the first set of registers.

0098This type of operation advantageously averages out statistical fluctuations in the running totals as they are developed. The operation thereby produces a more effective offsetting of the feedback contribution and decreases the frequency at which the coefficients are updated. The statistical fluctuations are believed to be reduced by a factor on the order of the reciprocal of the square root of L, which is a percentage reduction of over 75% when L=20.

0099In Fig. 24 a polarity-only version of the circui­try of Fig. 23 is illustrated. The circuitry is the same as Fig. 23 and numerals are provided identically to corre­sponding elements. Only the polarity component of the input signal En is connected to a series of exclusive-OR gates 311.0, 311.1, ... 311.M. The outputs of the exclusive-OR gates respectively feed low active Add inputs of add/subtract circuits in the group 305. The add/­subtract circuits are uncomplicated up/down counter imple­mentations with low active increment/decrement inputs used as the equivalent of add/subtract inputs. The running totals are incremented and decremented by 1 as indicated by boxes 313.0, 313.1, ... 313.M labelled "1". In this way, logic circuitry of Fig. 24 includes a first set of regis­ters 301.0-.M for holding running totals that are incre­mented and decremented as a function of polarity of the combined signal input and polarity of at least one signal from the first means (e.g. Se U or Y). The circuitry is relatively uncomplicated and economical, produces running totals and averages out statistical fluctuations as the running totals are developed with advantageous correspond­ing effect on the coefficients for the adaptive filter 113.

0100In Fig. 25 a graph of frequency response of a hearing aid circuit in dB (decibels) versus frequency in the range 0-5 kiloHertz is shown. Measured frequency response of the hearing aid circuit with the adaptive fil­ter disconnected and therefore unable to offset the feed­back contribution is shown as solid line with numerous sharp, jagged and prominent peaks 331.1, 331.2, 331.3, 331.4, 331.5, 331.6 and 331.7. Without offsetting, the uncorrected frequency spectrum thus exhibits peaks that are indicative of highly underdamped behavior corresponding to incipient instability and "ringing" in the hearing aid circuit. When the volume of the hearing aid is increased beyond a certain point it starts to squeal due to the feed­back.

0101Using inventive apparatus and methods to offset the feedback contribution, the measured frequency response of the hearing aid circuit is as shown in the dashed por­tions 333.1 through 333.7. It is clear that the peaks when the feedback is offset are reduced and far less prominent and establish a frequency spectrum that is much more even in its response. As a result, volume levels available from circuitry utilizing the inventive apparatus and methods are substantially increased compared to those of circuitry lacking the offsetting capabilities. Stable, equalized system behavior is obtained in acoustic conditions of use that would have caused oscillation without the adaptive equalization in effect. Accordingly, the resulting hearing aid output is substantially easier to listen to and under­stand by the hearing impaired user.

0102In the present work it has been discovered that the use of an all-hardware digital adaptive filter is very substantially preferable to microprocessor-based opera­tions. Table 1 shows the characteristics of circuitry which would be involved in the microprocessor estimation approach as compared with the much simpler, less expensive and much more preferable arrangement in the preferred embodiments using the all-hardware digital adaptive filter approach.

0103As shown by Table 1, the all-hardware arithmetic is relatively simple while the microprocessor arithmetic unit is relatively elaborate. The microprocessor estima­tion approach inherently involves program address circui­try, memory space for a stored program to do the estima­tion, and instruction register and decoding hardware, all of which are dispensed with in the all-hardware digital adaptive filter preferred embodiments. Furthermore, input-­output logic and control logic in microprocessor circuitry on a VLSI die would be much more elaborate than the rela­tively simple circuitry which is disclosed herein and is used with the all-hardware digital adaptive filter approach. <tables id="tabl0001" num="0001"><table frame="all"><title>Table 1</title><tgroup cols="3" colsep="1" rowsep="0"><colspec colnum="1" colname="col1" colwidth="52.50mm" /><colspec colnum="2" colname="col2" colwidth="52.50mm" /><colspec colnum="3" colname="col3" colwidth="52.50mm" /><thead valign="top"><row><entry namest="col1" nameend="col2" align="left"><u style="single">Microprocessor Estimation</u></entry><entry namest="col3" nameend="col3" align="center"><u style="single">All-Hardware Digital Adaptive Filter</u></entry></row></thead><tbody valign="top"><row><entry namest="col1" nameend="col1" align="left">Arithmetic Unit</entry><entry namest="col2" nameend="col2" align="left">Elaborate</entry><entry namest="col3" nameend="col3" align="left">Simpler</entry></row><row><entry namest="col1" nameend="col1" align="left">Program Address Circuitry</entry><entry namest="col2" nameend="col2" align="left">Present</entry><entry namest="col3" nameend="col3" align="left">None</entry></row><row><entry namest="col1" nameend="col1" align="left">Memory Space for program</entry><entry namest="col2" nameend="col2" align="left">Present</entry><entry namest="col3" nameend="col3" align="left">None</entry></row><row><entry namest="col1" nameend="col1" align="left">Instruction registers and decoding</entry><entry namest="col2" nameend="col2" align="left">Present</entry><entry namest="col3" nameend="col3" align="left">None</entry></row><row><entry namest="col1" nameend="col1" align="left">Input/Output logic</entry><entry namest="col2" nameend="col2" align="left">Elaborate</entry><entry namest="col3" nameend="col3" align="left">Simpler</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Control logic</entry><entry namest="col2" nameend="col2" align="left">Elaborate</entry><entry namest="col3" nameend="col3" align="left">Simpler</entry></row></tbody></tgroup></table></tables>

0104In this way and as shown in Figs. 4, 15, 17, 21, 26 and 27, for example, there is provided first means fab­ricated on a VLSI die for electronic processing of the electrical output of the microphone to produce a filtered signal and for combining the filtered signal with a second distinct signal for the receiver of the hearing aid. All-­hardware digital adaptive filter means is united with, and connected to, the first means on the VLSI die for proces­sing the filtered signal and second distinct signal to produce an adaptive output to the first means to substan­tially offset the feedback contribution in the electrical output of the microphone in the hearing aid.

0105The all-hardware digital adaptive filter includes an all-hardware digital filter united with, and connected to, the first means for processing on the VLSI die for processing the filtered signal and second distinct signal in accordance with a series of digital coefficients to produce the adaptive output. Also provided is circuitry for combining the adaptive output with the electrical out­put and feedback contribution from the microphone to pro­duce a combined signal input to the first means for proces­sing. Further, logic circuit means is united with, and connected to, the first means on the VLSI die for adaptive­ly varying the digital coefficients of the all-hardware digital filter as a function of the combined signal input so that the adaptive output substantially offsets the feed­back contribution in the electrical output of the micro­phone.

0106Fig. 26 illustrates a further alternative embodi­ment of a feedback offsetting circuit. This alternative involves an infinite impulse response (IIR) filter which can increase the range or effectiveness of the offsetting even further with only a modest amount of extra VLSI hard­ware.

0107As illustrated in Fig. 26, an FIR adaptive digi­tal filter 401 has its input connected to receive the out­put Y of combining circuit 111. Filter 401 is shown as a block which includes a logic circuit 285 of Fig. 21 com­bined with a filter 113 of Fig. 21. The logic circuit in filter 401 is responsive to combined signal input En and output Y. An additional filter block 403 has both its input and output connected to a combining circuit 405. Combining circuit 405 sums the output of filter 403 and the output of filter 401 to produce a sum output X that is fed both to the input of filter 403 and to an input of subtrac­tive combining circuit 281 for offsetting feedback present in the output of microphone block 101.

0108Filter 403 has the same internal construction as filter 401. In other words filter block 403 has a logic circuit identical to logic circuit 285 of Fig. 21 combined with a filter like 113 of Fig. 21. The logic circuit in filter 403 is responsive to combined signal input En, the same as the logic circuit in filter 401. However, the logic circuit in filter 403 is responsive to output signal X, instead of output signal Y that the logic circuit of filter 401 responds to.

0109Further, the output of filter 403 is fed back to its own input via combining circuit 405. Filter 401 has no feedback directly back to itself from combining circuit 405 in Fig. 26. Filters 401 and 403 with combining circuit 405 together are an example of an IIR filter; however, some­times filter 403 and circuit 405 alone are also called an IIR filter as context dictates, for purposes of the present work. Thus, the circuit of Fig. 26 represents an improve­ment over the circuit of Fig. 21, for instance, by adding an IIR filter in series with the FIR filter of Fig. 21.

0110The FIR adaptive filter is believed to be well suited to compensate for a component of the feedback path Hf 105 that is comprised of acoustic delay and attenua­tion. The IIR adaptive filter (403, 405) is believed to be well suited to compensate for resonances that exist in the feedback path. Resonances and very long feedback paths in hearing aids, public address systems and other electroa­coustic systems are even further obviated due to the inter­nal feedback and memory, in effect, that the IIR filter approach provides.

0111Together, filters 401 and 403 with combining circuit 405 are an example of a digital adaptive filter interconnected with a first circuit (e.g. blocks 281, 109, 111, 115) and responsive to signals supplied to and from the first circuit, for electronic infinite impulse response (IIR) processing of the filtered signal (e.g. output of Hs) and second distinct signal (e.g. Se) to produce an adaptive output X to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone in the hearing aid. The digital adaptive filter includes a first digital filter 401 and a second digital filter 403, 405. The first digital filter 401 has an input 407 for signal Y, which is one example of a filtered signal combined with a second distinct signal. Filter 401 has an output 409 connected to the second digital filter 403, 405 at combining circuit 405. The second digital filter 403, 405 produces an output X, part of which is fed back to itself at an input 411 of block 403. Output X of the sec­ond digital filter is supplied to the first circuit for electronic processing at subtracting combining circuit 281 to substantially offset the feedback contribution in the electrical output of the microphone means in the hearing aid.

0112Updating the filter coefficients in filter blocks 401 and 403 is similar to the processes discussed earlier hereinabove, except that two sets of coefficients are involved. Coefficients for filter 401 are designated w_k, and coefficients for filter 403 are a_k, where k is an index (similar to i hereinabove) for designating each par­ticular coefficient. Recursive expressions for updating the coefficients are: w_k(n+1) = w_k(n) + sgn[En.Y(n-k)]      (13) a_k(n+1) = a_k(n) + sgn[En.X(n-k)]      (14)

0113In the circuit of Fig. 26, filter block 403 has a transfer function A that is adaptively varied. The trans­fer function represented by the symbol "A" can be a remark­ably complicated function in the Laplace (or s or z) domain. Filter block 403 together with combining circuit 405 and feedback thus provided have a transfer function 1/(1-A). If the transfer function of FIR filter 401 be represented by W, then the transfer function He of the entire filter assembly 401, 403, 405 of Fig. 26 is W/(1-A).

0114In Fig. 27 a further improvement adds an error filtering feature. Filter 401 of Fig. 26 is shown as a filter 413 with logic circuit 417 of Fig. 27. Logic cir­cuit 417 is responsive to output Y and to a filtered error signal V to be described presently. A filter 423 and logic circuit 425 of Fig. 27 correspond to filter block 403 of Fig. 26. A combining circuit 427 sums the output of the filters 413 and 423 to provide output X. Output X is also fed back to filter 423.

0115Logic circuit 425 is shown apart from filter 423 because it advantageously doubles as the logic circuit for an additional error filter 431. Error filter 431 has its input connected to receive the combined signal input En, which is a form of error signal for purposes of feedback filter He. A combining circuit 433 shown as a subtractor is fed with combined signal input En and also with the output of error filter 431. The output V of the circuit having filter 431 and circuit 433 is a filtered error sig­nal of the form V = En (1-A)      (15)

0116Logic circuit 425 provides identical coefficients to filters 423 and 431. Logic circuit 425 is responsive to outputs V and X and is implemented with any of the circuits of Figs. 12, 16, 22, 23 and 24 and can use polarity-only or all polarity and magnitude information in combined signal input En. A set of recursive expressions for updating the coefficients of the three filters 413, 423 and 431 of Fig. 27 are w_k(n+1) = w_k(n) + sgn[V.Y(n-k)]       (16) a_k(n+1) = a_k(n) + sgn[V.X(n-k)]      (17) There is no need for three equations because the coeffi­cients a_k for both filter 423 and 431 are correspondingly identical.

0117Note that in each of Figs. 26 and 27, a dotted box has been drawn around the digital adaptive filter assemblies corresponding to the He box of some earlier block diagrams hereinabove.

0118The additional error filtering with filter 431 and subtracting circuit 433 of Fig. 27 is believed to pro­vide an even further advantageous feature in smoothing and making even more effective the operation of the adaptive filtering circuitry. A tentative heuristic explanation for the improvement is believed to be that elements 423 and 427 could form a less than fully stable loop (423, 427, 281, 425, 417, 413) due to the 1/(1-A) transfer function having a denominator (1-A) approaching zero at some frequency. By adding elements 431 and 433 having a transfer function (1-A) (which is the reciprocal of 1/(1-A)), a multiplica­tion in effect in the Laplace or frequency domain of (1-A) x 1/(1-A) occurs so that such denominator effects are can­celled. It is emphasized that this explanation is in no way intended to be limitive or exclusive of other advanta­geous effects and operations which are also present in this embodiment.

0119The filter 431 and combining circuit 433 thus provide an example of a third digital filter for filtering a signal (e.g. combined signal input En) that is also sup­plied to first means for electronic processing. Filter 423 is an example of a digital filter section that has a trans­fer function and produces an electrical signal which is fed back to itself. Filter 431 with combining circuit 433 provide an example of a means for electronically filtering the combined signal input according to a transfer function which is substantially the reciprocal of the transfer func­tion of the digital filter section, to drive logic circui­try. Logic circuits 425 and 417 together act as a type of logic circuitry fed by the third digital filter for con­trolling first and second digital filters and thus control­ling infinite impulse response (IIR) processing.

0120Numerous alternative connections to the logic circuits 417 and 425 and use of multiple combining circuits are also available according to the description hereinabove of Figs. 15, 17 and 21.

0121A process diagram of Fig. 28 shows illustrative operations of a hearing aid according to some of the inven­tive methods. Operations commence with a START 501 and proceed to a step 503 to process the electrical output of the microphone 13 into a combined signal input En and to produce a filtered signal according hearing aid amplifica­tion and filtering Hs.

0122In a next step 505, a probe signal such as a pseudorandom noise signal is generated as an example of a second distinct signal that is distinct from the filtered signal just referred to. In a following step 507, the filtered signal is combined with the second distinct signal for the receiver of the hearing aid. The second distinct signal is suitably weighted by a factor W1 so that the magnitude of the second distinct signal thus weighted is generally less than the magnitude of the filtered signal at loudness of normal speech.

0123If the magnitude of the filtered signal has changed, then a step 509 varies the magnitude of the second distinct signal (e.g. noise) as a function of the magnitude of the filtered signal. For instance, in one embodiment it is desirable to vary the magnitude of noise in direct cor­respondence with the magnitude of the filtered signal so that the magnitudes have an approximately constant ratio.

0124Succeeding step 511 combines the filtered signal with the noise by weighting the filtered signal by a factor W2 so that the magnitude of the noise is generally greater than the magnitude of the filtered signal at loudness of normal speech.

0125Next a step 513 derives a series of digital val­ues having polarities responsive to the probe signal, as by shifting pseudorandom noise through a shift register. Then in a step 515 running totals are electronically maintained in a set of registers. Each running total is increased and decreased depending on whether a corresponding value in the series of digital values has the same or opposite polarity compared to the combined signal input.

0126A test step 517 tests an index N to determine whether it has reached a predetermined value such as 20. If so, the running totals of step 515 are added to update a set of digital filter coefficients, and index N is reset to 1. If index N has not reached 20, operations branch from step 517 to step 521 to increment index N by one, and step 519 is bypassed. In this way, the running totals in the set of registers are respectively added electronically to the coefficients in step 519 less frequently than the increasing and decreasing of step 515 occur.

0127After either step 519 or 521, operations proceed to a step 523 to adaptively filter the filtered signal and second distinct signal (or probe signal) combined in step 511, for instance. The filtering is accomplished in accor­dance with digital coefficients varied only in response to polarities, for example, to produce an adaptive output in the hearing aid. An IIR version of the process in this step 523 adaptively filters the filtered signal and second distinct signal to produce an electrical signal and feeds back the electrical signal as shown by arrow 525 so that the electrical signal is adaptively filtered in the same step 523 also, thereby producing the adaptive output.

0128In a further step 527, the adaptive output is combined with the microphone output, substantially offset­ting with the adaptive output the acoustic feedback contri­bution in the electrical output of the microphone for the processing step 503. Operations loop back to step 503 through a test 529 if the process is to continue. If not, operations branch from test 529 to an END 531.

0129The invention comprehends numerous embodiments using digital or analog technology and incorporating soft­ware, hardware, or firmware as applications dictate. Applications, combinations and processes for hearing aids, public address systems and other electroacoustic systems generally for use in air, underwater, or in other environ­ments are within the scope of the invention.

0130In view of the above, it will be seen that the several objects of the invention are achieved and other advantageous results attained.

0131As various changes could be made in the above constructions without departing from the scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.