Secondary processor initialization scheme

In a microprocessor based computer system having a primary unit (10) such as a system board and a secondary unit (20) such as an adapter card, the secondary processor (21), which is held in a non-running reset state, con­tained on the secondary unit can be initialized without requiring a read only storage (ROS) module or a read only memory (ROM) module to be a part of the secondary unit. Specifically, a window is defined from a segment of uninstalled memory address space from the primary unit and a segment of installed memory address space from the secondary unit. The primary processor (11) on the primary unit retrieves the secondary processor's initialization program from the primary unit's non-volatile storage (17). This initialization program (also known as an IPL program or a boot program) is then placed in the window. The primary processor then disables the reset line of the secondary processor. Upon having its reset line disabled, the secondary processor begins executing the initializa­tion program. After the initialization program has com­pleted, the primary unit can send other preparatory pro­grams, such as diagnostic programs to the secondary unit through the window. When all of the preparatory programs have been completed, the contents of the window are over­written so the primary unit's memory and the secondary unit's memory can be fully utilized for other interprocessor communications. An alternate embodiment is also disclosed where a shared memory address space is used.