EP0322040A3
Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
Abstract
The device uses the horizontal insulating region and the buried layer as the power transistor base and emitter respectively. An epitaxial growth is interposed between the two diffusions needed to form the aforesaid regions and those needed to create the base and the emitter of the transistor of the integrated control circuit.
Term
Term ended
Projected expiry passed 16 December 2008, 17.8 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
1 sheet
Sheet 1
Every citation, both ways
| Document | Relation | Office | Category | Cited during |
|---|---|---|---|---|
| EP0090686A1 | Cites | European Patent Office (EPO) | A | Search report |
| EP0117867A1 | Cites | European Patent Office (EPO) | A | Search report |
| EP0144865A2 | Cites | European Patent Office (EPO) | A | Search report |
| EP0262723A2 | Cites | European Patent Office (EPO) | A | Search report |
| US4233618A | Cites | United States of America | A | Search report |
| US4239558A | Cites | United States of America | AD | Search report |
10 members in 5 offices
Priority claims5
| Document | Office | Kind | Date |
|---|---|---|---|
| 663087 | Italy | A | |
| 663087 | Italy | A | |
| 663087 | Italy | – | |
| 663087 | – | – | – |
| IT19870006630 | – | – | – |
Members10
| Document | Office | Kind | |
|---|---|---|---|
| EP0322040A2 | European Patent Office (EPO) | A2 | |
| JPH022664A | Japan | A | |
| EP0322040A3This record | European Patent Office (EPO) | A3 | |
| IT1217322B | Italy | B | |
| US4965215A | United States of America | A | |
| EP0322040B1 | European Patent Office (EPO) | B1 | |
| DE3880996D1 | Germany | D1 | |
| DE3880996T2 | Germany | T2 | |
| JP2677644B2 | Japan | B2 | |
| USRE38510E | United States of America | E |
24 legal events, as 3 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE | PLBE | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA | STAA | EP | |
| Notification of lapseLapsedST | ST | FR | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Gb: european patent ceased through non-payment of renewal feeCeasedGBPC | GBPC | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| European patent in force as of 2002-01-01IF02 | IF02 | GB | |
| Patent endorsed licences of rightsD6 | D6 | FR | |
| Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents actLapsedNLV1 | NLV1 | EP | |
| Fr: translation filedET | ET | EP | |
| Corresponds to:REF | REF | EP | |
| Designated contracting statesAK | AK | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
| First examination report despatched17Q | 17Q | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | EP | |
| Designated contracting statesAK | AK | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 0322040
- Publication, DOCDB
- 0322040
- Publication, EPODOC
- EP0322040
- Application
- 88202898
- Application, DOCDB
- 88202898
- Application, EPODOC
- EP19880202898
Titles3
- German
- Herstellungsverfahren für eine monolithische Halbleiteranordnung mit wenigstens einem Transistor einer integrierten Kontrollschaltung und einem auf dem gleichen Chip integrierten Leistungstransistor
- English
- Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
- French
- Procédé de fabrication d'un dispositif semi-conducteur monolithique comportant au moins un transistor d'un circuit intégré de contrôle et un transistor de puissance intégré sur le même chip
Classification
- CPC, 4
- H10D84/0112
- H10D84/038
- H10W10/031
- H10W10/30
- IPC, 7
- H01L21 331
- H01L21 761
- H01L21 8222
- H01L29 73
- H01L27 06
- H01L27 082
- H01L29 732
Designated states1
- Contracting states, 1
- Netherlands (Kingdom of the)