Data processing system using incompatible central processing unit/operating system combinations.

BACKGROUND OF THE INVENTION

1. Field of the Invention

0001This invention relates generally to data processing systems and, more particularly, to data processing systems having a plurality of central processing units.

2. Description of the Related Art

0002In order to increase the processing capability of data processing systems, one technique has been to couple additional central processing units to the system. The ability to select the number of central processing units in a data processing system permits an efficient matching of the capabilities of the system to the data processing requirements. Data processing units having a plurality of central processing units typically have one of two configurations. Referring now to Fig. 1A, a data processing system having a plurality of central processing units, according to a first implementation found in the prior art, is shown. The data processing system includes a plurality of central processing units 11-12 coupled to a system bus 19. The central processing units 11-12 perform the actual manipulation of data groups under control of operating and user software programs. The main memory unit 16, also coupled to the system bus 19, stores the data and program signal groups which are currently being used by the central processing units. The input/output units 14-15, coupled to the system bus 19, include devices for storage of large quantities of data and program signal groups, e.g., disk storage devices, terminals for the entry of data by system users, and communication devices for exchange of data and program groups with remote locations. The system bus 19 provides the principal path for the exchange of data and program groups between the components of the data processing system.

0003Referring next to Fig. 1B, a second implementation of a multiprocessor system, according to the related art, is shown. Generally, the same components are available to perform the processing functions as in Fig. 1A except that the components are coupled by a memory control unit 14 instead of by the system bus 19. The memory control unit 14 is typically an electronic switch providing the coupling of the data processing unit component in response to control signals. The memory control unit 14 can also provide functionality, such as conflict resolution, that would typically be distributed in the bus oriented system data processing system.

0004The data processing systems of Fig. 1A and Fig. 1B are typically implemented in the related art such that the central processing units are homogeneous. In a homogeneous data processing system, the operating systems are the same or similar, the implementing apparatus is the same or similar and the operations performed on apparatus external to the data processing system is the same or similar. Even though the central processing units are homogeneous, substantial efforts are employed to prevent conflicts between the central processing units. For example, one of the central processing systems can be selected to allocate resources and tasks among the plurality of central processing units, thereby preventing conflicts between simultaneously executing programs of the data processing system. The resources of the system are the storage devices, terminals, main memory locations and other data processing facilities to which a central processing unit has access for the purpose of performing the data processing functions. This relationship is generally referred to as the master/slave relationship because of the control asserted by the selected processor. However, some data processing systems can be designed wherein the central processing units, operating under control of the same operating system, can operate under as equal members (as contrasted with the master/slave relationship) of the data processing system. The following references provide examples of the way in which a plurality of central processing units can be incorporated in a data processing system without requiring a master/slave relationship and yet still avoiding conflicts for system resources.

0005In U.S. Patent 3,631,405, issued December 28, 1971, entitled SHARING OF MICROPROGRAMS BETWEEN PROCESSORS and invented by G. S. Hoff and R. P. Kelly, two microprogrammed processing units share control elements that permit sharing of microprogram repertoires. By appropriate invocation of the operating system, the control signals from a first microprogrammed processing unit are transferred to the second microprogrammed processing unit. In fact, this configuration can best be described as a single processing unit with resources allocated by a supervisor controlled operating system. The use of a supervisor program as well as the coupling between the two processing units distinguishes this configuration from the peer processing unit relationship described in the present invention.

0006In U.S. Patent 4,131,941, issued December 26, 1978, entitled LINKED MICROPROGRAMMED PLURAL PROCESSOR UNIT and invented by H. L. Siegel, G. F. Muething, Jr., and E. J. Radkowski, a configuration of a plurality of processors is described that permits the processors to act independently or to be reconfigured so that a master/slave relationship can be invoked. The plurality of processors are linked together and, even when operating in a mode described as being independent, are not independent but subject to a supervisory control structure for configuration determination and for allocation of activity. Of course, the control of the allocation of activities implies the control of the allocation of resources. In addition, the data processing system described by this U.S. Patent, either has one operating system or a plurality of identical operating systems. The invention of the U.S. Patent appears to be best described as a single data processing system with a controllable configuration. The present invention is directed to data processing units that operate independently with different operating systems.

0007In U.S. Patent 4,200,930, issued on April 29, 1980, entitled ADAPTER CLUSTER MODULE FOR DATA COMMUNICATIONS SUBSYSTEM invented by R. L. Rawlings and R. D. Mathews, a host processing unit can have a plurality data communications subsystems coupled thereto for performing routine communications functions with incoming and outgoing signals. Although the data communications subsystems are capable, in case of a failure of the host processing unit, of continuing communications, the role of the host processing unit to the data communications subsystems is clearly that of a master/slave relationship. The peer processor relationship is not applicable because the data communications subsystems do not have access to all the resources available to the host processing unit.

0008In U.S. Patent Application Serial No.      , filed      , entitled MICROCOMPUTER SYSTEM WITH INDEPENDENT OPERATING SYSTEMS, invented by T. S. Hirsch, J. W. Stonier and T. 0. Holtey, two processors, an LSI-6 processor with a MOD400 operating system and an Intel 8086 processor with either and MS-DOS or a CPM-86 operating share the processing responsibilities (a Motorola 6809 microprocessor is also included, but generally functions as an input/output controller). The LSI-6 processor has memory space that is not accessible to the Intel 8086 processor. In addition, the input/output operations performed by the 6809 microprocessor can be initiated only by the LSI-6 processor, so that the Intel 8086 has access to this resource only through the intervention of the LSI-6 processor, a form of a master/slave relationship.

0009In U.S. Patent Application Serial No.      , entitled MULTIPROCESSOR SYSTEM ARCHITECTURE, invented by      , the communication of two processors is described. In this application, the sharing of memory without interference is accomplished by controlling buses associated with each processor system. The buses are coupled to particular areas of memory and for one processor to access the memory dedicated to the second processor, the bus of the first processor is coupled to the bus of the second processor. Apparatus associated with each bus controls the ability of the other processor to access the bus, thereby effectively limiting access of each central processing unit to the system resources.

0010More recently, interest has been demonstrated in data processing systems incorporating a plurality of central processing units having non-homogeneous (generally incompatible) characteristics. The availability of non-homogeneous central processing units can be particularly advantageous to a system user providing a plurality of program repertoires that may normally be unavailable to the system user. Ideally, all of the central processing units should have a peer relationship, i.e., should be capable of accessing all data processing system resources without the benefit of auxiliary protection mechanisms described in relation to the related art and without having a master/slave relationship in which one central processing unit controls all the activity and allocation of resources. Many central processing systems do not have the necessary hardware and/or software functionality to enforce allocation of resources. Non-the-less, the peer relationship between central processing units is a desirable multiprocessor relationship, allowing easy expandability of the processing system.

0011A need has therefore been felt for technique that permits data processing system users to utilize the capabilities of non-homogeneous (incompatible) of central processing unit/operating system combinations. In this way, data processing system users have available a greatly expanded repertoire of programs from different operating system without extensive reprogramming efforts and without elaborate emulation techniques.

SUMMARY OF THE INVENTION

0012It is an object of the present invention to provide an improved data processing system that overcomes the problems of the prior art.

0013It is a feature of the present invention to provide an improved data processing system having a plurality of central processing units.

0014It is another feature of the present invention to provide an improved data processing system having a plurality of central processing units utilizing different operating systems.

0015It is a further feature of the present invention to provide an improved data processing system in which a plurality of central processing units execute instructions under different operating systems.

0016lt is more particular feature of the present invention to provide a technique permitting a user to utilize conveniently two operating systems.

0017It is yet another feature of the present invention to permit a data processing system user to have available the execution capabilities of two normally incompatible central processing unit/operating system combinations.

0018The aforementioned and other features are accomplished, according to the present invention, by ensuring that a plurality of operating system/central processing combinations, to be coupled in data processing unit, have appropriate mechanisms to prevent intentional or unintentional use of resources that have not been assigned to the operating system/central processing unit combination. The central processing unit/operating system combinations are coupled to the data processing system to provide a peer relationship therebetween. A command is provided that permits a user, interacting with a first central processing unit/operating system, to transfer the interaction to a second central processing unit/operating system.

0019These and other features of the invention will be understood upon reading of the following description along with the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

0020<ul id="ul0001" list-style="none"><li>Figure 1A is a block diagram of a bus oriented data processing system having a plurality of central processing units according to the related art, while Fig. 1B is a block diagram of a memory controller oriented data processing system having a plurality of central processing units according to the prior art.</li><li>Figure 2A illustrates the apparatus for implementing a peer processor relationship in a multiprocessor data processing system, while Fig. 2B illustrates the partitioning of main memory storage in a peer processor relationship.</li><li>Figure 3 illustrates additional components that can be required for a multiprocessor data processing system having a peer relationship.</li><li>Figure 4 illustrates a typical screen available to a user to determine the user interaction mode.</li><li>Figure 5A and 5B illustrate a first transfer mode and a second transfer mode, respectively, for permitting a user interacting with a first central processing unit under control of a first operating system to access a second central processing unit under control of a second operating system.</li></ul>

DESCRIPTION OF THE PREFERRED EMBODIMENT

1. Detailed Description of the Figures

0021Referring to Fig. 2A, the principal components that permit the central processing units of a data processing system of multiprocessor data processing system to assume a peer relationship are illustrated. Each central processing unit has associated therewith apparatus, software procedures or a combination of apparatus and software programs that prevent the generation of addresses or attempts to access input/output devices are nominally unavailable to the central processing unit. This apparatus is illustrated as address generation apparatus 111 as part of central processing unit 11 and address generation security apparatus 121 as part of central processing unit 12. The main memory unit is divided into a plurality of regions. Region 151 is a region reserved for the operating system controlling the operation of central processing unit 11, while region 152 is a portion of the main memory unit reserved for the operating system controlling operation of the central processing unit 12. The portion of the main memory unit denoted by region 153 is reserved for the data/code for the central processing unit 11, while the region 154 is reserved for the data/code of central processing unit 12. Region 155 is a common region and accessible to both central processing unit 11 and central processing unit 12.

0022Referring to Fig. 2A, more detail in the allocation of the storage of the main memory unit is shown symbolically. The regions 151 and 152 reserved for operating systems of the associated central processing unit each have two subregions (151A and 151B, and 152A and 152B, respectively) important for operation of a peer relationship. The subregions 151A and 152A provide a list of the resources, i.e., input/output devices and reserved main memory regions, reserved for the associated central processing unit. Subregions 151B and 152B provide the procedure by which the two central processing systems can communicate. In the preferred embodiment, this communication is performed through subregion 155A of the portion of main memory reserved for usage by both the central processing units using a technique typically referred to as a data processing system mail box. In this technique, a message is left in the mail box 155A by a first central processing unit and a second central processing unit either reads the contents of the mail box periodically or is alerted by the first central processing unit that a message is available. Upon reading of the contents of the mail box 155A, the second central processing unit can make an appropriate response.

0023Referring next to Fig. 3, a portion of a data processing system with two central processing units 11 and 12 is shown. Central processing unit 11 is directly coupled to the system bus 19. Central processing unit 12 is coupled to the system bus 19 by system bus interface unit 31. The system bus interface unit and the central processing unit 12 are coupled to dedicated memory unit 32.

0024Referring next to Fig. 4, a possible menu available to a user during a log-on procedure is illustrated. The user is provided with three choices during the log-on procedure. The user can access either central processing unit (and associated operating system) exclusively or can access both central processing units. In the preferred embodiment, the access rights of the user are compared with the request resulting from the menu.

0025Referring next to Fig. 5A, a diagram of one mode for transferring from a first central processing system to a second central processing system is shown. In this transfer mode, a switch (restricted) command is entered by the user interacting with operating system 1. This (restricted) switch command permits a user with appropriate access rights to execute a single procedure by operating system 2. The result of the (restricted) switch procedure is the transfer of the procedure to the operating system 2 where the single instruction is executed. After the execution of the single instruction, an automatic log-on procedure from operating system 2 is instituted and the control of the program execution is returned to operating system 1.

0026Referring to Fig. 5B, a second (general) switch command is illustrated. With this command, the control of the procedure is transferred to operating system 2, however, the return to the first operating system occurs only in response to a positive activity. In one instance, a log-off command while under operating system 2 returns the control of the procedure to operating system 1 until another switch command is executed.

2. Operation of the Preferred Embodiment

0027In a ideal multiprocessor configuration, all of the central processing units would have access to all the resources of the data processing system, i.e., have a peer relationship. However, many central processing unit/operating system combinations are incompatible which, in the past, has limited the data processing systems in which the central processing unit/operating system combinations have a peer relationship to data processing systems with substantially the same central processing unit/operating system combinations. The data processing systems in which the central processing unit/operating system have a peer relationship is further limited because many central processing unit/operating system combinations do not have trustworthy access enforcement mechanisms which can result in addressing reserved resources. In the U.S. Patent Application, "APPARATUS AND METHOD FOR A DATA PROCESSING SYSTEM HAVING A PEER RELATIONSHIP AMONG A PLURALITY OF CENTRAL PROCESSING UNITS", cited above, the apparatus and method for a data processing system having non-homogeneous (i.e., incompatible) central processing unit/operating system combinations coupled thereto is disclosed for central processing unit/operating system combinations in which system resource access enforcement mechanisms are present. In the U.S. Patent Application "APPARATUS AND METHOD FOR ALTERABLE RESOURCE PARTITIONING ENFORCEMENT IN A DATA PROCESSING SYSTEM HAVING CENTRAL PROCESSING UNITS USING DIFFERENT OPERATING SYSTEMS", cited above, a data processing system is disclosed for a data processing system having non-homogeneous (i.e., incompatible) central processing unit/operating system combinations coupled thereto is disclosed for central processing unit/operating system combinations in which system resource access mechanisms are not present.

0028In the preferred embodiment, the host central processing unit 11 is a Honeywell Bull MRX data processing system operating under control of the MOD 400 operating system. The MOD 400 operating system includes procedures that provide for the trustworthiness of the system. In order to provide the data processing system with the capability of executing the wide repertoire of user programs using the UNIX operating system, the central processing unit 12 was selected. The UNIX operating system available for executing the user programs was believed to lack, at present, the appropriate mechanisms for secure partitioning of resources in the multiprocessor environment.

0029Although the peer processing relationship provides an equality between the central processing units of the data processing system with respect to resources and activity, two situations must be provided for in order to accommodate special circumstances. The first of the special circumstances relates to the protocol used by the system to exchange data signals. Related to the system bus protocol is the organization of main memory unit. Typically, a "host" central processing unit 11 will be adapted to operate with a system bus and will not require additional manipulation of data groups when transferring the data groups to the system bus. However, the "guest" central processing unit, in general adapted to operate with different system bus protocol, will require a system bus interface unit 31 to permit the transfer of the signal groups between the central processing unit 12 and the system bus. The system bus interface unit 31, to the extent not possible by the central processing unit 12, can develop appropriate control signals and, where necessary, adjust the size of the data groups to be consistent with the remainder of the data processing system. The second situation involved the fact that special procedures, such as special input/output procedures can be executable only by a selected operating system or central processing unit/operating system combinations. To obtain the peer relationship in this situation, a procedure is developed in which the selected operating system or central processing unit/operating system combination executes the special procedure on behalf of the central processing unit/operating system combination requiring execution of the special procedure. These two situations as well as other situations impeding the use of incompatible central processing unit/operating system combinations in a peer relationship in a data processing system are discussed in detail in the above-identified U.S. Patent Application.

0030The switch command provides the mechanism for permitting a user of the data processing system to transfer of interaction with a first operating system to interaction with a second operating system. As a result of the switch command, the user terminal is coupled to the central processing unit with the second operating system. Any files that are required by the second processing system, but which are not available, can be made available by reallocation of resources, can be transferred to an allocated area by a communication (e.g., kermit) type protocol. All communication is performed between the two operating systems by a shared group of locations in main memory.

0031The switch command and related procedure permits convenient use of the central processing unit/operating system combinations and resources in data processing system in which the peer relationship exists. The implementing procedures are invisible to the data processing system user who has access to the computing capability and the resources of the entire data processing system. The ability to incorporate normally incompatible central processing unit/operating system combinations into the data processing system and to utilize special execution characteristics of the combinations permits a user greater flexibility in the execution of his processing requirements.

0032The foregoing description is included to illustrate the operation of the preferred embodiment and is not meant to limit the scope of the invention. The scope of the invention is to be limited only by tho following claims. From the foregoing description, many variations will be apparent to those skilled in the art that would yet be encompassed by the spirit and scope of the invention.