Integrated thermal ink jet printhead and method of manufacturing.

Technical Field

0001This invention relates generally to thermal ink jet (TIJ) printing and more particularly to a new and improved integrated thermal ink jet printhead and novel method of manufacturing same.

Background Art

0002In the field of thermal ink jet printing, many present manufacturing processes use a chosen thin film processing technique to make the thin film resistor (TFR) substrate portion of the printhead and a separate orifice plate manufacturing technique to make the metal orifice plate having a desired number and geometry of ink ejection orifices therein. Then, using critical alignment techniques, the orifice plate is precisely aligned with the thin film resistor substrate in such a manner that the heater resistors of the TFR substrate are precisely aligned with the orifices in the orifice plate. Thus, the heater resistors are positioned to heat the ink in associated ink reservoirs which are usually aligned with both the heater resistors and the orifices in the orifice plate. In this fashion, the ink is heated to boiling and forced out of the orifices during a thermal ink jet printing operation. One such fabrication process of the type described above is disclosed in the <u style="single">Hewlett-Packard Journal</u>, Vol. 38, Number 5, May 1985, incorporated herein by reference.

0003While the above Hewlett-Packard process has proven highly successful in most respects, it nevertheless does require the critical alignment between the orifice plate and the thin film resistor substrate, and it further requires separate processing to form the orifice plate and to form the thin film resistor substrate which are subsequently aligned.

Disclosure of Invention

0004It is an object of the present invention to provide a new and improved thermal ink jet printhead and process for manufacturing same wherein the above orifice plate processing and thin film resistor substrate processing have been combined into a single novel process sequence. This invention provides a relatively inexpensive and reliable manufacturing process for the large scale production of thermal ink jet printheads, and additionally overcomes the above critical alignment problem of the prior art.

0005Another object of this invention is to provide a new and improved integrated thermal ink jet printhead and associated manufacturing process wherein the ink jet printhead thus produced has a longer lifetime relative to currently available printheads.

0006A feature of this invention is the provision of an improved self-aligning process for building up the orifice plate and heater resistors in sequence on a dummy substrate. This process has been greatly simplified relative to currently available printhead orifice plate alignment processes.

0007Another feature of this invention is the provision of an alignment process which has a very precise alignment of three (3) critical parts of the ink jet printhead, and thus results in an improved performance of such printhead.

0008The above objects, features and advantages of this invention are accomplished herein by initially forming an orifice plate -e.g. using chosen electroforming techniques. Next, a thin film structure is formed on the orifice plate, including heater resistors, selectively spaced in a predefined configuration. According to a preferred embodiment, the orifice plate is formed on a reusable substrate, followed by a first insulating, barrier layer and then the resistors. A second insulating barrier layer is then deposited on the first barrier layer and extends over the heater resistors to protect these resistors from ink corrosion and cavitation wear. Then, an ink reservoir-defining layer is formed on the second barrier layer and has a plurality of ink reservoir openings therein which are aligned with openings in the orifice plate. Finally, the dummy substrate is mechanically separated from the orifice plate to unplug the openings in the orifice plate, and the ink reservoir-defining layer can now be secured to an ink supply chamber or pen body housing or the like. The process of the present invention is defined in claims 1 and 4.

0009The present invention is also directed to a printhead structure and an ink jet pen made by the above manufacturing process. These are defined in claims 9 and 12.

0010The above summary of invention and various objects, features and advantages thereof will become more readily apparent and understood from the following description of the accompanying drawings.

Brief Description of the Drawings

0011Figures 1-10 herein illustrate, in a sequence of schematic cross-section views, the preferred process and structural embodiments of this invention.

Description of the Preferred Embodiment

0012Referring now to Figure 1, the substrate starting material 10 may be either silicon or glass and will typically be 200-300 microns in thickness. A photoresist pattern 12 is formed in the geometry shown on the upper surface 14 of the substrate 10, and the photoresist mask 12 serves to define openings 16 in a subsequently deposited nickel pattern 18 which is electroformed on the exposed upper surface 14 in the geometry shown in Figure 2. This process of electroforming nickel on either silicon or glass is generally well known in the art of manufacturing orifice plates for thermal ink jet printheads and is disclosed, for example, in both the <u style="single">Hewlett-Packard Journal</u> cited above and in U. S. Patent No. 4,694,308 issued to Chor S. Chan et al entitled "Barrier layer and Orifice Plate for Thermal Ink Jet Print Head Assembly", incorporated herein by reference.

0013Referring now to Figure 3, a first barrier layer 20 of an insulating film such as silicon nitride or silicon oxynitride or silicon dioxide is deposited on top of the nickel layer 18. Then a thin film resistor/conductor material 22 and 28 respectively which will perform both resistor and conductor functions of a heater resistor and a conductor when properly treated is deposited by sputtering on the upper surface of the insulating layer 20. The resistor portion is indicated as 22 and the conductor portion is indicated as 24, 26 and 28 in Figures 4A and 4B. This thin film resistor/conductor layer is patterned using conventional photoresist masking and etching processes. The thin pattern of resistive heater material 22 is formed in the circular geometry of Figures 4A and 4B and is integrally formed with lead-in conductors 24, 26 and 28 in the geometry shown in Figure 4B.

0014The circular strip 22 will be the heater resistor by virtue of the fact that it has more number of squares in a given area. That is, the resistance R of both heater resistor 22 and conductor material 24 is equal to Rs L/A, where Rs = sheet resistivity of material, L = length of material, and A = cross section area of material. That is: <maths id="math0001" num=""><math display="inline"><mrow><mtext>R = Rs L/A</mtext></mrow></math><img file="EP0321075B1_D0001.tif" /></maths> . Therefore, by the appropriate selection of the width and length of openings in the mask used to define the resistor portion (22) and conductor portion (24,26,28) of the integral resistor/conductor strip atop the insulating layer 20 in Figure 4A, the resistance of these segments of the resistor/conductor strip can be controlled as is known in the art.

0015Referring now to Figures 5A and 5B, a second barrier layer 30 is formed atop the resistor and conductor strips of Figure 4B, and this second barrier layer 30 is preferably a combination of silicon nitride and silicon carbide. The silicon nitride is initially deposited on the surface of Figure 4A and is followed by a subsequent deposition of silicon carbide so as to provide a highly inert composite Si₃N₄/SiC second barrier layer 30. This barrier layer 30 protects the underlying material against ink corrosion and cavitation wear during an ink jet printing operation. The second barrier layer 30 is then selectively etched in the contact areas 32 and 34 of Figure 5B in order to enable electrical connections to be made to the underlying conductive trace material 24 and 26 for driving the heater resistors 22.

0016Referring now to Figure 6, a suitable seed strip or pad 36 such as titanium, chromium, or nickel is formed on the barrier layer 30 and photo defined by masking and etching in a well known manner. This seed material 36 is used to initiate the formation, by way of electrolytic deposition and/or electroplating, a larger overlying nickel pattern 38 which is grown in the annular dome shaped geometry shown in Figure 7. The nickel 38 is formed in the shape of partially open annular regions which define a plurality of ink reservoirs or ink chamber areas 40 and 42. These ink chambers 40 and 42 are indicated in Figure 7 and are aligned with the previously formed openings 16 in the nickel orifice plate 18.

0017The orifice plate 18 along with its adjacent layers of insulating and conducting films can now be separated from the substrate 10 by peeling it off from the same. The substrate 10 basically performs the function of a temporary support substrate for the orifice plate 18 during the process of fabrication and definition of the various thin film layers. This substrate 10 can be used over and over again in the above described process. In the above process of peeling off the orifice plate 18 from the substrate 10, the areas 43 and 45 of the multiple insulating layers on top of the photoresist pads are pulled away from the orifice plate in Figure 7 along with the photoresist pads 12, thereby leaving openings 44 and 46 in the orifice plate structure shown in Figure 8. The openings 44 and 46 thus formed will therefore be initially left here with the ragged edges shown in Figure 8, but these edges 44 and 46 may be subsequently cleaned off and smoothed out by a mechanical operation such as the use of a light sandblasting with fine grit or plasma erosion.

0018Figure 9B is a plan view of a preferred embodiment of the invention and shown rotated ninety (90) degrees with respect to the plan views of Figs. 4B and 5B, and Fig. 9A is a cross section view taken along lines A-A of Fig. 9B. The annular shaped domes 38 which serve to define the ink reservoirs or chambers 40 associated with each orifice opening are provided with the ink flow ports. These ports will typically communicate with a common ink feed path from a remote common ink supply opening (not shown) in a central region of the substrate 18. This common ink supply opening may take the form of an elongated slot which may be defined by known masking and sandblasting procedures. Such ink feed slots and methods for forming same are described respectively, for example, in U.S. Patent No. 4,680,859 of Samuel A. Johnson entitled "Thermal Ink Jet Printhead and Method of Manufacture" and in U.S. Patent Application Serial No. 052,630 of James Pollacek et al entitled "Precision Milling of Materials", both of which are assigned to the present assignee and incorporated herein by reference.

0019Next, the structure of Figure 9 may be secured to a larger ink supply chamber 48 as shown in Figure 10 using known soldering processes to permanently join the outside wall of the chamber 48 to the metal domes 38. The larger chamber 48 is operative to feed ink in the direction of the arrows and to individual ones of the ink chambers 40 and 42 in the integrated thermal ink jet printhead in Figure 9. Electrical connection means 50, 52 may be mounted on the outer surface of the large ink reservoir 48 to provide pulse drive circuitry for the printhead of Figure 9. For example, an insulating substrate 50 will typically carry electrical leads 52 thereon (or therein), and in actual practice may take the form of a flexible (FLEX) circuit or a tape automated bond (TAB) bond circuit of the types well known in the art. The individual electrical leads 52 in such circuits may be connected into the printhead conductors 24,26,28 using known wire or beam lead bonding techniques (not shown), and one such suitable single point TAB bonding process is disclosed, for example, in U.S. Patent No. 4,635,073 issued to Gary E. Hanson, assigned to the present assignee and incorporated herein by reference.

0020The following table of values indicates suitable layer deposition processes, layer thicknesses, and materials which may be used in printhead manufacture in accordance with the presently known best mode for carrying out the present invention. However, it should be understood that this table is given by way of example only, and it is not intended to indicate any single absolute best process for manufacturing our printhead, since one single set of preferred process steps and related details have not been selected as of the present time. <tables id="tabl0001" num="0001"><table frame="all"><title>TABLE</title><tgroup cols="4" colsep="1" rowsep="0"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><thead valign="top"><row><entry namest="col1" nameend="col1" align="center">LAYER</entry><entry namest="col2" nameend="col2" align="center">SUITABLE MATERIAL</entry><entry namest="col3" nameend="col3" align="center">DEPOSITION PROCESS</entry><entry namest="col4" nameend="col4" align="center">THICKNESS (MICRONS)</entry></row></thead><tbody valign="top"><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Substrate (10)</entry><entry namest="col2" nameend="col2" align="left">Oxidized Silicon Glass</entry><entry namest="col3" nameend="col3" /><entry namest="col4" nameend="col4" align="right">200 - 300</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Orifice Plate (18)</entry><entry namest="col2" nameend="col2" align="left">Nickel</entry><entry namest="col3" nameend="col3" align="left">Plating</entry><entry namest="col4" nameend="col4" align="right">20 - 75</entry></row><row><entry namest="col1" nameend="col1" morerows="3" rowsep="1" align="left">Insulating Layer (20)</entry><entry namest="col2" nameend="col2" align="left">Silicon Dioxide</entry><entry namest="col3" nameend="col3" align="left">PECVD *</entry><entry namest="col4" nameend="col4" morerows="3" rowsep="1" align="right">1 to 3</entry></row><row><entry namest="col2" nameend="col2" align="left">Silicon Nitride</entry><entry namest="col3" nameend="col3" align="left">LPCVD **</entry></row><row><entry namest="col2" nameend="col2" align="left">Silicon Oxy-</entry><entry namest="col3" nameend="col3" /></row><row rowsep="1"><entry namest="col2" nameend="col2" align="left">nitride</entry><entry namest="col3" nameend="col3" /></row><row><entry namest="col1" nameend="col1" morerows="2" rowsep="1" align="left">Resistor/Conductor (22)</entry><entry namest="col2" nameend="col2" align="left">Polysilicon</entry><entry namest="col3" nameend="col3" align="left">Sputtering</entry><entry namest="col4" nameend="col4" morerows="2" rowsep="1" align="right">0.05 to 0.5</entry></row><row><entry namest="col2" nameend="col2" align="left">Tantalum Silicide</entry><entry namest="col3" nameend="col3" align="left">PECVD</entry></row><row rowsep="1"><entry namest="col2" nameend="col2" align="left">Gold</entry><entry namest="col3" nameend="col3" align="left">LPCVD</entry></row><row><entry namest="col1" nameend="col1" morerows="4" rowsep="1" align="left">Passivation Layer (30)</entry><entry namest="col2" nameend="col2" align="left">Silicon Dioxide</entry><entry namest="col3" nameend="col3" align="left">PECVD</entry><entry namest="col4" nameend="col4" morerows="4" rowsep="1" align="right">0.5 to 2</entry></row><row><entry namest="col2" nameend="col2" align="left">Silicon Nitride</entry><entry namest="col3" nameend="col3" align="left">LPCVD</entry></row><row><entry namest="col2" nameend="col2" align="left">Silicon Oxy-</entry><entry namest="col3" nameend="col3" /></row><row><entry namest="col2" nameend="col2" align="left">nitride</entry><entry namest="col3" nameend="col3" /></row><row rowsep="1"><entry namest="col2" nameend="col2" align="left">Silicon Carbide</entry><entry namest="col3" nameend="col3" /></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Seed Layer (36)</entry><entry namest="col2" nameend="col2" align="left">Nickel, Titanium Chromium</entry><entry namest="col3" nameend="col3" align="left">Sputtering</entry><entry namest="col4" nameend="col4" align="right">0.5 to 2</entry></row><row rowsep="1"><entry namest="col1" nameend="col1" align="left">Barrier (38)</entry><entry namest="col2" nameend="col2" align="left">Nickel</entry><entry namest="col3" nameend="col3" align="left">Plating</entry><entry namest="col4" nameend="col4" align="right">10 to 75</entry></row></tbody></tgroup><tgroup cols="4" colsep="0" rowsep="0"><colspec colnum="1" colname="col1" colwidth="39.37mm" /><colspec colnum="2" colname="col2" colwidth="39.37mm" /><colspec colnum="3" colname="col3" colwidth="39.37mm" /><colspec colnum="4" colname="col4" colwidth="39.37mm" /><tbody valign="top"><row><entry namest="col1" nameend="col4" align="justify">* Plasma Enhanced Chemical Vapor Deposition</entry></row><row><entry namest="col1" nameend="col4" align="justify">** Low Pressure Chemical Vapor Deposition</entry></row></tbody></tgroup></table></tables>

0021In the above table, PECVD signifies plasma enhanced chemical vapor deposition, whereas LPCVD signifies low pressure chemical vapor deposition. These processes are generally well known in the thin film art and are therefore not described in further detail herein. However, for a further discussion of these or related thin film technologies, reference may be made to the following three books on thin film technology: <ul id="ul0001" list-style="none"><li>(1) Berry, Hall and Harris, <u style="single">Thin Film Technology</u>, Van Nostrand Reinhold Co., New York, 1968.</li><li>(2) Maissel and Glang, <u style="single">Handbook of Thin Film Technology</u>, McGraw Hill Book Co., New York, 1970.</li><li>(3) Vossen and Kern, <u style="single">Thin Film Processes</u>, Academic Press, New York, 1978.</li></ul>

0022Thus, there has been described a thermal ink jet printhead which is fabricated in its entirety on one supporting dummy substrate which may be reusable many times, thereby reducing the manufacturing cost of the ink jet printhead. The masking steps used in the manufacture of the ink jet printhead described herein comes to a total of four (4) as compared to six (6) steps using the previously known processes for separately forming a thin film resistor substrate and a matching metal orifice plate, respectively. In the prior art processes, the orifice plate and the heater resistors are fabricated on different substrates and thus have to be precisely aligned with each other, resulting in a time consuming and difficult operation. However, in accordance with the present invention, all of the critical parts of the ink jet printhead which require precise alignment, namely the orifice plate, the ink jet chambers and the heater resistors are all formed on the same substrate, thereby providing a novel self-aligning process. The precise alignment of the above three (3) critical parts result in a precisioned thin film structure capable of improved performance in terms of printhead life and ink drop trajectory. After the ink drops are ejected from the orifices of the above-described printhead, the collapsing ink meniscus at the orifice travels toward the ink supply chamber instead of directly at the heater resistor. In this manner, the heater resistors are not subject to direct cavitational forces during an ink jet printing operation, and thus the life of the ink jet printhead is substantially enhanced.