Gate array oscillator with noise rejection

An oscillator with noise rejection formed in a gate array in a semiconductor chip comprising first amplifier means (14, 16, 18), means for connecting an external feedback element (15) across the input and inverting output of the first amplifier means for generating and amplifying the a sine wave, and means (20, 22) connected to the inverting output of the first amplifier means for generating a square wave with the duty cycle thereof being proportional to the difference between the center of the voltage swing of the amplified sine wave and a reference voltage. In a preferred embodiment, the first amplifier means and the generating means each include a current switch (16, 18; 20, 22). A voltage reference network (70, 72) is provided to set the reference voltage for the current switch in the generating means to the center of the voltage swing of the sine wave applied to that current switch. This results in a 50% duty cycle square wave for the output signal. A current source voltage reference is included for ensuring that each of the current switches and the voltage reference network drive approximately constant equal currents.