Audio output amplifier.
Abstract
A stand-by signal is supplied to a stand-by circuit (23) for determining the operation condition is a normal operative mode or a stand-by mode to control the operation. An output signal of the stand-by circuit (23) is delayed by a delay circuit. An output signal from the delay circuit is supplied to a bias circuit for generating a predetermined bias voltage. An audio signal supplied from the audio signal input terminal (14) is amplified by an amplifier circuit (26) based on the bias voltage from the bias circuit. When it is detected by an overcurrent detection circuit (27) that an overcurrent flows in the amplifier circuit (26), supply of the bias voltage from the bias circuit to the amplifier circuit (26) is interrupted by the protection circuit (25). The operation of the protection circuit (25) is controlled by output signals from the delay circuit and the overcurrent detection circuit (27).

Term
Term ended
Projected expiry passed 26 February 2008, 18.6 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
14 claims: 1 independent, 13 dependent
- 1An audio output amplifier comprising a first power source terminal (12) connected to be set at a power source potential (V CC );a second power source terminal (13) connected to be set at a power source potential (-VEE;GND) lower than the power source potential (V CC ) of said first power source terminal (12);a stand-by signal input terminal (16) connected to receive a stand-by signal;stand-by means (23) having an input terminal connected to said stand-by signal input terminal (16) and determining whether the operation condition is a normal operative mode or stand-by mode;delay means for delaying an output signal of said stand-by means (23);bias means controlled by an output signal from said stand-by means (23) to generate a predetermined bias voltage;an audio signal input terminal (14) connected to receive an audio signal;amplifier means (26) for amplifying the audio signal supplied from said audio signal input terminal (14) according to the bias voltage from said bias means;a signal output terminal (17) connected to the output terminal of said amplifier means (26);and protection means (25) for protecting said amplifier means (26), characterized by further comprising overcurrent detection means for detecting an overcurrent flowing in said amplifier means (26);and delay means for delaying an output signal of said stand-by means (23) and characterized in that said bias means is controlled by an output signal from said delay means and the supply of the bias voltage to said amplifier means (26) from said bias means is interrupted when an overcurrent in said amplifier means (26) is detected by said overcurrent detection means (27).
28 paragraphs, as filed
0001This invention relates to an audio output amplifier having a stand-by circuit, and more particularly to a protection circuit for preventing output elements from being damaged at the time of short circuit of the output terminal.
0002In the prior art, an audio output amplifier includes a stand-by circuit for determining whether the operation condition is a stand-by mode or normal operation mode in response to a stand-by signal, a bias circuit controlled in response to an output signal of the stand-by circuit to generate a predetermined bias voltage, a protection circuit controlled by an output signal of the stand-by circuit, an amplifier circuit connected to receive an audio signal and a bias voltage from the bias circuit and amplify the audio signal, and an output stage element (transistor) driven by an output signal from the amplifier circuit. In the audio output amplifier with the construction as described above, a non-stand-by mode (operative mode) or stand-by mode is selectively set according to the stand-by signal supplied to the stand-by circuit. Transition from the operative mode to the stand-by mode is rapidly effected. This causes a voltage at an output terminal connected to the output stage element to be rapidly changed, thereby causing an impulsive sound to be generated from a load such as a speaker connected to the output terminal. The stand-by circuit is also used to attain the audio output muting function, for example.
0003In order to prevent the impulsive sound from being generated, it is a common practice to delay the stand-by signal supplied to the stand-by circuit by using a CR time constant circuit. When the stand-by signal is delayed, the bias voltage from the bias circuit slowly drops, and therefore the output voltage generated from the output terminal is slowly lowered. This successfully prevents occurrence of the impulsive sound.
0004In a case where an abnormal condition occurs, for example, when the output terminal of the audio output amplifier is grounded, the protection circuit is operated. If transition from the operative mode to the stand-by mode occurs in the abnormal condition, the output signal of the bias circuit is slowly lowered in the transition process. At this time, since the protection circuit is immediately set into the nonoperative condition, a bias voltage is supplied to the bias circuit without any protection. Therefore, in this case, the amplifier circuit amplifies the audio signal based on the bias voltage. For this reason, if the abnormal condition as described above occurs in the transition process from the operative mode to the stand-by mode, the output stage element may be damaged.
0005An object of this invention is to provide an audio output amplifier in which an output stage element can be effectively protected from being damaged in the transition process from the operative mode to the stand-by mode.
0006According to one embodiment of this invention, there is provided an audio output amplifier comprising a first power source terminal connected to be set at a power source potential; a second power source terminal connected to be set at a power source potential lower than the power source potential of the first power source terminal; a stand-by signal input terminal connected to receive a stand-by signal; a stand-by circuit having an input terminal connected to the stand-by signal input terminal and determining whether the operation condition is a normal operative mode or stand-by mode; a delay circuit for delaying an output signal of the stand-by circuit; a bias circuit controlled by an output signal from the delay circuit to generate a predetermined bias voltage; audio signal input terminal connected to receive an audio signal; an amplifier circuit for amplifying the audio signal supplied from the audio signal input terminal according to the bias voltage from the bias circuit; an signal output terminal connected to the output terminal of the amplifier circuit; an overcurrent detection circuit for detecting an overcurrent flowing in the amplifier circuit; and a protection circuit controlled by an output signal from the delay circuit and connected to interrupt the supply of the bias voltage to the amplifier circuit from the bias circuit when an overcurrent is detected by the overcurrent detection circuit.
0007With this construction, since an output signal of the bias circuit slowly falls with a predetermined time constant in the transition process from the operative mode to the stand-by mode, rapid change in the voltage at the output terminal can be suppressed to prevent the occurrence of the impulsive sound. Further, the protection circuit is controlled to be set to a non-operative condition after an output signal from the bias circuit is interrupted, and the protection circuit is kept in an operative condition in the transition process from the operative mode to the stand-by mode. Thus, the protection circuit is kept operative in the transition process from the operative mode to the stand-by mode so as to protect the output stage element from damage. After the protection circuit is set non-operative, each circuit in the audio output amplifier is set in the stand-by condition, preventing a useless current flow.
0008This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: <ul id="ul0001" list-style="none"><li>Fig. 1 is a circuit diagram of an audio output amplifier according to a first embodiment of this invention;</li><li>Fig. 2 is a circuit diagram of an audio output amplifier according to a second embodiment of this invention; and</li><li>Fig. 3 is a circuit diagram of an audio output amplifier according to a third embodiment of this invention.</li></ul>
0009Fig. 1 is a circuit diagram showing an audio output amplifier according to a first embodiment of this invention. Portion defined by one-dot-dash line 11 indicates the circuit construction of an audio output amplifier which is integrated. In this embodiment, audio output amplifier 11 includes V<sub>CC</sub> power source terminal 12, -V<sub>EE</sub> power source terminal 13, non-inverting input terminal 14, inverting input terminal 15, stand-by input terminal 16 and audio signal output terminal 17. Terminal 12 is connected to receive power source voltage V<sub>CC</sub> and terminal 13 is connected to receive -V<sub>EE</sub> power source voltage. A signal generated from audio signal source 18 is amplified by amplifier 19, and an amplified output signal is set to a desired signal level adjusted by means of volume 20. The level-adjusted signal is then supplied to input terminal 14, via DC blocking capacitor C5. Terminal 14 is circuit-grounded via resistor R13. Terminal 16 is connected to receive a stand-by signal from CPU 21, for example. Terminal 17 is connected to a load 22 such as a speaker which is driven by an audio signal generated from terminal 17.
0010Further, audio output amplifier 11 includes stand-by circuit 23, bias circuit 24, protection circuit 25, amplifier circuit 26 and overcurrent detection circuit 27 which are each connected between terminals 12 and 13. Stand-by circuit 23 includes input NPN transistor Q1 for stand-by control, switching PNP transistor Q2 for stand-by control and resistor R1. The base of transistor Q1 is connected to terminal 16, the emitter is connected to terminal 13 and the collector is connected to one end of resistor R1. The other end of resistor R1 is connected to the base of transistor Q2 whose emitter is connected to terminal 12.
0011Bias circuit 24 is used to supply a predetermined bias voltage to amplifier 26. Bias circuit 24 includes NPN transistors Q3 and Q4, resistors R2 to R4, diodes (or PNP transistors each having a collector and a base connected together) D1 to D3, and capacitor C1. One end of resistor R2 is connected to the collector of transistor Q2, and the other end is connected to the base of transistor Q3 and to one end of resistor R3 which is connected at the other end to terminal 13. The collector of transistor Q3 is connected to terminal 12 and the emitter is connected to one end of resistor R4. Capacitor C1 is connected between the base of transistor Q3 and terminal 13. The other end of resistor R4 is connected to the anode of diode D1 whose cathode is connected to the anode of diode D2 and the base of transistor Q4. The cathode of diode D2 is connected to terminal 13. The collector and emitter of transistor Q4 are respectively connected to the cathode of diode D3 and terminal 13. Further, the anode of diode D3 is connected to terminal 12.
0012Protection circuit 25 is used to set amplifier circuit 26 to the non-operative condition by interrupting the supply of bias voltage from bias circuit 24 when an overcurrent is detected by means of overcurrent detection circuit 27. Protection circuit 24 includes NPN transistors Q5 to Q7, PNP transistor Q8 and resistors R5 to R7. The base of transistor Q5 is connected to the base of Q3, the collector is connected to terminal 12 and the emitter is connected to one end of resistor R5. The other end of resistor R5 is connected to the emitter of transistor Q8 and one end of resistor R6. The base of transistor Q8 is connected to the other end of resistor R6 and the collector of transistor Q7, and the collector is connected to the base of transistor Q7. The base of transistor Q7 is also connected to the base of transistor Q6 and the emitter is connected to terminal 13. The collector of transistor Q6 is connected to the base of transistor Q4 and the emitter is connected to terminal 13. Resistor R7 is connected between terminal 13 and the base connection node of transistors Q6 and Q7. Transistors Q7 and Q8 are connected to form a thyristor.
0013Amplifier circuit 26 includes PNP transistors Q9 to Q13, NPN transistors Q14 to Q17, resistors R8 and R9, and diodes (or PNP transistors each having a collector and a base connected together) D4 and D5. The base of transistor Q9 is connected to the cathode of diode D3, the emitter is connected to terminal 12, and the collector is connected to the emitters of transistors Q10 and Q11. The emitter of transistor Q10 is connected to the emitter of transistor Q11, the base is connected to terminal 14 and the collector is connected to the collector of transistor Q14. The base and collector of transistor Q11 are respectively connected to terminal 15 and the collector of transistor Q15. The bases of transistors Q14 and Q15 are connected together, and the base connection node is connected to the collector of transistor Q15. The emitters of transistors Q14 and Q15 are connected to terminal 13. Transistors Q10, Q11, Q14 and Q15 are connected to constitute differential amplifier section 28. Transistor Q9 functions as an operation current source for differential amplifier section 28. The base of transistor Q12 is connected to the base of transistor Q9, the emitter is connected to terminal 12 and the collector is connected to the base of transistor Q17 and the anode of diode D4. The cathode of diode D4 is connected to the anode of diode D5 whose cathode is connected to the base of transistor Q13 and the collector of transistor Q16. The base of transistor Q16 is connected to the collector of transistor Q14, and the emitter is connected to terminal 13. The base-collector of transistor Q16 is coupled via phase-compensation capacitor C6 which prevents a parasitic oscillation of amplifier circuit 26. Diodes D4 and D5 and transistor Q16 are thus connected to constitute pre-driving section 29 for amplifying an output signal of differential amplifier section 28. Each of resistors R8 and R9 is connected at one end to terminal 15. The other end of resistor R8 is connected to terminal 17, and the other end of resistor R9 is grounded. Resistors R8 and R9 are connected to constitute a negative feedback circuit 30 for feeding an audio output signal to the input terminal of differential amplifier section 28 from terminal (audio signal output terminal) 17. The collector and emitter of transistor Q17 are respectively connected to terminals 12 and 17. The emitter and collector of transistors Q13 are respectively connected to terminals 17 and 13. Transistors Q13 and Q17 are thus connected to constitute output stage amplifier section 31 of complementary single ended push-pull (SEPP) type. Output stage amplifier section 31 is driven in a push-pull fashion by an output signal from pre-driving section 29.
0014Overcurrent detection circuit 27 includes diode (or PNP transistor having a collector and a base connected together) D6, NPN transistor Q18, PNP transistor Q19, and resistor R10. The base of transistor Q18 is connected to the collector of transistor Q12, the collector is connected to the cathode of diode D6 and the emitter is connected to one terminal of resistor R10. The anode of diode D6 is connected to terminal 12, and the other end of resistor R10 is connected to terminal 17. The emitter of transistor Q19 is connected to terminal 12, the base is connected to the collector of transistor Q18, and the collector is connected to the base connection node of transistors Q6 and Q7.
0015Next, the operation of audio output amplifier 11 shown in Fig. 1 is explained. In the normal operative mode, a stand-by signal supplied from CPU 21 to terminal 16 is set at an "H" level to render transistors Q1 and Q2 conductive. As a result, bias circuit 24 is set operative, lowering the potential at the collector of transistor Q4. This causes the base potentials of transistors Q9 and Q12 of amplifier circuit 26 to be lowered, thus turning on transistors Q9 and Q12 to set amplifier circuit 26 in an operative condition. In this condition, an audio signal supplied from terminal 14 is amplified by amplifier circuit 26 and generated from terminal 17. The amplified audio signal is supplied to drive load 22 such as a speaker. In the normal operation mode, overcurrent detection circuit 27 is set in the non-operative condition, and protection circuit 25 is also set in the non-operative condition.
0016However, if an overcurrent flows transistor Q17, and the base-emitter voltage (V<sub>BE</sub>) increases, transistors Q18 and Q19 of overcurrent detection circuit 27 are turned on. Then, the thyristor constituted by transistors Q7 and Q8 is triggered and set to a conductive state and transistor Q6 is turned on. This renders transistor Q4 of bias circuit 24 to be nonconductive and transistors Q9 and Q12 of amplifier circuit 26 are turned off. Thus, differential amplifier section 28 and pre-driving section 29 of amplifier circuit 26 are set to a non-operative condition, protecting transistors Q17 and Q13 connected at the output stage.
0017When a stand-by signal supplied to terminal 16 is set at an "L" level, transistors Q1 and Q2 are turned off. This changes the operating condition from the normal operative mode to the stand-by mode. At this time, base potential V<sub>B3</sub> of transistor Q3 of bias circuit 24 is slowly lowered with the time constant expressed as shown in the following eq. (1):<maths id="math0001" num=""><img file="EP0280327A2_D0001.tif" /></maths> In eq. (1), the base input resistance of transistor Q3 is sufficiently larger than that of resistor R3. Therefore, current I₃ flowing through transistor Q3, and diodes D1 and D2 is slowly lowered with the time constant which is dependent on base potential V<sub>B3</sub> of transistor Q3 as shown by the following eq. (2):<maths id="math0002" num=""><img file="EP0280327A2_D0002.tif" /></maths> where V<sub>BE</sub> denotes a voltage between the base and emitter of transistor Q3 and the forward voltage drop of diode D1 and D2.
0018Therefore, currents flowing in transistor Q4 connected to diode D2, diode D3 connected between the collector of transistor Q4 and terminal 12, and transistors Q9 and Q12 connected to the cathode of diode D3 are slowly reduced with the time constant as described above. Thus, the operating conditions of amplifier circuit 26, pre-driving section 29 and overcurrent detection circuit 27 are slowly transferred from the operative mode to the non-operative mode. Therefore, the output level of an audio output signal from terminal 17 is slowly lowered. When the operating conditions of amplifier circuit 26, pre-driving section 29 and overcurrent detection circuit 27 are slowly transferred from the operative mode to the non-operative mode (stand-by mode), protection circuit 25 is still set in the operative condition. Accordingly, even if terminal 17 is grounded, protection circuit 25 is operated to protect transistors Q17 and Q13. That is, base potential V<sub>B3</sub> of transistor Q3 in bias circuit 24 is slowly lowered, causing the base potential of transistor Q5 of protection circuit 25 to be slowly lowered. At this time, if an overcurrent is detected by overcurrent detection circuit 27, the thyristor formed of transistors Q7 and Q8 is triggered and set to a conductive state. This turns on transistor Q6 and turns off transistor Q4 of bias circuit 24. Therefore, supply of bias voltage from bias circuit 24 to amplifier circuit 26 is interrupted, setting amplifier circuit 26 to the non-operative state. Thus, output transistors Q17 and Q13 can be protected. In this case, transistor Q4 of bias circuit 24 is turned off when base potential V<sub>B3</sub> of transistor Q3 becomes smaller than 3V<sub>BE</sub> as shown by the following expression (3) to turn off transistor Q3: V<sub>B3</sub> < 3V<sub>BE</sub> ... (3)
0019Further, the thyristor is set to a cut-off state when base potential V<sub>B5</sub> of transistor Q5 is set to satisfy the following expression (4): V<sub>B5</sub> = V<sub>B3</sub> < 2V<sub>BE</sub> + V<sub>CE8</sub> + (<img file="EP0280327A2_D0003.tif" />+<img file="EP0280327A2_D0004.tif" />)V<sub>BE</sub> ...E (4) where V<sub>CE8</sub> is a voltage between the collector and emitter of transistor Q8.
0020Only if the circuit constants are set to satisfy the following expression (5) based on expressions (3) and (4), it is possible to turn off transistor Q3 before the thyristor formed of transistors Q7 and Q8 is turned off in the transition process from the operative mode to the stand-by mode: 2V<sub>BE</sub> + V<sub>CE8</sub> + (<img file="EP0280327A2_D0005.tif" />+<img file="EP0280327A2_D0006.tif" />)V<sub>BE</sub> < 3V<sub>BE</sub> ... (5)
0021Thus, amplifier circuit 26 is set to the non-operative mode before protection circuit 25 is set non-operative, making it possible to protect output transistors Q17 and Q13 even in the transition process from the operative mode to the stand-by mode.
0022With this construction, since an output signal of bias circuit 24 is slowly lowered with a predetermined time constant in the transition process from the operative mode to the stand-by mode, rapid variation in the voltage at output terminal 17 is suppressed, preventing generation of the impulsive sound. Further, protection circuit 25 is set to the non-operative condition after an output of bias circuit 24 is interrupted, and protection circuit 25 is kept operative in the transition process from the operative mode to the stand-by mode. Therefore, protection circuit 25 is operated in the transition process from the operative mode to the stand-by mode so as to protect the output stage elements (transistors Q17 and Q13) from being damaged. After protection circuit 25 is set in the non-operative mode, each circuit in audio output amplifier 11 is set to the stand-by mode, preventing an unwanted current flow.
0023Fig. 2 shows an audio output amplifier according to a second embodiment of this invention. In Fig. 2, those portions which correspond to the circuit portions in Fig. 1 are denoted by the same reference numerals and the explanation thereof is omitted. Further, amplifier circuit 26 and overcurrent detection circuit 27 are constructed in the same manner as in the circuit of Fig. 1, and therefore they are shown in a block form. In this case, external circuits connected to terminals 14 to 16 are omitted. The Fig. 2 circuit is similar to that of Fig. 1 except that bias circuit 32 exclusively used for protection circuit 25 is additionally provided in the Fig. 1 circuit. In the Fig. 1 circuit, bias circuit 24 is used for both protection circuit 25 and amplifier circuit 26. However, in the Fig. 2 circuit, a bias voltage is supplied from bias circuit 24 to amplifier circuit 26 and a bias voltage to protection circuit 25 is supplied from bias circuit 32. Bias circuit 32 includes PNP transistor Q20, resistors R11 and R12, and capacitor C2. The base of transistor Q20 is connected to the base of transistor Q2, the emitter is connected to terminal 12, and the collector is connected to one end of resistor R11. The other end of resistor R11 is connected to the base of transistor Q5 and one end of resistor R12. The other end of resistor R12 is connected to terminal 13. Further, capacitor C2 is connected between the base of transistor Q5 and terminal 13.
0024With the construction described above, the normal operation is effected in the same manner as in the Fig. 1 circuit. In the case where a stand-by signal supplied to terminal 16 is set to an "L" level and transistor Q1 is turned off to change the operation condition from the operative mode to the stand-by mode, transistor Q20 is turned off. As a result, a potential at the connection node between resistors R11 and R12 or the base potential of transistor Q5 is slowly lowered with the CR time constant defined by resistor R12 and capacitor C2. At the same time, turn-off of transistor Q1 causes transistor Q2 to be turned off. Therefore, the base potential of transistor Q3 is slowly lowered with the CR time constant defined by resistor R3 and capacitor C1.
0025In audio output amplifier 11, it is necessary to turn off transistor Q3 of bias circuit 24 prior to the turn-off of the thyristor of protection circuit 25 in the transition process from the operative mode to the stand-by mode. For this reason, the relation between time constant C1·R3 of bias circuit 24 and time constant C2·R12 of bias circuit 32 is set to satisfy the following expression (6): C1·R3 < C2·R12 ... (6)
0026The condition shown in expression (6) can be easily set in comparison with that shown in expression (5).
0027Fig. 3 shows an audio output amplifier according to a third embodiment of this invention. In the circuit of Fig. 3, those portions which are similar to the circuit portions of Fig. 1 are denoted by the same reference numerals and the explanation thereof is omitted. In the circuit of Fig. 3, power source voltage V<sub>CC</sub> is supplied to terminal 12 and ground potential GND is supplied to terminal 13. A series circuit of resistors R14 and R15 is connected between the V<sub>CC</sub> circuit and the circuit ground, and the junction between resistors R14 and R15 is coupled, via resistor R13, to the base of transistor Q10. Resistors R13-R15 constitute a bias circuit for amplifier circuit 26. Capacitor C3 is connected between resistor R9 of negative feedback 30 and the ground. Further, capacitor C4 is connected between terminal 17 and the emitter connection node of transistors Q17 and Q13. Capacitors C3 and C4 are used for DC cut-off.
0028With this construction, stand-by circuit 23, bias circuit 24, protection circuit 25, amplifier circuit 26 and overcurrent detection circuit 27 constituting audio output amplifier 11 are operated on a power source voltage between V<sub>CC</sub> and GND. In this embodiment, a power source voltage different from that in the Fig. 1 circuit is used, but the basic operation is the same as in the Fig. 1 circuit and the same effect can be attained.
10 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| EP1154568A2 | Cited by | European Patent Office (EPO) | Search report |
| EP0515853A1 | Cited by | European Patent Office (EPO) | Search report |
| FR2741212A1 | Cited by | France | Search report |
| US5224169A | Cited by | United States of America | Search report |
| US5255094A | Cited by | United States of America | Search report |
| EP1154568A3 | Cited by | European Patent Office (EPO) | Search report |
| CN1066599C | Cited by | China | Search report |
| GB2251350A | Cited by | United Kingdom | Search report |
| TR26900A | Cited by | Türkiye | Search report |
| GB2251350B | Cited by | United Kingdom | Search report |
| EP0058005A1 | Cites | European Patent Office (EPO) | Search report |
| EP0159079A2 | Cites | European Patent Office (EPO) | Search report |
| EP0171723A1 | Cites | European Patent Office (EPO) | Search report |
| DE2538423A1 | Cites | Germany | Search report |
4 priority claims, no other members on record
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 4454287 | Japan | A | |
| 4454287 | Japan | – | |
| JP19870044542 | – | – | – |
| 4454287 | – | – | – |
23 legal events, as 3 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Patent expired after termination of 20 yearsExpiredPE20 | PE20 | GB | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| European patent in force as of 2002-01-01IF02 | IF02 | GB | |
| Notification of lapseLapsedST | ST | FR | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Register noted 'licences of right' (sect. 46/1977)746 | 746 | GB | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| No opposition filedOpposition26N | 26N | EP | |
| No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE | PLBE | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA | STAA | EP | |
| Fr: translation filedET | ET | EP | |
| Corresponds to:REF | REF | EP | |
| Designated contracting statesAK | AK | EP | |
| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
| First examination report despatched17Q | 17Q | EP | |
| Designated contracting statesAK | AK | EP | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 0280327
- Publication, DOCDB
- 0280327
- Publication, EPODOC
- EP0280327
- Application
- 88102916
- Application, DOCDB
- 88102916
- Application, EPODOC
- EP19880102916
Titles6
- German
- Tonfrequenzausgangsverstärker.
- English
- Audio output amplifier.
- French
- Amplificateur de sortie audio.
- German
- Tonfrequenzausgangsverstärker
- English
- Audio output amplifier
- French
- Amplificateur de sortie audio
Classification
- CPC, 1
- H03F1/52
- IPC, 3
- H03F3 30
- H03F1 42
- H03F1 52
Designated states3
- Contracting states, 3
- Germany
- France
- United Kingdom