Semiconductor device having a diffusion barrier and process for its production
Abstract
This invention provides a semiconductor device having an electrode conductor layer (6) on a semiconductor substrate (1) through the medium of a diffusion barrier layer (5) which is formed of an amorphous material having a higher crystallization temperature than the heat treatment temperature for the semiconductor device, and a process for manufacturing this device. According to this invention, an undesired reaction between the metal of the electrode conductor layer (6) and the material of the semiconductor substrate (1) and the diffusion of the electrode conductor material into the semiconductor substrate (1) can be prevented, whereby a semiconductor device having a high thermal reliability can be obtained.

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Projected expiry passed 5 June 2007, 19.3 years ago.
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1 sheet
Sheet 1
Every citation, both ways
| Document | Relation | Office | Category | Cited during |
|---|---|---|---|---|
| GB2130793A | Cites | United Kingdom | X | Search report |
| SOLID-STATE ELECTRONICS, vol. 27, no. 6, June 1984, pages 507-513, Exeter, GB; A.G. TODD et al.: "Amorphous metal-semiconductor contacts for high temperature electronics-I" | Non-patent | – | – | Search report |
| JOURNAL OF APPLIED PHYSICS, vol. 53, no. 7, July 1982, pages 6186-6190, New York, US; B.L. DOYLE et al.: "Au diffusion in amorphous and polycristalline NiO.55 Nb0.45" | Non-patent | – | – | Search report |
| PHYSICAL REVIEW, part B, vol. 32, no. 2, 15th July 1985, pages 1363-1365; J.C. BARBOUR et al.: "Amorphous Ni-Zr alloys as barriers for self-diffusion" | Non-patent | – | – | Search report |
| IEEE ELECTRON DEVICE LETTERS, vol. EDL-6, no. 8, August 1985, pages 437-438, New York, US; R.D. REMBA et al.: "Use of TiN barrier to improve GaAs FET Ohmic contact reliability" | Non-patent | – | – | Search report |
5 members in 3 offices; this record represents the family
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 13014986 | Japan | – | |
| 13014986 | Japan | A |
Members5
| Document | Office | Kind | |
|---|---|---|---|
| EP0248445A2 | European Patent Office (EPO) | A2 | |
| JPS62287641A | Japan | A | |
| EP0248445A3This record | European Patent Office (EPO) | A3 | |
| US4965656A | United States of America | A | |
| JPH0779136B2 | Japan | B2 |
11 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Information on inventor provided before grant (corrected)RIN1 | RIN1 | |
| Information on inventor provided before grant (corrected)RIN1 | RIN1 | |
| Information on inventor provided before grant (corrected)RIN1 | RIN1 | |
| Application refused18R | 18R | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: THE APPLICATION HAS BEEN REFUSEDSTAA | STAA | |
| First examination report despatched17Q | 17Q | |
| Request for examination filed17P | 17P | |
| Designated contracting statesAK | AK | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | |
| Designated contracting statesAK | AK | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI |
Numbers
- Publication
- 0248445
- Application
- 87108180
Titles3
- English
- Semiconductor device having a diffusion barrier and process for its production
- French
- Dispositif semi-conducteur incorporant une barrière de diffusion et son procédé de fabrication
- German
- Eine Diffusionsmembran enthaltende Halbleiterschaltung und deren Herstellungsverfahren
Classification
- CPC, 3
- H10D62/83
- H10D64/62
- H10W20/425
- IPC, 4
- H01L23 532
- H01L29 43
- H01L29 45
- H10P14 40
Designated states1
- Contracting states, 1
- Sweden