Semiconductor memory capable of executing logical operation

A semiconductor memory is capable of executing a logical operation, which comprises at least one sense amplifier having a pair of inputs connected to a pair of bit lines; and a pair of output lines connected to the pair of bit lines, respectively. At least a pair of memory cells and a pair of dummy cells are connected to the pair of bit lines, respectively. Further, at least a pair of word lines are connected to the pair of memory cells, respectively, and a pair of dummy word lines connected to the pair of dummy cells, respectively. A word selecting circuit is connected to the pair of word lines and is capable of activating the pair of word lines at the same time. In addition, a dummy cell selecting circuit is connected to the pair of dummy word lines and adapted to alternatively activate the pair of dummy cells. A controller is provided for controlling the word selecting circuit and the dummy cell selecting circuit so that the sense amplifier is activated after the pair of word lines is activated by the word selecting circuit and a selected one of the dummy cells is activated by the dummy cell selecting circuit. As a result, the result of an logical operation on two bits of data respectively read from the pair of memory cells will outputted on the pair of data lines.