Phase difference measurement receiver.

The invention relates generally to relative phase measurements and more specifically to receivers for determining phase differentials of RF signals.

Various electronic navigation systems are well known in the art. Loran systems, for instance, have found wide acceptance and are proved to be a valuable aid to navigation. More recently, a Global Positioning System (_GPS) has been proposed wherein a constellation of satellites will be positioned in orbit around the Earth. Each satellite transmits data by via signals operating at two frequencies which are modulated by dual psuedorandum noise codes in clear/acquisition (CA) and precision (_P) codes peculiar to that satellite. The modulation is structured to establish a spread spectrum transmission that can be identified and processed by the user to determine his position. Receivers for utilisation and such systems are described, for instance, in European Patent Specification No.0,079,689 and in copending European Patent Application of even date entitled "Differential Doppler Receiver" (E.5231).

The receiver disclosed in European Patent Specification No.0,079,689 utilises a phase lock loop to derive local oscillators for a double heterodyne receiver. which converts IF signals from the earth's orbital satellite to audio frequency output signals. Since both local oscillators are locked to a common reference oscillator, the phase variation of the audio signal contains all the information impressed on the RF signals. In the co-pending European Patent Application referred to, the receiver disclosed retains the advantages of prior GPS receivers and additionally accurately measures the Doppler frequency of RF signals from a transmitter moving with respect to the receiver by using a second transmitter having a stable and precisely known frequency as the reference. Signals from the two sources are processed in a differential mode to eliminate the need for a precise timing clock in the receiver.

The present invention is defined in the appended claims and in one embodiment is concerned with a receiver which determines the phase difference between signals incident from a common source to antennas positioned at separated locations. The signals collected by each antenna are respectively coupled to heterodyning circuits, each of which may be of the double heterodyne type, for conversion to low frequency output signals. Included in each heterodyning circuit is circuitry for selecting a desired coded signal, from a plurality of coded signals, with the aid of a selection signal coupled thereto. A local oscillator, phase locked to one low frequency output signal and consequently to one of the RF signals, provides the local oscillator signals required for the heterodyning process. A signal representative of the phase locked local oscillator signals is phase shifted and coupled to a phase comparator with a low frequency output signal from a second heterodyning circuit, wherefrom a signal is provided that is representative of the phase difference between the phase shifted local oscillator representative signal and the low frequency output signal from the second heterodyning circuit. This phase representative signal is utilised to provide a control signal to vary the phase value of the phase shifter until _the low frequency output signal from the second heterodyning circuit and the phase shifted local oscillator representative signals are in phase. The value of the phase shifter when the two signals are in phase is representative of the phase difference between the incident signals at the two antenna locations.

Thus the present invention generates low frequency output signals from which the relative phase angles of an RF carrier signal received at separated antennas may be extracted.

The invention will now be described in greater detail hy way of example, with reference to the accompanying drawing which is a schematic diagram of a preferred embodiment of the invention.

A plane wave signal instant to separated antennas 11 and 12 induces signals thereat which vary in phase in accordance with the angle of incidence and the separation of the antennas. In accordance with the invention, the signal from the antenna 11 is coupled to a receiver 13 which may be of the type fully described in European Patent Specification No.0,079,689. Briefly, the signal from the antenna 11 is coupled through a bandpass filter 14 and an _RF amplifier 15 to a mixer 16 through which a first local oscillator frequency is also coupled via a line 17. The difference frequency signal from the mixer 16 is amplified by a wideband IF amplifier 21 and coupled to a modulator 22 wherein it is biphase modulated by a signal representative of the C/A code applied to the transmitted signals from the satellite. When the locally generated C/A code is in time synchronisation with the transmitted code the effect of the transmitted code modulation is cancelled and the bandwidth of the signal is returned from the wide spread spectrum bandwidth to the original narrow bandwidth occupied by the satellite data stream. The selected C/A coded signal is coupled from a modulator 22 through a narrowband IF amplifier 23 wherefrom it is coupled along with a second local oscillator signal via a line 25 to a second mixer 24 wherefrom a low frequency signal, which may be in the order of lKHz, is coupled to a low frequency amplifier 26.

The low frequency signal from the low frequency amplifier 26 and a signal from a local oscillator (L_O) 27, representative of the local oscillator frequencies, are respectively coupled to the "D" and clock terminals of a "_D" type flip-flop 28 which is included in a biphase demodulator 32 which may be of the type described in European Patent Specification No.0,072,848.

The flip-flop 28 functions as a phase detector, detecting the polarity of the low frequency signal when clocked by the LO representative signal. The signal at the clock terminal is additionally coupled to an exclusive OR gate 33, to which the "Q" output of flip-flop 28 is also coupled. The exclusive OR gate 33 operates to invert the clock pulse when the low frequency signal from the amplifier 26 lags the clock signal and maintains the clock phase when the low frequency signal leads the clock signal. Output signals from the OR gate 33 are coupled via a line 34 to one input terminal of a second exclusive OR gate 35, having a second input terminal coupled, via a line 36, to the output terminal of the low frequency amplifier 26. Signals at the output terminals of OR gate 35 are coupled via a lowpass filter (LPF) 37 to a d.c. amplifier 38, wherefrom signals representative of the phase difference between the clock signal to flip-flop 28 and the low frequency signal from amplifier 26 are coupled to a signal from the comparator circuit 41, the output terminal of which may be coupled to a frequency increment command unit 42. After each system clock pulse for which the filtered and amplified signal at the output terminal of the exclusive OR gate 35 exceeds a threshold signal coupled to the comparator 41, the frequency increment command unit 42 provides a signal via a line 43, which is representative of a coarse frequency increment of the local oscillator 27, to a sum circuit 44. The signal at the output terminal of the amplifier 38, representative of a fine frequency adjustment is also coupled, via a line 45, to the sum circuit 44. The sum of the signals coupled to the sum circuit 44 is coupled via line 46 to a voltage controlled crystal oscillator 48 which is the basic unit of the local oscillator 27. Signals from the voltage controlled crystal oscillator 48 are coupled via a line 52 to a frequency multiplier 53, wherefrom the previously mentioned first and second local oscillator frequencies are respectively coupled to the mixers 16 and 17. The output signal of the voltage controlled crystal oscillator 48 is also coupled via a line 54 to a divide-by-N circuit 55, wherefrom a signal at a frequency which is 1/N times the frequency of the signal at the output terminals of the voltage controlled crystal oscillator 48 is coupled via a line 56 to the clock terminal of the flip-flop 28.

Similarly, signals received at antenna 12 are coupled via a bandpass filter 61 and an RF amplifier 62 to a mixer 63 to which the first local oscillator signal is also coupled. An IF signal from the mixer 63 is coupled via a wideband amplifier 64 to a coded signal modulator 65 wherefrom the selected signal is amplified by a narrowband IF amplifier 66 and coupled to a second mixer 67 in the channel, to which the second local oscillator signal is also coupled. The low frequency signal from the second local oscillator is coupled via an amplifier 68 to an input terminal of an exclusive OR gate 72 included in a second biphase demodulator 70. One input terminal of the exclusive OR gate 72 is coupled to the output terminal of a second exclusive OR gate 73 in the biphase demodulator 70. The exclusive OR gate 73 has a first input terminal coupled via a phase shifter 74 to the output terminal of the divide-by-N circuit 55 and a second input terminal coupled to the "Q" terminal of the flip-flop 28 in the biphase demodulator 32.

When the clock signal to the flip-flop 28 leads the signal at the "D" input terminal thereof, and the signal. at the "Q" terminal is high, the OR gate 73 inverts the phase shifted clock signal prior to coupling to the second input terminal of the exclusive OR gate 72, while a non-inverted signal is coupled when the clock signal - lags the signal at the "D" terminal. Thus, the biphase demodulator 70 is slaved to the biphase demodulator 32. The exclusive OR gate 72 provides a phase comparison between the signal at the output terminal of the exclusive OR gate 73 and the low frequency signal coupled from the amplifier 68, which is of a phase substantially equal to phase of the received signal at the antenna 12. The signal at the output terminals of the exclusive OR gate 72 is coupled via a lowpass filter 75 and a d.c. amplifier 76 to an amplitude comparator 77, wherefrom a signal is coupled to a phase shift incrementing signal generator 78 whenever the signal from the d.c. amplifier 76 exceeds a threshold signal coupled to the comparator 77. For each system clock pulse during which a signal is coupled to the incrementing phase shift signal generator 78, a signal to increment the phase shift, by a predetermined differential phase angle, is coupled to a phase shifter 74. This process continues until the signal from the d.c. amplifier 76 does not exceed the threshold signal coupled to the comparator 77. At this time, the total phase angle of the phase shifter 74 as read out of "read out device" 79 is substantially the phase difference between the signal at the antenna 11 and the signal at the antenna 12.