Structure comprising a monocrystalline substrate supporting a device layer of semiconductor material.

0001This invention relates to structures comprising a monocrystalline substrate supporting a device layer of semiconductor material. Intermetallic semiconductor material crystals of more than one element such as GaAs and GaAlAs have a number of properties useful in integrated circuit structures but to take full advantage of those properties it is necessary to build the integrated circuit structure in a thin layer with properties that produce device advantages supported by a substrate with different properties. It is desirable that the properties of the substrate have minimal effect on the properties of the device layer.

0002One integrated circuit structure in use in the art involves making the integrated circuit in a layer of GaAs on a substrate of high resistivity or semi-insulating GaAs. In this structure impurities in the doping that renders the substrate semi-insulating have a detrimental effect on device performance.

0003Another integrated circuit structure developed in the art involves the making and the isolating of integrated circuits in a layer of GaAs on a substrate of A1₂0₃ as described in Metallurgical Transactions Vol. 1, March 1970, pages 623-628 and in Journal of Applied Physics Vol. 42, No. 6, May 1971, pages 2519-2527. In this type of structure, problems are encountered with crystal defects at the GaAs-Al 0 interface.

0004Still another semiconductor structure involves selectively doped very thin layers of different semiconductor materials. This structure is known as a high electron mobility transistor (HEMT) and is described in the Japanese Journal of Applied Physics, Vol. 19, No. 5, May 1980, pp. L225 to L227. This structure places very stringent requirements on the quality of the substrate and the semiconductor material adjacent the device.

0005A structure comprising a monocrystalline substrate supporting a device layer of semiconductor material in which semiconductor devices can be formed, is characterised, according to the invention, by the inclusion of an intermediate, lattice accommodating epitaxial layer of _GaAlAs positioned between the monocrystalline substrate and said device layer.

0006The invention may be viewed as an intermediate manufacturing product which may be employed in a variety of ways to achieve integrated circuit structure benefits.

0007The invention will now be described by way of example, with reference to the accompanying drawings, in which:- <ul id="ul0001" list-style="none"><li>FIG. 1 represents a structure embodying the invention; and</li><li>FIGS. 2, 3, 4 and 5 represent various applications of the invention.</li></ul>

0008-Referring to FIG. 1, the structure 1 has a monocrystalline insulating substrate 2 which is joined at a line of demarcation 3 with an epitaxial layer 4 of GaAlAs. The GaAlAs layer 4 is generally undoped but may contain conductivity type determining impurities in accordance with the properties desired to be imparted to the ultimate integrated circuit structure. Since GaAlAs may have varying quantities of Ga and Al usually described as Ga Al As where x varies from about 0.1 to 0.9 and the electrical and optical properties vary with x, much flexibility can be achieved. The GaAlAs intermediate layer 4 is epitaxial with the crystalline substrate 2 and provides a barrier to electrons, in a device layer which will be formed over the exposed surface of at least portions of the layer 4, from interacting with interface defects at the interface 3. The GaAlAs intermediate layer 4 also permits wide differences in resistance properties in the material chosen for the substrate 2 from affecting the properties of the integrated circuit devices. A thin layer 5 of Ge may be included in order to improve the lattice spacing transition from the spacing of the substrate 2 to that of the GaAlAs layer 4.

0009The substrate 2 is of a crystalline material with crystal structure and lattice spacing compatible with epitaxial growth of the GaAlAs layer 4. The substrate may be of insulating material such as sapphire, spinel, ZnSe or conducting GaAs. The substrate may be chosen to impart a variety of properties such as resistance, optical transparency and thermal conductance. Where the substrate 2 is optically transparent and light transmission is employed as part of the application of the invention, the Ge layer 5 would not be used since it is optically opaque to the frequencies of most device materials such as GaAs and GaAlAs.

0010The structure 1 may be employed in various types of integrated circuit structures as illustrated in FIGS. 2, 3, 4 and 5.

0011Referring next to FIG. 2, the intermediate structure of FIG. 1 is provided with an epitaxial device layer 6 of GaAs in which an integrated circuit is to be formed. The layer 6 joins the GaAlAs layer 4 epitaxially at an interface 7. In FIG. 2, the region 4 and the region 6 may be provided with oxygen in the few parts per million range. This causes the GaAlAs layer 4 to be highly insulating. The oxygen will also give the GaAs layer 6 high resistivity so that processing operations such as ion implantation to produce arrays of field effect transistors may be employed.

0012In FIG. 2, while the Ge lattice accommodation layer 5 is not shown, the addition of a 5 micron thickness layer 5 of Ge would permit a wider lattice spacing tolerance in the selection of the material for the substrate 2. Where the substrate 2 is made of the material A1₂0₃, the defects at the interface 3 may not, however, be a sufficient problem to justify adding the Ge layer 5 with the added processing complexity.

0013Referring next to FIG. 3, an optically active device 8 such as a region of GaAs with a p-n junction 9 or a Schottky barrier is positioned in at least a portion of the surface of the region 6. When the structure of FIG. 3 is used, a device actuating light signal can be introduced through a transparent substrate 2 of A1₂0₃ and the intermediate region 4 to produce carriers in the device layer 6 to be collected through an external ohmic contact (not shown) to the device 8. Optical performance can be improved by providing a low recombination velocity condition well known in the photovoltaic cell art at the interface 7. It will be apparent that the Ge layer 5 would not be used in this structure since the Ge would operate to attenuate light of the wavelengths employed with GaAs.

0014Referring next to FIG. 4, the GaAlAs region 4 is made insulating and is equipped with a conductive GaAlAs layer 11 epitaxially joined to the region 4 at an interface 12. The layer 11 may be formed by the techniques of ion implantation, diffusion or vapor growth.

0015Referring next to FIG. 5, a layer 13 of undoped GaAs is added to the structure of FIG. 4 where the GaAs layer 13 and the conductive GaAlAs layer 11 are at least 0.06 micrometers thick to provide an improved structure for the high electron mobility transistor (HEMT) device currently receiving attention in the art. In this type of device the layers are so thin that advantage can be taken of the spatial separation between electrons and their parent donor impurities.

0016Additional advantages occur with the practice of the invention. Misfit dislocations at the interface 3 will be passive in structures employing the invention as opposed to the conditions present in the "silicon on sapphire" type structures common in the silicon industry. Further imperfections originating at the interface 3 will propagate in the intermediate layer 4 but will not grow perpendicular to the interfaces 7 and 12 between the intermediate and device layers and when they reach the device layers 6 and 11 they will propagate parallel to the interfaces 7 and 12 resulting in a higher quality device layer.

0017A preferred embodiment of the invention is a structure similar to FIG. 2 with a substrate 2 of A1₂0₃ of sufficient thickness for handling. A 2 to 20 micron thick layer 4 of Gao,5x^A11-0.5x^As is epitaxially grown thereon, through the technique of the decomposition of vapors of trimethyl aluminum, trimethyl gallium and arsine. This is followed by a layer of GaAs of at least 0.1 microns thickness in which no Al- containing vapor is provided in the growth with the Ga source and the As source. In order for the GaAs layer 6 to be useful for active devices, it should have an average carrier mobility of the order of 5,000 centimetres per volt second and have a doping concentration between 10 ¹⁵ and 10 ¹⁶ atoms per cc. Where the Ge layer 5 is employed, it would be grown first on the A_O2O₃ to a depth of around 5 microns followed by the GaAlAs described.

0018Alternatively, the GaAs layer 6 could be 2 to 20 microns thick and oxygen doped to give it high resistivity and a technique such as ion implantation used to form the active device region.

0019What has been described is a structure for the fabrication of integrated circuits wherein an intermediate layer of GaAlAs or of GaAlAs and Ge is provided between the substrate and the device layer.