Method of manufacturing a semiconductor device of the mis type
Abstract
A method for manufacturing a semiconductor device of the invention comprises the steps of (a) forming a gate insulating film (3, 23, 33, 43, 53, 63) on a surface of a silicon substrate (1,21,31,41,51,61), and a gate electrode (4, 24, 34, 44, 54, 64) on said gate insulating film (3, 23, 33, 43, 53, 63);(b) forming a self-aligned insulating film (6, 26a, 38, 46, 55, 65) at least on a side wall of said gate electrode (4, 24,34, 44, 54, 64);(c) forming a self-aligned metal or metal silicide film (9, 29,39,49, 57a, 57b, 57c, 67a, 67b, 67c) on a region on which an insulating film is not formed, said region including a source region (5a, 25a, 35a, 48a, 58a, 68a), a drain region (5b, 25b, 35b, 48b, 58b, 68b) and a diffusion interconnection region (5c, 25c, 35c, 48c) which is an extended part of at least one of said source region and said drain region, or prospective regions for said source, drain and diffusion interconnection regions; and(d) forming said source region, said drain region and said diffusion interconnection region which is the extended part of at least one of said source region and said drain region, by doping at least one time said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate any time after step (a).

Term
Term ended
Projected expiry passed 9 December 2001, 24.8 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
1 sheet
Sheet 1
Every citation, both ways
| Document | Relation | Office | Category | Cited during |
|---|---|---|---|---|
| FR2358750A1 | Cites | France | A | Search report |
| US4074300A | Cites | United States of America | Y | Search report |
| US4141022A | Cites | United States of America | Y | Search report |
| US4210993A | Cites | United States of America | A | Search report |
| IBM TECHNICAL DISCLOSURE BULLETIN, vol. 21, no. 3, August 1978, pages 1250-1251, New York, USA V.L. RIDEOUT; "Fabricating low resistance interconnection lines and fet gates in a single step" | Non-patent | – | – | Search report |
11 members in 4 offices; this record represents the family
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 17465380 | Japan | – | |
| 17465380 | Japan | A | |
| 11705281 | Japan | – | |
| 11705281 | Japan | A |
Members11
| Document | Office | Kind | |
|---|---|---|---|
| JPS5799775A | Japan | A | |
| EP0054259A2 | European Patent Office (EPO) | A2 | |
| JPS57124476A | Japan | A | |
| JPS57124477A | Japan | A | |
| JPS5818965A | Japan | A | |
| EP0054259A3This record | European Patent Office (EPO) | A3 | |
| EP0054259B1 | European Patent Office (EPO) | B1 | |
| DE3175081D1 | Germany | D1 | |
| US4622735A | United States of America | A | |
| US4830971A | United States of America | A | |
| JPH0237093B2 | Japan | B2 |
21 legal events, as 2 offices reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | Office | |
|---|---|---|---|
| Nl: ceased due to reaching the maximum lifetime of a patentCeasedNLV7 | NLV7 | EP | |
| Patent expired after termination of 20 yearsExpiredPE20 | PE20 | GB | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Lapsed in a contracting state [announced via postgrant information from national office to epo]LapsedPG25 | PG25 | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| Annual fee paid to national office [announced via postgrant information from national office to epo]GrantedPGFP | PGFP | EP | |
| No opposition filedOpposition26N | 26N | EP | |
| No opposition filed within time limitOppositionORIGINAL CODE: 0009261PLBE | PLBE | EP | |
| Information on the status of an ep patent application or granted ep patentGrantedSTATUS: NO OPPOSITION FILED WITHIN TIME LIMITSTAA | STAA | EP | |
| Corresponds to:REF | REF | EP | |
| Fr: translation filedET | ET | EP | |
| Designated contracting statesAK | AK | EP | |
| (expected) grantORIGINAL CODE: 0009210GRAA | GRAA | EP | |
| Party data changed (applicant data changed or rights of an application transferred)RAP1 | RAP1 | EP | |
| Designated contracting statesAK | AK | EP | |
| Search report despatchedORIGINAL CODE: 0009013PUAL | PUAL | EP | |
| Request for examination filed17P | 17P | EP | |
| Designated contracting statesAK | AK | EP | |
| Public reference made under article 153(3) epc to a published international application that has entered the european phaseORIGINAL CODE: 0009012PUAI | PUAI | EP |
Numbers
- Publication
- 0054259
- Application
- 81110288
Titles3
- English
- Method of manufacturing a semiconductor device of the MIS type
- French
- Procédé de fabrication d'un dispositif semiconducteur du type MIS
- German
- Verfahren zur Herstellung einer Halbleiteranordnung vom MIS-Typ
Classification
- CPC, 9
- H10D30/0223
- H10D64/259
- H10D64/62
- H10D64/663
- H10D30/0227
- H10D30/60
- H10P76/408
- H10P76/4085
- H10W20/01
- IPC, 5
- H01L21 336
- H01L29 45
- H01L29 49
- H01L29 78
- H10P76 40
Designated states1
- Contracting states, 1
- Netherlands (Kingdom of the)