Sampled signal generation circuit

A sampled data generation circuit includes a voltage controlled oscillator (12) for producing an output signal with a frequency variable according to a control voltage, a sample and hold circuit (10) for sampling and holding an analog input signal in response to the output signal from the voltage controlled oscillator (12), and a control circuit (14) for detecting the difference between two successive sampled data generated from the sample and hold circuit (10) and supplying the voltage controlled oscillator (12) with an output signal corresponding to the difference as the control voltage, thereby controlling the voltage controlled oscillator (12) so that the greater the difference, the higher the frequency of the output signal from the voltage controlled oscillator (12) is.