Charge transfer phase inverter and differential amplifier comprising such a device.

0001. The present invention relates to a charge transfer phase reversing device.

0002It also relates to a differential amplifier comprising such a device.

0003When processing by charge transfer of analog signals, it is often necessary to produce signals in phase opposition. This is the case, for example, in the differential amplifiers used in particular in the output stage of the charge transfer filters.

0004In the prior art, the signal to be inverted is generally converted into voltage, then the phase inversion is created into voltage and the voltage variations are re-injected into charges in the charge transfer device.

0005The conversions of charges into voltage and vice versa have the disadvantage of being not very linear and of gain which is difficult to reproduce. On the other hand, the devices making it possible to carry out these conversions and the phase-to-voltage inversion are generally bulky and of high consumption.

0006The present invention relates to a device which performs the phase inversion of a signal while remaining in the field of loads.

0007This device has the advantage of being easily integrated into a more complex charge transfer device. It allows to obtain with good precision two signals in phase opposition. In a preferred embodiment, this device requires, in addition to the DC input voltage which is applied to several transfer and storage electrodes, only three clock signals which ensure the transfer of the charges, which increases its simplicity and its precision.

0008The device according to the invention makes it possible in particular to produce a differential amplifier which does not require conversion of the charges into voltage and which therefore has advantages from the point of view of consumption and of the differential amplifiers according to known art. integration.

0009The present invention relates to a charge transfer phase reversing device which receives an input voltage V_e constituted by the superposition of a direct voltage V_o and of a variable voltage over time and sampled v_e and which includes means making the difference between the quantity of charges double that corresponding to the direct voltage V_o and the quantity of charges corresponding to each sample of the variable voltage V_e superimposed on the DC voltage. Thus packets of charges are produced corresponding to a voltage in phase opposition with the input voltage V. e

0010The input voltage V is written: V_e = V_o ± V_e. After injection into the device, the quantity of charges Q_e corresponding to the voltage V_e is written: Q_e = Q_avg ± q_e. According to the invention, means make the difference between² Q avg and Q. _e

0011When _Qe is greater than Q_avg (Q_e = Q_avg⁺ q_e), the result of this subtraction is written:<maths id="math0001" num=""><img file="EP0021908A1_D0001.tif" /></maths>

0012When Q_e is inferior to ^Q_moy (Q_e^{= Q}_moy ^- q_e), the result of this subtraction is written:<maths id="math0002" num=""><img file="EP0021908A1_D0002.tif" /></maths>

0013The device according to the invention therefore makes it possible to obtain, from a quantity of charges Q_avg + q_e, a quantity of charges Q_avg - qe and vice versa. A phase inversion on the charges is therefore carried out.

0014The following description gives, by way of example, an embodiment of the means performing the subtraction according to the invention.

0015Other objects, characteristics and results of the invention will emerge from the following description, given by way of nonlimiting example and illustrated by the appended figures which represent:<ul id="ul0001" list-style="none"><li>- Figures 1a, b, c, a cross-sectional view of an embodiment of the device according to the invention and diagrams illustrating its operation;</li><li>- Figure 2, a cross-sectional view showing the device shown in Figure 1a inserted in a more complex load transfer device and a diagram illustrating the transfer of loads;</li><li>- Figures 3a, b, c, signal diagrams which may be applied to the device shown in Figure 2;</li><li>- Figure 4, a top view of a device similar to that of Figure 2;</li><li>- Figure 5, a top view of a differential amplifier according to the invention.</li></ul>

0016In the different figures, the same references designate the same elements, but, for reasons of clarity, the dimensions and proportions of the different elements have not been respected.

0017Figure 1a shows a cross-sectional view of an embodiment of the device according to the invention.

0018The device according to the invention is produced on a semiconductor substrate 1, of type P silicon in the example, covered with an insulating layer, of silicon oxide in the example, which is not shown in the Figure 1a. On this insulating layer, alternate electrodes for storage and transfer of charges which are arranged substantially normally in the direction of propagation of the charges. The transfer electrodes are deposited on an extra thickness of insulation which is not shown in FIG. 1a.

0019As is known, this arrangement has a double function, on the one hand ensuring the continuity of the potentials created in the semiconductor 1, and on the other hand imposing a single transfer direction for the charge carriers.

0020This structure comprising an extra thickness of insulator can be replaced by an overdoping of the substrate, by implantation of ions, ensuring the same functions.

0021In FIG. 1a, only the transfer and storage electrodes constituting the phase reversing device according to the invention have been shown, with the exception of the transfer and storage electrodes ensuring only the transfer of the charges.

00221 In the embodiment of the device according to the invention shown in FIG. 1a, the means performing the subtraction include in particular a first and a second storage electrodes G1 and G₂ electrically connected at a point P which can be connected to the DC voltage V₀ or which can be left floating, i.e. not be connected to any voltage source. In the figure, a switch K symbolically represents the two possibilities of polarization of the point P.

0023Upstream of the first storage electrode, in the direction of charge transfer indicated by an arrow, is a transfer electrode G_o1, brought to a constant voltage V_T, and a charge injection diode D_e1, connected to a variable voltage V_D.

0024The operation of a device constituted by the electrodes G is known in the prior art.₁, G₂, G_o1 and by the diode D_e1.

0025First, point P is connected to the constant voltage V_o. Before the charges arrive under the storage electrode G₂, the voltage V_D applied to diode D_e1 is successively lower then greater than the surface potential V_ref under the transfer electrode G_o1 connected to V_T. A quantity of reference charges Q_ref is thus stored under the storage electrode G₁.

0026Secondly, the point P is left floating. When a quantity of charges Q arrives_e under G₂, the surface potential under G₁ is kept constant at the value V_ref by G_o1 and the excess charge is sent under the diode D_e1. We show that the quantity of charges under D_e1 at the end of this second time is substantially equal to Q_ref - Q_e (this requires neglecting the depletion capacity under G₂ in front of the oxide capacities of _G1 and G₂).

0027The phase reversing device according to the invention further comprises a third storage electrode G_e located upstream of the second, G₂, according to the direction of charge transfer indicated by an arrow. This third storage electrode G_e receives input voltage V_e at a point O. Between the point O and a point N, is connected a resistor R. Between the point O and a point M, is connected a capacitor C. The DC input voltage_o is applied at point N and the variable voltage over time and sampled V_e is applied at point M.

0028Upstream of the third storage electrode G in the direction of charge transfer, there is a transfer electrode G_Oe scope, like G_o1, at constant voltage V_T and a charge injection diode D_e2, worn as D_e1, at variable voltage V_D.

0029According to the invention, it is recalled that the subtraction between the quantity of charges double that of the DC voltage V₀ and the quantity of charges corresponding to each sample of the variable voltage V_e superimposed on the DC voltage. So we inject under G₁ a quantity of charges double that corresponding to the DC voltage V_o, before the arrival of a sample under the second storage electrode G₂ and while point P is at constant voltage V_o. The surface potential is then kept constant under the first storage electrode G₁, when a sample arrives under the second storage electrode G₂ and while the point P is left floating.

0030In Figures 1a, b, c, there are shown diagrams illustrating the operation of the device according to the invention. These diagrams represent the evolution of the surface potential φ_s in substrate 1. The hatched areas indicate the presence of minority carriers.

0031Figure 1a illustrates the injection of a quantity of charges Q_ref under electrode G₁ and of a quantity of charges Q under the electrode G. Charge injection under the G electrodes₁ and G₂ is done the same way. The transfer electrodes G_o1 and G_oe are connected to the constant voltage V_T which fixes the surface potential under G₁ and G_e at maximum value V_ref. Voltage V_D applied to diodes D_e1 and D_e2 successively takes a value lower then higher than the surface potential V_ref, which causes the storage of the quantities of charges Q_ref and Q_e under G₁ and G_e. This variation in voltage V_D applied to the diodes occurs on the one hand while the point P is connected to the constant voltage V_o and before the arrival of a sample under the second storage electrode G₂, and on the other hand, while a sample of the variable voltage v_e is applied at point M.

0032According to the invention, the quantity of charges stored under G₁, Q_ref must be equal to twice the quantity of charges Q_avg corresponding to the DC input voltage V_o.

0033The quantity of charges Q injected under the electrode G_e which receives the voltage V = V_o ± v_e writes:<maths id="math0003" num=""><img file="EP0021908A1_D0003.tif" /></maths>is a constant which depends on V_ref and of physical characteristics which are the same for the whole of the charge transfer device on which the reverser is produced and where C_e represents the oxide capacity of electrode G_e. The quantity of charges Q_avg therefore equal (V_o - V_at) VS_e.

0034On the other hand, the quantity of charges Q_ref injected under the G electrode₁ which receives the voltage V_o writes:<ul id="ul0002" list-style="none"><li>Q_ref= (V_O - V_AT) VS₁, where C₁ represents the oxide capacity of electrode G₁.</li></ul>

0035When point P receives a constant voltage equal to V_o, just choose the oxide capacity C₁ double of C _e so that Q_ref equals 2 Q_avg, which is the desired result.

0036To choose the oxide capacity C₁ double of C_e, we generally give to the storage electrode G₁ an area double that of G_e, which can be done with good accuracy.

0037The accuracy of the device according to the invention depends in fact on the equality of charges 2 Q _avg and Q_ref.

0038It is possible, to reduce the number of bias voltages of the device according to the invention to choose V_T, the constant voltage applied to the transfer electrodes G_o1 and G_Oe, equal to the DC input voltage V_o.

0039After injection of the quantity of charges Q_ref = 2 Q_avg, point P is left floating. The surface potential under the first storage electrode G₁ is kept constant at the value V_ref by the transfer electrode G_o1 brought to constant voltage V_T (which can be equal to V_o). The injection diode D_e1 is brought to a voltage higher than the surface potential V_ref. The quantity of charges Q_e is transferred under the second storage electrode G₂. When the quantity of charges Q arrives_e under G₂, an equivalent quantity of charges is subtracted from Q_ref stored under G₁ and discharged to diode D_e1. It therefore remains under G₁ the quantity of charges Q_S such as: Q_S = 2 Q_avg - Q_e, which is the desired result.

0040.Figure 1a represents the surface potentials under the device according to the invention in the case where V equals V_o and in the case where the surface of the electrode G₁ is double that of the G electrode_e.

0041The input voltage V_e may vary around V_o between Va and 2 V_o - Goes. The surface potential under Geav before the charge injection can therefore vary by the same amount Δφ₀ around φ_o.

0042The variation in surface potential Δφ under the second storage electrode G₂ depends, for a quantity of charges Q_e given, relative values ​​of the oxide capacities C₁ and C₂ storage electrodes G₁ and G₂.

0043As a first approximation, the depth of the potential well ΔV_e under electrode G_e from level V_ref is written: ΔV_e ≃ <maths id="math0004" num=""><img file="EP0021908A1_D0004.tif" /></maths>.

0044Writing the charge relationships at point P and under the electrode G₂, after injection of the quantity of charges Q_ref under electrode G₁ and after injection of the quantity of charges Q_e under electrode G₂, allows to obtain the following expression of Δφ, in which the depletion capacity under G₂ is neglected:;<maths id="math0005" num=""><img file="EP0021908A1_D0005.tif" /></maths>

0045The potential well created under the second storage electrode G₂ must be sufficient for the maximum quantity of charges Q_max, injected under G_e and corresponding to a well depth under _Ge before injection of charges equal to φ_o + Δ φ_o, can be stored there.

0046To minimize the variation in surface potential Δφ under G₂, we choose the oxide capacity of G₂ (and therefore the area of ​​G₂) such as :<maths id="math0006" num=""><img file="EP0021908A1_D0006.tif" /></maths>

0047FIGS. 1a, b, c represent the surface potentials in the substrate in the case where:<maths id="math0007" num=""><img file="EP0021908A1_D0007.tif" /></maths>

0048In this case and always as a first approximation, the variations in surface potential under G₂, Δφ, are equal to the variations in surface potential under G_e, Δ φ_e.

0049FIG. 1b represents the surface potentials in the case where the quantity of charges injected Q_e equal :<maths id="math0008" num=""><img file="EP0021908A1_D0008.tif" /></maths>

0050FIG. 1c represents the surface potentials in the substrate in the case where<maths id="math0009" num=""><img file="EP0021908A1_D0009.tif" /></maths>

00512 shows a cross-sectional view showing the device shown in Figure 1a inserted in a more complex load transfer device, as well as a diagram illustrating the transfer of loads.

0052In FIG. 2, couples of the transfer electrode G_o- storage electrode G, which ensures the transfer of charges, are added to the device according to the invention shown in FIG. 1a between the grids G_e and G₂, after electrode G₂ and after the G electrode₁.

0053In the example shown in Figure 2, the transfer electrode G₀₂ preceding G₂ is brought to a constant voltage Vu lower than V_o to increase the depth of the well under G2.

0054FIGS. 3a, b, c show diagrams of signals which can be applied to the device shown in FIG. 2.

0055These clock signals φ₁, φ₂ and φ₃ are periodic functions of the same period T whose amplitude varies between a low level and a high level.

0056The signals φ₁ and φ₂ are practically in phase opposition, with however a slight overlap at the high level as is customary in the field of charge transfers. The signal φ₃ goes high while φ₁ is already there and returns to the low level before φ₁.

0057The signal φ₁ is applied to diodes D_e1 and D_e2, as well as to a transfer electrode-storage electrode couple on two, and in particular to that following the electrode G_e.

0058The signal φ₂ is applied to the MOS transistor T₁, connected between point P and voltage V_o, and which replaces the switch K shown in FIG. 1a. The signal φ₂ is also applied to a transfer electrode-storage electrode pair out of two, and in particular to that which precedes the electronic pair _trode transfer _G02- storage electrode G₂.

0059Finally, the signal φ₃ is applied to the pair of electrodes following the storage electrodes G₁ and G2.

0060At time t₁, the signal φ₂ is high and the signals φ₁ and φ₃ are at the low level. The surface potentials in the substrate are shown in Figure 2 in solid lines. G electrodes₁ and G₂ receive by transistor T₁ which is made conductive the direct voltage V_o. The passage of φ₁ at the low level causes the injection by the diodes of the quantities of charges Q_ref and Q_e under G₁ and Ge These charge quantities are blocked under G₁ and G_e by the pairs of electrodes along G₁ and G_e which are at the low level.

0061At time t₂, the signal φ₁ is high and the signals φ₂ and φ₃ are at the low level. The potentials in the substrate are shown in broken lines in FIG. 2. The pair of electrodes preceding the pair of transfer electrodes G_o2- storage electrode G₂ ensures the transfer under G₂ of the quantity of charges Q_e, and thus the formation of the quantity of charges Q_avg Q_e, corresponding to the signal reversed in phase under the electrode G₁.

0062At time t₃, the signals φ₁ and φ₃ are high and the signal φ₂ is at the low level. The surface potentials in the substrate are shown in dotted lines in FIG. 2. The pairs of electrodes along G₁ and G₂, which are brought to the high level, ensure the evacuation of the charges stored under G₁ and under G₂. The device according to the invention is thus ready to receive at time t₁ according to a new quantity of charges Q_e corresponding to a sample of the input voltage under the electrode G. e

0063The accuracy of the device according to the invention depends on:<ul id="ul0003" list-style="none"><li>- the precision with which the surface of the G electrode can be produced₁ double that of electrode G;</li><li>- the importance of the depletion capacity under the electrode G₂ which is considered negligible compared to the C oxide capacities₁ and C₂ G electrodes₁ and G₂;</li><li>- but above all the importance of the stray capacitance at point P which is due in particular to the overlap of the transfer and storage electrodes and to the MOS T transistor₁ which is connected to point P.</li></ul>

0064FIG. 4 represents a top view of a device similar to that of FIG. 2.

0065In the device shown in FIG. 4, the storage electrodes G_eand G₂ on the one hand, and G₁on the other hand, are carried out in two parallel charge transfer channels 2 and 3. Channel 2 delivers quantities of charges corresponding to the input voltage V_e and channel 3 delivers quantities of charges corresponding to the input voltage reversed in phase. The device shown in FIG. 4 has the advantage, from the point of view of practical implementation, of having a reduced bulk.

0066FIG. 5 represents a top view of a differential amplifier according to the invention.

0067The device shown in FIG. 5 includes a phase reversing device as previously described, which reverses the phase of one of the two input voltages of the differential amplifier, ie V_e this tension.

0068The differential amplifier according to the invention comprises several charge transfer channels isolated by isolation and parallel diffusions. It notably includes channels 2 and 3 identical to those shown in FIG. 4. Channel 2 receives the input voltage to be inverted V and transfers the charge to be inverted Q_e. Channel 3 generates the reverse signal load - Q and transfers it. The differential amplifier according to the invention also comprises a channel 4 which receives the second input voltage of the differential amplifier V_e + and which transfers the charge Q_e⁺. Finally, a channel 5 joins channels 3 and 4 and adds the charges Q_e⁺ and Q_e^-. These charges are transferred to channel 5 and read on floating diodes D₁ and D₂. connected to a follower stage, as is known.

0069Channel 4 includes a charge injection device identical to that of channel 2. This device is notably constituted by a charge injection diode D_e3 and a storage electrode G '_e to which the input voltage V is applied_e⁺ of the differential amplifier.

0070We have previously seen that the accuracy of the phase reversing device according to the invention depends above all on the stray capacitance Cp existing at point P where the first and second storage electrodes G are connected₁ and G₂.

0071The parasitic capacity Cp causes the quantity of charges which is evacuated from G₂ when Q arrives_e^-under G₁ is not equal to Q_e^- but at α Q_e^- which is defined:<maths id="math0010" num=""><img file="EP0021908A1_D0010.tif" /></maths>

0072The initial charge quantity Q_initial under G₁ is equal to 2 Q_avg. The quantity of charges Q_final under G₁ is therefore expressed:<maths id="math0011" num=""><img file="EP0021908A1_D0011.tif" /></maths><maths id="math0012" num=""><img file="EP0021908A1_D0012.tif" /></maths>

0073The final charge quantity under the G electrode₁ therefore consists of a constant term (2-α) Q_avg and of a variable term + αq_e -. The error in^gentered by the coefficient α on the variable term can be compensated by injecting the quantity of charges Q⁺ on channel 4 with an attenuation factor α

0074It suffices for this that the ratio of the surfaces, or of the lengths when the widths are constant, which is generally the case, of the two storage electrodes G_e'and G_e to which the two input voltages of amplifier V are applied_e⁺ and V_e^-, or equal to:<maths id="math0013" num=""><img file="EP0021908A1_D0013.tif" /></maths>

0075In this case, in fact, the quantity of charges Q injected into channel 4 is written:<maths id="math0014" num=""><img file="EP0021908A1_D0014.tif" /></maths>

0076The resulting charge in channel 5 which adds up the charges transferred in channels 3 and 4 becomes:<maths id="math0015" num=""><img file="EP0021908A1_D0015.tif" /></maths>

0077The differential amplifier according to the invention therefore has a rejection in common mode whose efficiency depends only on the precision with which the parasitic capacitance C can be determined._p and therefore the coefficient α.