Semiconductor processing method and gate stack

TECHNICAL AREA

0001The This invention relates to semiconductor manufacturing process of gate stacks.

BACKGROUND

0002Semiconductor manufacturing processes frequently use structured layers of materials to form a transistor gate structure produce. The<figref idrefs="S9">1</figref> illustrates a semiconductor wafer fragment <figref>10</figref> as preliminary step of a gate structure patterning process is from the prior art. The semiconductor wafer fragment <figref>10</figref> includes a substrate <figref>12</figref> with a stack <figref>14</figref> from materials the above are prepared. substrate<figref>12</figref> may, for example a silicon monocrystal include that easily with a P-type background dopant doped. To facilitate the interpretation of the following claims, is the term "semiconductor substrate" are defined in such a way that any semiconductor material construction , wherein while the semiconductor bulk, such as semiconductor wafer (either alone or in units that contain other materials) and Semiconductor material layers (either alone or in units Other materials included) with included, but the above expression is not limited thereto. The term "substrate" refers on any support structure, wherein thereby the, semiconductor substrates are described above included, but the above expression is not limited thereto.

0003Of the stack <figref>14</figref> comprises a gate oxide layer <figref>16</figref>a polysilicon layer <figref>18</figref>, A metal silicide <figref>20</figref>. an oxide layer <figref>22</figref>, A nitride layer <figref>24</figref>a layer <figref>26</figref> from anti-reflective material, and a layer of photoresist <figref>28</figref>, The gate oxide layer <figref>16</figref> may include, for example silicon dioxide and forms an insulating layer between the polysilicon layer <figref>18</figref> and the substrate <figref>12</figref>, The polysilicon layer may eg doped include polysilicon and is ultimately in a first conductive Part of a transistor gate structure.

0004The silicon layer <figref>20</figref> comprises a metal silicide, such as Tungstensilizid or titanium silicide, and is ultimately a second include conductive part of a transistor gates. Before using the silicide <figref>20</figref> as part of a conductive transistor gates the silicide is typically annealed to the crystallinity and conductivity the silicide layer <figref>20</figref> to improve. En such Annealing comprises eg a temperature between about 800 ° C and about 900 ° C for about 30 minutes with a nitrogen (N2) -purge.

0005If silicide <figref>20</figref> gaseous oxygen during the Annealing is exposed can oxidize the silicide what conductivity the layer may adversely affect. The oxide layer<figref>22</figref> becomes Advantageously, prior to annealing to the silicide <figref>20</figref> provided. The oxide layer <figref>22</figref> may comprise silicon oxide. A Another function of the oxide layer <figref>22</figref> on the silicide layer is to act as an insulating layer to prevent an electrical contact of silicide layer <figref>20</figref> with others conductive layers, the last close to the silicide layer <figref>20</figref> educated have been.

0006The nitride <figref>24</figref> may comprise, for example, silicon nitride, and is provided to further the conductive layers <figref>18</figref> and <figref>20</figref> from other conductive layers isolate the ultimate in close layers <figref>18</figref> and <figref>20</figref> can be formed. The nitride layer<figref>24</figref> is a thick layer (a typical thickness may in the order from a few tens of nanometers and a few hundred nanometers there are a few hundred or a few thousand Angstroms) and can print on the underlying layers exert. It is in accordance with another feature of the oxide layer <figref>22</figref>, the of the nitride layer <figref>24</figref> on the underlying layers <figref>18</figref> and <figref>20</figref> applied pressure to reduce.

0007The Anti-reflection material layer <figref>26</figref> can, for example, an organic comprising layer on the nitride layer <figref>24</figref> applied is. Alternatively, the layer<figref>26</figref> an inorganic deposited Anti-reflection coating layer such as Si_xN_yO_z: H, with x 0.39 to 0.65, y be from 0.02 to 0.56 and z 0.05 to 0.33. In the Practice, the layer can be inorganic substantially, wherein the term " substantially inorganic "means that the layer may contain a small amount of carbon (less Weight than. 1%) For example, when used in an alternative way organic precursor be, the layer 1 can wt.% containing carbon or more.

0008The Photoresist layer <figref>28</figref> can have either a positive or a negative photoresist include. The photoresist layer<figref>28</figref> becomes structured by the layer of light by a masked light source is exposed. The mask contains transparent and opaque elements in a photoresist layer <figref>28</figref> to define generating structure. The light-exposed areas the photoresist layer <figref>28</figref> are either soluble or insoluble in a solvent designed. If the exposed regions are soluble, a positive Image of the mask on the photoresist layer <figref>28</figref> generated and the Photoresist is termed a positive photoresist. On the other Side it is referred to as a negative photoresist, if not irradiated Areas by the solvent dissolved are and a negative image is created.

0009It can possibly the difficulty may arise that when the photoresist layer <figref>28</figref> a radiation is exposed, waves of radiation through the photoresist <figref>28</figref> in a layer below the photoresist spread and then back through the photoresist spread reflected to, with other waves of radiation which propagate through the photoresist to interact. The reflected waves can constructive and / or destructive with other waves interact to periodic changes the light intensity to produce the photoresist. Such changes the light intensity can to to lead, that the photoresist irregular energy doses receives through its thickness. The irregular cans can the accuracy and precision mitigate, with the transmitted one generated by a mask pattern on the photoresist is. It is an anti-reflective material<figref>26</figref> provided, to prevent waves reflected back into the photoresist layer will. The anti-reflective layer<figref>26</figref> includes materials, which absorb the radiation and / or vapors and, therefore, the reflection reduce or eliminate the radiation.

0010The <figref idrefs="S9">2</figref> shows the semiconductor wafer fragment <figref>10</figref> after the photoresist layer <figref>28</figref> by the exposure and the exposure has been structured by the solvent is to remove portions of the layer can.

0011Among Referring to <figref idrefs="S10">3</figref> is a structure of the layer <figref>28</figref> on the underlying layers <figref>16</figref>. <figref>18</figref>. <figref>20</figref>. <figref>22</figref>. <figref>24</figref> and <figref>26</figref> transferred to a structured stack <figref>30</figref> to form. Such transfer a structure of the masking layer <figref>28</figref> may by a suitable etch, such as plasma etching using one or more of the elements Cl, HBr, CF4, CH2F2, NF3 and HE are produced.

0012After the structuring of the layers <figref>16</figref>. <figref>18</figref>. <figref>20</figref>. <figref>22</figref>. <figref>24</figref> and <figref>26</figref> can they layers <figref>28</figref> and <figref>26</figref> be removed to a structured, the layers <figref>16</figref>. <figref>18</figref>. <figref>20</figref>. <figref>22</figref> and <figref>24</figref> comprehensive gate stack to obtain.

0013On continuing goal in semiconductor wafer fabrication technology is to reduce the Verarbeitungskomplexizität. one such Reduction can for example the reduction of processing steps or a reduction of in forming a particular semiconductor structure use layers include. Accordingly, it is desirable alternative to develop methods for the production of patterned gate stacks, where fewer steps and! or layers than in the embodiment from the reference to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> described Prior art are used.

EPIPHANY THE INVENTION

0014The This invention relates to a semiconductor processing method as defined in Claim first is In one aspect, a metal silicide layer formed on a substrate. An anti-reflection material layer is a chemical gas phase in physical contact with the metal silicide layer is deposited. A photoresist layer on the anti-reflection material layer applied and patterned photolithographically.

0015In In another aspect of a gate stack forming process, as defined in claim 1, a is at Polysilizidschicht a substrate made. A metal silicide layer is formed on the Polysilicon layer. An anti-reflection material layer is deposited on the metal silicide layer. A silicon nitride layer on the anti-reflection material layer and a photoresist layer formed on the silicon nitride layer. The photoresist layer is photolithographically patterned to a masking layer the photoresist layer to form. A structure will be masked by the Layer on the silicon nitride layer, the anti-reflection layer of material, the metal silicide layer and the polysilicon layer transferred, the silicon nitride layer, the anti-reflection layer of material Metal silicide layer and the polysilicon layer into a gate stack structuring.

0016In yet another aspect, a gate stack, as in the Claim 10 is defined, a polysilicon layer on a Semiconductor substrate. The gate stack includes a metal silicide on a polysilicon layer, and a layer comprising silicon, Oxygen and nitrogen on the metal silicide. Also includes the gate stack comprising a silicon nitride layer on a layer Si_xN_yO_x: H.

BRIEF DESCRIPTION OF THE DRAWINGS

0017Preferred embodiments of the invention are hereinafter with reference to the following annexed located described drawings.

0018<figref idrefs="S9">1</figref> is is a fragmentary, schematic cross-sectional view of a semiconductor wafer fragment in a preprocessing step of a method from the prior Technology.

0019<figref idrefs="S9">2</figref> is a view of the wafer fragment <figref idrefs="S9">1</figref> in a Processing step of the prior art, of the the <figref idrefs="S9">1</figref> follows.

0020<figref idrefs="S10">3</figref> is a view of the wafer fragment <figref idrefs="S9">1</figref> in a Processing step of the prior art, of the the <figref idrefs="S9">2</figref> follows.

0021<figref idrefs="S10">4</figref> is is a fragmentary, schematic cross-sectional view of a semiconductor wafer fragment in a preprocessing step of an inventive method.

0022<figref idrefs="S11">5</figref> is a view of the wafer fragment at a processing step which the <figref idrefs="S10">4</figref> follows.

0023<figref idrefs="S11">6</figref> is a view of the wafer fragment at a processing step which the <figref idrefs="S11">5</figref> follows.

BEST MODES FOR CARRYING OUT OF THE INVENTION AND DISCLOSURE OF THE INVENTION

0024A embodiment of the present invention with reference to the <figref idrefs="S10">4</figref> to <figref idrefs="S11">6</figref> described. In the description of the embodiment the <figref idrefs="S10">4</figref> to <figref idrefs="S11">6</figref> is a similar numbering as in the processing described above in the prior art, the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> used, with differences that will be indicated by a suffix "a" or some other numbering.

0025Among Referring to <figref idrefs="S10">4</figref> is a semiconductor wafer fragment <figref>10a</figref> in a preprocessing shown. The wafer fragment<figref>10a</figref> includes, as the wafer fragment <figref>10</figref> the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref>, on substratum <figref>12</figref>, A gate oxide film <figref>16</figref>, A polysilicon layer <figref>18</figref> and a silicide <figref>20</figref>, In contrast to the above with respect on the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> described processing from the prior art is a Si_xN_yO_z: H layer comprising <figref>50</figref> on the silicide <figref>20</figref> formed and in the illustrated preferred embodiment is the said layer in physical contact with the silicide layer <figref>20</figref> educated. The layer <figref>50</figref> so replaces the oxide layer <figref>22</figref> the embodiment from the prior art, the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref>,

0026The layer <figref>50</figref> is preferred to by chemical deposition a CVD method. The layer<figref>50</figref> can eg by a CVD process using SiH4 and N2O as a precursor in prepared a reaction chamber at a temperature of about 400 ° C will. Such deposition may be either with or without an in Reaction chamber vorliegendes plasma are made. exemplary conditions for depositing the layer <figref>50</figref> include the inflow of SiH4 in a plasma enhanced CVD chamber at a rate of about 40 standard cubic meters per Minute (SCCM) to about 300 SCCM (preferably about 80 SCCM), N2O at a rate of about 80 SCCM to about 600 SCCM (Preferably about 80 SCCM), He at a rate of about 1300 SCCM to about 2500 SCCM (preferably about 2200 SCCM), with a pressure in the chamber of about 532 Pa (4 Torr) to about 865 Pa (6.5 torr) and a power for the chamber of about 50 watts to about 200 watts (preferably 100 watts).

0027The exemplary conditions described above can also the inflow of nitrogen gas (N2) into the reaction chamber with an amount of more than 0 SCCM to about 300 SCCM, and preferably at a rate of about 200 SCCM, and / or the inflow of NH3 in the reaction chamber at a include amount of more than 0 SCCM to about 100 DSCCM.

0028at an exemplary composition of the Si_xN_yO_z: H layer <figref>50</figref> is x = 0.5, y = 0.37 and z = 0.13. The relative values ​​of x, y and z, and the hydrogen content can be tuned to the Absorbierungskennzeichen the deposited Material to change. The layer <figref>50</figref> preferably has a thickness of approximately 25 nm (250 angstroms) to about 65 nm (650 angstroms).

0029The layer <figref>50</figref> is preferably on the Silzidschicht <figref>20</figref> in front whose tempering provided. The layer<figref>50</figref> is so the above-described function of the oxide layer <figref>22</figref> (described with reference to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref>), the silicide <figref>20</figref> from the effects of gaseous oxygen, during the protect tempering the silicide.

0030A silicon nitride <figref>24</figref> is on the layer <figref>50</figref> educated, and may be in physical contact with the layer <figref>50</figref> be. about how it above in the section the background of this disclosure has been described, the silicon nitride layer <figref>24</figref> Pressure on the underlying Layers exert. The layer <figref>50</figref> the function of the silicon dioxide layer <figref>22</figref> of Prior art (described with reference to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref>) fulfill, the adverse effects of such pressure on the underlying conductive layers <figref>20</figref> and <figref>18</figref> to reduce. The silicon nitride <figref>24</figref> may be either before or after the Annealing the silicide layer on the layer <figref>50</figref> educated will.

0031A Photoresist layer <figref>28</figref> is on the silicon nitride <figref>24</figref> educated. In contrast to with reference to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> described embodiment, is known from the prior art between the silicon nitride layer <figref>24</figref> and the photoresist layer <figref>28</figref> no anti-reflection material layer educated. Instead, layer<figref>50</figref> preferred to use, to assume the function of an anti-reflection material layer. The nitride layer<figref>24</figref> is Specifically, transparent the radiation for patterning the photoresist layer <figref>28</figref> used is. Accordingly, the radiation penetrates the generally the photoresist layer <figref>28</figref> also penetrates the silicon nitride <figref>24</figref> and then enters into the layer <figref>50</figref> on. Preferably the stoichiometry of silicon, oxygen and nitrogen of layer <figref>50</figref> in suitable Manner matched to the radiation layer <figref>50</figref> reached to prevent, in the photoresist layer <figref>28</figref> reflected back to become. Such coordination of the stoichiometry may be made by the skilled person the prior art known methods can be made. On Another way the vote of the layers <figref>24</figref> and <figref>50</figref> to describe it is that the layers <figref>24</figref> and <figref>50</figref> in the thickness by the thickness of one or both layers <figref>24</figref> and <figref>50</figref> Voted is) and in the stoichiometry (The stoichiometry the layer <figref>50</figref> is tuned) can be tuned so that the reflection back into the above lying photoresist layer is minimized.

0032Among Referring to <figref idrefs="S11">5</figref>, The photoresist layer <figref>28</figref> structured a patterned mask on a the layers <figref>16</figref>. <figref>18</figref>. <figref>20</figref>. <figref>50</figref> and <figref>24</figref> comprehensive stack <figref>60</figref> to form. Referring to<figref idrefs="S11">6</figref>. is a structure of the photoresist layer <figref>28</figref> to stack <figref>60</figref> transfer (<figref idrefs="S11">5</figref>) Is a structured, the layers <figref>16</figref>. <figref>18</figref>. <figref>20</figref>. <figref>50</figref> and <figref>24</figref> comprehensive Gate stack <figref>70</figref> to form. Such a transfer of a structure of the layer <figref>28</figref> can be carried out by, for example a plasma etching using one or more of the elements or compounds Cl, HBr, CF4, CH2F2, He and NF3 performed. The photoresist layer<figref>28</figref> can then of the gate stack <figref>70</figref> be removed. Subsequently the source and drain regions implanted adjacent the gate stack, and it can use the sidewalls the gate stack sidewall spacers are provided, to the construction of the gate stack from Trasistorgates accomplish.

0033the The method of the present invention, the complexity in relation to the above with reference to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> described gate stack forming process reduced from the prior art. The method of the present Invention, specifically, a single layer (<figref>50</figref>) Use, to the various functions to the silicide during to protect annealing, whereby the pressure of a silicon nitride layer thereon is reduced, and reducing the light reflections of a lying thereon layer during photolithographic processing. The method of the present The method may correspondingly an entire layer (antireflection layer <figref>26</figref> the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref>) with respect to the with respect to the <figref idrefs="S9">1</figref> to <figref idrefs="S10">3</figref> described eliminate. Such elimination of a layer also eliminated with the formation and removal of the layer associated manufacturing steps. The method in question, the present invention can more effectively be semiconductor manufacturing processes as the processes from the prior of the technique.