Wireless unit for a time division multiple access system

The present invention relates to a radio transmission apparatus designed for a time division multiple access method (hereinafter abbreviated as "TDMA") for use in mobile communication technology, and more particularly to a TDMA radio transmission apparatus used for a frequency division duplex method (hereinafter abbreviated designed as "FDD") using different frequencies for transmission and reception, and to a two-mode radio transmission system which makes it possible to use the FDD method and a time division duplex method (hereinafter abbreviated as "TDD") in which the separation of transmission and reception by time discretion occurs in a single device.

In recent years, the desire for mobile telecommunications services, such as the car phone to the ship's phone, the aircraft phone or the train phone was born. Therefore, various communication systems have been proposed. A TDMA system, which is one of the hitherto proposed systems, is a system in which a plurality of mobile station base stations use the same frequency in a time division multiplexing manner. Since the TDMA system in detail z. As described in "Digital Mobile Communication", published by Kagaku Shinbunsha, reviewed by Moriji Kuwahara, pages 62 to 69, a description of the TDMA system is omitted here.

In Patent Abstracts of Japan, Vol. 015, No. 229 (E-1076), Jun. 11, 1991, and JP-A-03 066232 (Fujitsu Ltd.), Mar. 20, 1991, a transceiver for the Communication on a vehicle revealed. In order to reduce the loss of the transmission signal and the received signal, a band-pass filter with a large gradient is selected in the attenuation in the FDMA system. Transmission and reception are applied at different times, and a low-loss, small-gradient band-pass filter is selected in the attenuation in the TDMA system.

US Pat. No. 5,267,233 (Bauerschmitt Werner, November 30, 1993) describes a radio apparatus for an FDM-TDM radio communication apparatus in which a first sub-oscillator is provided in the transmission apparatus connected to the transmission mixer, and during the reception process, the transmission path becomes between the transmission mixer and the main mixer oscillator interrupted by a switching device. Switching off the transmission frequency can also be achieved by interrupting the transmission path between the transmission mixer and the first auxiliary oscillator or between the transmission mixer and the power supply unit of the radio.

A conventional TDMA radio transmission apparatus and the application of the TDD system to separate transmission and reception will now be described with reference to the drawings. Fig. 7 is a block diagram showing a conventional TDMA radio transmission apparatus adapted to the TDD system. As shown in FIG. 7 is shown, when a signal is received, a frequency of 1895.95 MHz to 1917.95 MHz, which is the receiving frequency fR for the corresponding subscriber, is selected from a high-frequency band pass filter 3 and then applied to a high-frequency amplifier 4 via an antenna switch 2, which is connected to the terminal 2r, so that the received signal is amplified. Then, the selectivity of the amplified signal is further increased by a high-frequency band pass filter 5 and then mixed by a converter 6 having the first local oscillator frequency fL1 of 1646.85 MHz to 1669.65 MHz transmitted via the contact 7r of a transmission / reception switch 7 from a first local oscillator 8 is supplied, and thus converted into a first intermediate frequency fR1 of 248.3 MHz. Then, the selectivity of the converted signal is increased by a first intermediate frequency band pass filter 9 followed by amplification by a first intermediate frequency amplifier 10. Then, the amplified signal is converted by a converter 11 having a second local oscillator frequency f L2 of 259.1 MHz from a second local oscillator 12 mixed and thus converted into a second intermediate frequency fR2 of 10.8 MHz. Then, the selectivity of the converted signal is increased by a second intermediate frequency band pass filter 15 and then demodulated by a demodulator 16.

When a signal is transmitted, a carrier wave from an oscillator 17 at a frequency of 248.3 MHz is modulated digitally by a modulator 19 with I and Q signals. The modulated signal is amplified by an intermediate transfer frequency amplifier 20. Then, the selectivity of the amplified signal is increased by an intermediate transfer frequency bandpass filter 21. And then the signal is mixed by a converter 22 having a first local frequency f L1 of 1646.85 to 1669.65 MHz, which is provided by a first focal oscillator 8 through the contact 7t of the transmission / reception switch 7, and so on a high frequency signal fT having the same frequency as that used when a signal is received is converted. The selectivity of the high frequency signal fT is increased by a high frequency band pass filter 23 and then amplified by a high frequency amplifier 24 and a high frequency power amplifier 25, whereupon the signal can pass through the contact 2t of the antenna switch 2. Then, the selectivity of the amplified signal is increased by a high-frequency band-pass filter 3, and the signal is subsequently transmitted from an antenna 1.

The reception and transmission are switched so that the antenna switch 2 and the transmission / reception switch 7 are switched at a period considerably shorter than a voice signal period, so that transmission and reception are separated in time. As a result, transmission and reception can occur simultaneously.

A conventional TDMA radio transmission apparatus and the use of the FDD system for separating transmission and reception from each other will now be described with reference to the drawings. Fig. 8 is a block diagram showing a conventional TDMA radio transmission apparatus adapted to the FDD system. With reference to FIG. 8th For example, when a signal is received, a radio frequency signal is received by an antenna 1 and can pass through an antenna switch 2 connected to a terminal 2r, so that a reception frequency fR of 801 MHz to 826 MHz for each subscriber from a high frequency band pass filter 3 is selected, then the signal from a high-frequency amplifier 4 is received and amplified. Then, the selectivity of the amplified signal is further increased by a high-frequency band-pass filter 5. Then, the signal is mixed by a converter 6 having a first local oscillator frequency fL1 of 680 MHz to 696 MHz from a first local oscillator 8 through the contact 7r of a transmission / reception switch 7 and thus converted into a first intermediate frequency fR1 of 130 MHz. The selectivity of the converted signal is increased by a first intermediate frequency band pass filter 9 and then amplified by a first repeater 10. Then, the amplified signal is mixed by a converter 11 having a second local oscillator frequency f L2 of 129.55 MHz from a second local oscillator 12 and thus converted to a second intermediate frequency f R 2 of 450 kHz, and the selectivity of the converted signal is changed by a second Intermediate bandpass filter 12 increases. Subsequently, the signal is demodulated by a demodulator 16. When a signal is transmitted, the output of a carrier wave oscillator 17 for generating a carrier wave frequency f L of 260 MHz, which is different from the first intermediate frequency f R1, is digitally modulated by a modulator 19 with I and Q signals, so that a modulation wave having a Intermediate transmission frequency fT1 is generated. The intermediate transfer frequency fT1 is amplified by an intermediate transfer frequency amplifier 20. The selectivity of the amplified signal is increased by an intermediate transfer frequency bandpass filter 21. And then, the signal is mixed by a converter 22 having the first local frequency fL1 supplied from the first local oscillator 8 via the contact 7t of the transmission / reception switch 7 so as to be converted into a high-frequency signal having a transmission frequency fT from 940 MHz to 956 MHz, which represents the frequency of the respective subscriber. Then, the selectivity of the high-frequency signal is increased by a high-frequency band-pass filter 23, followed by amplification by a high-frequency amplifier 24 and a high-frequency power amplifier 25. Then, the selectivity of the amplified signal is increased by a high-frequency band-pass filter 26 and can then pass through a contact 2t of the antenna switch 2 to be transmitted from the antenna 1.

Similar to the circuit shown in FIG. 7, the reception and the transmission are switched so that the antenna switch 2 and the transmission / reception switch 7 are switched at a period shorter than a voice signal to transmit the transmission signal. and to switch reception frequencies. In this way transmission and reception can take place simultaneously.

A two-mode wireless apparatus incorporating the TDD system shown in Fig. 7 and the FDD system shown in Fig. 8 will be described below. Fig. 9 is a block diagram showing a conventional two-mode wireless apparatus. Referring to Fig. 9, the block diagram of the TDD system shown in Fig. 7 and that of the FDD system of Fig. 8 are combined. In addition, an operation mode switch 28 is provided between the antenna 1 and corresponding antenna terminals. The components which are the same as those shown in Figs. 7 and 8 have been given the same reference numerals and omitted from the detailed description. The frequencies that occur in each section of FIG. 9 are similar to those in the structures shown in FIGS. 7 and 8.

However, as apparent from the description of the conventional circuits, the TDD system shown in Fig. 7 and the FDD system shown in Fig. 8 must be connected to the first local oscillator 8, the second local oscillator 12 and the carrier oscillator 17. The dual mode wireless communication device shown in FIG. 9 2, requires a complicated frequency dependency and is constructed so that only the circuits used for the structures of FIGS. 7 and 8 are combined with each other. Therefore, the number of tunable oscillators is the sum of all the oscillators shown in FIGS. 7 and 8. Consequently, there arises the problem that the number of oscillators is too large and the circuit structure can not be simplified.

In recent years, intensive research and development in the field of mobile phones has been promoted and systems have been developed which operate in a variety of frequency bands. Consequently, the radio transmission section of a radio transmission apparatus must also be able to process signals in a plurality of frequency bands by one and the same circuit. Among the foregoing circuits, the band-pass filter and the transceiver circuit, which are important circuit elements in a radio transmission circuit, present a variety of problems in the processing of multiple frequency bands.

Hereinafter, a conventional two-frequency band pass filter having two frequency passbands will be described with reference to the drawings. Fig. 25 is a circuit diagram showing an essential part of a conventional two-frequency band-pass filter. Referring to Fig. 25, reference numeral 161 denotes a first band-pass filter having a center frequency of 950 MHz, and 162 denotes a second band-pass filter having a center frequency of 1.9 GHz. A common input terminal 164, a common output terminal 165, and input and output terminals of the preceding filters are connected to each other through filter switches 163. By synchronizing the aforementioned switches 163 and switching them to the first filter or the second filter, the entire band through which a passage is possible can be switched.

Now, a conventional two-frequency branching filter will be described. Fig. 26 is a circuit diagram showing an essential part of a conventional two-frequency branching filter. Referring to Fig. 26, reference numeral 171 denotes a first band-pass filter having a center frequency of 950 MHz, and 172 denotes a second band-pass filter having a center frequency of 1.9 GHz. By causing an output switch 173 to switch a common input terminal 124 and input terminals of the above-described filters, a frequency component of 950 MHz may be provided to a first output terminal 175 and a frequency component of 1.9 GHz may be provided to a second output terminal 176 become. By switching input and output, a two-frequency combiner can be built.

However, the conventional structures shown in the foregoing require both the two-frequency band pass filter and the two-frequency branching filter (combiner) to require control signals for the switches. In addition, there is a risk that the loss of the switch will degrade the overall insertion loss characteristic.

In recent years, a voltage controlled oscillator (hereinafter abbreviated as "VCO") capable of varying the frequency arbitrarily by changing the voltage applied to a varactor diode has been proposed, used in a variety of circuits, such as a PLL. Specifically, radio transmission devices of a type utilizing a plurality of frequency bands have often used a VCO with a controllable frequency band that can be used in at least two frequency bands.

With reference to the drawings, a conventional VCO with a controllable frequency band capable of operating in two frequency bands will now be described. Fig. 34 is a block diagram showing a conventional VCO having a controllable frequency band. Referring to Fig. 34, the controllable frequency band VCO includes a VCO 391 (VCO1) which oscillates in the range of a first frequency band and a VCO 392 (VCO2) which oscillates in the range of a second frequency band. The VCO1 and the VCO2 are each caused to oscillate in the corresponding band and then one of the two oscillation outputs of the frequency bands is selected by a switch 393 and fed to the output terminal.

However, the conventional controllable frequency band VCO described above requires one VCO in each desired frequency band. Since the dual-mode, time division multiplexed frequency division duplex / time duplex radio communication apparatus is adapted to different transmission and reception frequencies in each operation mode, the frequency bands of the first and second local oscillation frequencies must be changed. Therefore, the time division multiple access FDD / TDD dual mode wireless unit must be equipped with the VCOs for the desired frequency bands. As a result, the size of the circuit and the space required increase excessively while the cost increases unsatisfactorily.

In recent years, signal currents have been switched in a high frequency circuit by using switching devices such as a field effect transistor. A conventional matrix switch for switching two terminals to two common terminals, which produces a signal current between two terminals and two common terminals, will be described below with reference to a circuit diagram shown in FIG. 40.

A first terminal RF1 is connected to the drains of two field effect transistors (hereinafter abbreviated to "FET") Q11 and Q13. A second terminal RF2 is connected to the drains of two FETs Q12 and Q14. The sources of the two FETs Q13 and Q14 are connected together to be connected to the sources of the FETs Q23 and Q24.

The drain of FET Q23 and that of FET Q21 are connected to a first common terminal RFCOM1. The drain of FET Q24 and that of FET Q22 are connected to a second common terminal RFCOM2. The source of each of the transistors Q11, Q12, Q21 and Q22 is grounded. A first control terminal Vcont1 is connected through resistors R32 and R33 to the gate of FET Q12 and FET Q13. The first control terminal Vcont1 is connected to the gate of the FET Q11 and the FET Q14 through an inverter Inv1 and resistors R31 and R34.

A second control terminal Vcont2 is connected through resistors R36 and R37 to the gate of FET Q22 and FET Q23. The second control terminal Vcont2 is connected to the gate of the FET Q21 and that of the FET Q24 through an inverter Inv2 and resistors R25 and R38.

The operation of the matrix switch for switching two terminals to two common terminals with the structure described above will now be described with reference to FIG. 21, which shows a circuit corresponding to that of FIG. 40 and with reference to Table 1, which illustrates the relationship between FIG the applied control voltage and the operation of the circuit shows. Table 1

As shown in Table 1, a high (H) or low (L) potential is provided as a control voltage from the first and second control terminals Vcont1 and Vcont2. In the case where both Vcont1 and Vcont2 become high, an input signal provided from the first terminal RF1 becomes as shown in FIG. 41 to the first common terminal RFCOM1 because the transistors Q13 and Q23 have been turned on since a FET is turned on generally when the gate potential is high, and the transistors Q11, Q14, Q21 and Q24 are turned off by the inverters Inv1 and Inv2 , A signal from the second terminal RF2 is grounded because the transistor Q12 has been turned on and the transistor Q14 has been turned off, and accordingly, the signal can not be transmitted to the other common terminal. When the potentials of both Vcont1 and Vcont2 become low, one obtains the inverse relationship with that shown in FIG. 41 is shown, in which the signal from the second terminal RF2 is guided to the second control terminal RFCOM2, since the transistors Q14 and Q24 have been turned on and the transistors Q12, Q13, Q22 and Q23 have been turned off. An input signal from the first terminal RF1 is grounded because the transistor Q11 has been turned on and the transistor Q13 has been turned off. As a result, the signal can not be transmitted to the other control terminal.

Similarly, in the case where the potentials of Vcont1 and Vcont2 are L and H and in the case where they are H and L, the signal may be as shown in Table 1. Consequently, the operation as a matrix switch for switching two terminals to two common terminals is made similar to the equivalent circuit shown in FIG. 42 is shown, and in which the connection is made independently in only one pair, which consists of one of the two terminals and one of the two control terminals. The signal flow described above can also be inverted.

However, the conventional matrix switch described above for switching two terminals to two common terminals having the above-described structure requires 8 transistors arranged as shown in Fig. 40, and therefore requires an increase in the number of resistors. As a result, the structure of the circuit becomes too complicated. If you intend to increase the common connections, inevitably increases the number of transistors and therefore the control is too expensive. In addition, since two FETs are provided in series in a path from the input terminal to the common terminal of the output terminal, an extraordinary loss occurs in the transmission of the signal.

The object of the present invention is to provide a time division multiple access radio frequency duplexing radio communication apparatus and a time division multiple access FDD / TDD dual mode radio communication apparatus in which the number of oscillators is reduced and the structure of the circuit is simplified.

This object is achieved by the subject matter of claims 1 and 5. Advantageous developments of the invention are the subject of several dependent claims.

These and other objects, advantages, characteristics and uses will become more apparent from the following description when considered in conjunction with the accompanying drawings. Show it:

1 is a block diagram showing an embodiment of a time division multiple access FDD radio transmission apparatus according to the present invention;

Fig. 2 is a block diagram showing a first embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention;

Fig. 3 is a block diagram showing a second embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention;

Fig. 4 is a block diagram showing a third embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention;

Fig. 5 is a block diagram showing a fourth embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention;

Fig. 6 is a block diagram showing a fifth embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention;

Fig. 7 is a block diagram showing a conventional time division multiple access TDD radio transmission apparatus;

Fig. 8 is a block diagram showing a conventional time division multiple access FDD radio transmission apparatus;

9 is a block diagram showing a conventional time division multiple access FDD / TDD dual mode wireless unit.

Fig. 10 is a block diagram showing an essential part of a first two-frequency band pass filter;

Fig. 11 shows the impedance of first and second band pass filters to explain the operation of the structure shown in Fig. 10;

Fig. 12 is a graph showing the characteristics of the first and second band-pass filters to explain the operation of the structure of Fig. 10;

Fig. 13 is a graph showing the characteristic for explaining another operating condition of the structure of Fig. 10;

Fig. 14 is a graph showing the characteristics of the first and second band-pass filters after the impedance has changed to explain the operation of the structure of Fig. 10;

Fig. 15 is a graph showing the characteristic of a two-frequency band pass filter as shown in Fig. 10;

Fig. 16 is a block diagram showing an essential part of a first two-frequency-ranging filter;

Fig. 17 is a block diagram showing an essential part of a second band-pass filter;

Fig. 18 is a block diagram showing an essential part of a second two-frequency band pass filter;

Fig. 19 is a circuit diagram showing an essential part of a third two-frequency band pass filter;

Fig. 20 is a circuit diagram showing an essential part of a third two-frequency branching filter;

Fig. 21 is a schematic view showing a fourth two-band bandpass filter;

Fig. 22 is a schematic view showing a fifth two-frequency band pass filter;

Fig. 23 is a schematic view showing a fourth two-frequency branching filter;

Fig. 24 is a schematic view showing a fifth two-frequency branching filter;

Fig. 25 is a block diagram showing an essential part of a conventional two-frequency band pass filter;

Fig. 26 is a block diagram showing an essential part of a conventional two-frequency branching filter;

Fig. 27 is a circuit diagram showing an essential part of a first multi-frequency band VCO;

Fig. 28 is a circuit diagram showing an essential part of a second multi-frequency band VCO;

Fig. 29 is a circuit diagram showing a substantial part of an oscillator circuit shown in Fig. 28 in a certain operating condition;

Fig. 30 is a circuit diagram showing the oscillator circuit in another operating state;

Fig. 31 is an explanatory view showing a combination of distributed constant lines according to a third multi-frequency band VCO;

Fig. 32 is an explanatory view showing a combination of distributed constant lines according to a fourth multi-frequency band VCO;

Fig. 33 is an explanatory view showing a combination of distributed constant lines according to a fifth multi-frequency band VCO;

Fig. 34 is a block diagram showing a conventional multi-frequency band VCO;

Fig. 35 is a circuit diagram showing a first matrix switch which switches two terminals to a plurality of common terminals;

Fig. 36 is an equivalent circuit diagram of Fig. 35;

Fig. 37 is a circuit diagram; showing a second matrix switch that switches two terminals to a plurality of common terminals;

Fig. 38 is a circuit diagram showing a third matrix switch which switches two terminals to a plurality of common terminals;

Fig. 39 is a circuit diagram showing a fourth matrix switch which switches two terminals to a plurality of common terminals;

Fig. 40 is a circuit diagram showing a conventional matrix switch for switching two terminals to two common terminals;

Fig. 41 is an equivalent circuit diagram of Fig. 40; and

Fig. 42 is an equivalent circuit diagram of the matrix switch shown in Fig. 40;

Fig. 1 is a block diagram showing an embodiment of the time division multiple access FDD radio transmission apparatus according to the present invention. In a receiving circuit shown in Fig. 1, an antenna switch 2, which is the transmission / reception switching device, is connected to an antenna 1, which is a scanning antenna. A high frequency amplifying apparatus comprising filters 3 and 5 and a high frequency amplifier 4 is connected to a contact 2r which is a receiving input terminal of the antenna switch 2. A converter 6, which is a first reception signal conversion device, is connected to an output of the high frequency amplifying device, allowing the converter 6 to be detected by a contact 7r of a transmission / reception switch 7, which is a first shaft device which is a part of a transmission / reception switching device, and then connected to an output of a first local oscillator 8, which is a first oscillator device. A first intermediate frequency amplifying device comprising a first intermediate frequency band pass filter 9 and a first intermediate frequency amplifier 10 is connected to the output of the converter 6. A converter 11, which is a second reception signal conversion device, is connected to the rear end of a first intermediate frequency amplifying device. A second local oscillator 12, which is a second oscillator device, is connected to the converter 11 via an n-times multiplier 14, which is an n-times multiplier. In addition, the converter 11 is connected via a second intermediate frequency bandpass filter 15 to a demodulator 16, which constitutes a demodulation device.

The transmission circuit is constructed such that an output from the second local oscillator 12 is connected to an input of an m-times multiplier 18 which is an m-times mint multiplier. The output of the m-times multiplier 18 is connected to a modulator 19, which is a modulation device. The output of the modulator 19 is connected to an intermediate transfer frequency amplifying device including an intermediate transfer frequency amplifier 20 and an intermediate transfer frequency band pass filter 21, and is then connected to a converter 22 which is a transfer signal converting device. The first local oscillator 8 is connected to the converter 22 via a contact 7t of the transmission / reception switch 7. The output of the converter 22 is connected to a contact 2t of the antenna switch 2, which constitutes an output terminal, through a transmission power amplifying apparatus comprising high frequency band pass filters 23 and 26, a high frequency amplifier 24, and a high frequency power amplifier 25.

The operation of the time division multiple access FDD-type radio transmission apparatus according to the present embodiment will be described below with reference to the drawings.

When a signal is received, a high-frequency signal received by the antenna 1 is allowed to pass through the antenna switch 2 connected to the contact 2r. Subsequently, the high-frequency band-pass filter 3 selects a reception frequency fR of 810 MHz to 826 MHz for the respective subscriber and applies the signal to the high-frequency amplifier 4 to be amplified. Subsequently, the selectivity of the amplified signal is further increased by the high frequency band pass filter 5, and subsequently applied to the converter 6 by mixing the frequency of the signal with a first local oscillator frequency f L1 of 680.9 MHz to 696.9 MHz, which is from the first Local oscillator 8 is provided by the contact 7r of the transmission / reception switch 7, and thus converted into a first intermediate frequency fR1 of 129.1 MHz. Subsequently, the selectivity of the signal is increased by the first intermediate frequency bandpass filter 9, and subsequently amplified by the first intermediate frequency amplifier 10. Then, the frequency is mixed by the converter 11 with a second local oscillator frequency provided by the second local oscillator 12, which generates a second local oscillator frequency fL2 of 129.55 MHz, via the contact 13r of the transmission / reception switch 13, and then multiplied by n (n = 1 in the previous case) in the n-times multiplier 14 and thus converted into a second intermediate frequency fR2 of 450 kHz.

Subsequently, the selectivity of the frequency is increased by the second intermediate frequency bandpass filter 15 and subsequently demodulated by the demodulator 16, so that a reception output is achieved.

When a signal is transmitted, a second local oscillator frequency fL2 of the second local oscillator 12 of 129.55 MHz is allowed to pass through the contact 13t of the transmission / reception switch 13, and then becomes m (m = 2 in the previous case). multiplied by an m times multiplier 18 so as to be converted to an output of 259.1 MHz. The output is then digitally modulated with I and Q signals by modulator 19. An intermediate transfer frequency fT1 of the digitally modulated frequency is amplified by the intermediate transfer frequency amplifier 20. Then, the selectivity of the amplified frequency is increased by the intermediate transfer frequency bandpass filter 21. And then the signal having a first local oscillator frequency f L1 of 680.9 MHz to 696.9 MHz provided by the first local oscillator 8 via the contact 7t of the transmission / reception switch is mixed and thus converted into a high-frequency signal having a Transmission frequency fT of 940 MHz to 956 MHz, which is the transmission frequency of the respective subscriber. Subsequently, the selectivity of the frequency is increased by the high-frequency band-pass filter 23 and then amplified by the high-frequency amplifier 24 and the high-frequency power amplifier 25. Then, the selectivity of the amplified frequency is increased by the high-frequency band-pass filter 26 and thus transmitted from the antenna 1 through the contact 2t of the antenna switch 2.

Similar to the structure shown in FIG. 8, the reception and the transmission are switched so that the antenna switch 2 and the transmission / reception switch 7 are switched with a period shorter than the period of a voice signal, so that Transmission and reception can be performed simultaneously. In the case of the FDD system, assuming that a frame comprises 20 ms, an arrangement is used in which 20/3 ms is assigned to the transmission, 1 ms is allocated as a space, 20/3 ms is assigned to the reception, and the remaining time is left unused.

Between the high-frequency power amplifier 25 and the high-frequency band-pass filter 26, if necessary, an isolator can be arranged which prevents a backflow of the high-frequency signal from the antenna.

Assuming that the difference between the transmission frequency and the reception frequency is Δf, that the second local oscillator frequency fL2 and the second intermediate reception frequency fR2, the multiplication factor m of the m-times multiplier or the divisor m of the m-divider and the multiplication factor n become of the multiplier or divisor n (m and n are each integers not smaller than 2) of the n-divisor are selected to satisfy the following equations:

fR2 = (m -n) fL2 -Δf (1)

or

fR2 = {(1 / m) - (1 / n)} fL2 - Δf (2)

In addition, the first and second intermediate frequencies are arbitrarily selected, so that the transmission frequency fT and the reception frequency fR are arbitrarily set.

As described above, this embodiment is constructed such that the oscillator frequency of the second local oscillator 12 is multiplied by n by the n-times multiplier 14 and multiplied by m by the m-times multiplier 18 when a signal is transmitted. Then, the equation (1) is used to set the values ​​of m and n so that a carrier oscillator 17 shown in FIG. 8th is reduced to be adaptable to the transmission frequency fT and the reception frequency fR.

As described above, when a signal is received, a high frequency signal having the reception frequency received by the reception input terminal is selectively amplified, and then the amplified signal is applied to the first reception signal conversion apparatus, of which the difference to the frequency of the output of the first one local oscillator is transmitted as the first intermediate frequency. The transmitted output is applied to the second signal converting device where it is mixed with a frequency obtained by multiplying the oscillation frequency from the second local oscillator by n by the n times multiplier (or by a frequency obtained by dividing by n through the n-divisor). Therefore, a frequency which is the sum of the first intermediate frequency and the output of the n-times multiplier (or the n-divider) or the difference between them is transmitted as the second intermediate frequency.

When a signal is transmitted, the output obtained by multiplying the output from the second local oscillator by m by the m-times multiplier (or the output obtained by dividing it by m by the m-divider) becomes Modulator modulated. A transmission frequency is generated which represents the sum of the output obtained by selective amplification of the previous output and the output from the first local oscillator and which differs from the reception frequency.

Since the m-times multiplier (or the m-pitter) and the n-times multiplier (or the n-divisor) are provided, a second local oscillator is sufficient to allow transmission and reception. As a result, the number of oscillators can be reduced, and therefore the structure of the circuit can be simplified.

Although the description is concerned with a structure having the n-times multiplier 14 which can multiply the frequency by n, and the m-times multiplier 18 which can multiply the frequency by m, the equation (2) can be used to set a circuit having an n-divider that can divide the frequency by n and an m-divider that can divide the frequency by m. The multiplier and the divider can be combined with each other. The structures described above can be similarly adapted to the following embodiments.

Referring now to Figure 2, there is shown a block diagram of a first embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention. A main difference of this embodiment from the conventional structure shown in FIG. 9 is that the transmission part for the FDD system and that for the TDD system are integrated into a single unit, that the reception part for the FDD system and that for the TDD system are integrated into a single unit, in that first local oscillator circuits are provided to allow adaptation to the FDD system and the TDD system, and that a second local oscillator circuit is provided similarly to the structure of the embodiment of the time division multiple access radio communication device with FDD. Since the elements, combinations and connections are similar to those of the structure of Fig. 1, they are omitted in the detailed description.

A first local oscillator 8b for the FDD system constitutes a first oscillator device, a first local oscillator 8a for the TDD system constitutes a third oscillator device, an operation mode switch 30 constitutes a selection device, and an operation mode switch 29 constitutes a system switching device.

The operation of this embodiment will be described below. In the TDD mode of operation, the mode switches 29, 30, 31 and 32 are connected to the contacts 29a, 30a, 31a and 32a while an operation mode / transmission / reception switch 33 is connected to a contact 33a.

When a signal is received, a high-frequency signal received by the antenna 1 is allowed to pass through the antenna switch 2 connected to the contact 2r and a contact 29a of the operation mode switch 29: Then, the high-frequency band pass filter 3a selects a reception frequency fRa from 1895.15 to 1917.95 MHz for the respective subscriber and applies the signal to the high frequency amplifier 4a to amplify it. Then, the selectivity of the amplified signal is further amplified by the high frequency bandpass filter 5a and subsequently applied to the converter 6, in which the frequency of the signal having a first local oscillator frequency fL1a of 1646.85 MHz to 1669.65 MHz from that of the first local oscillator 8a is mixed so as to be converted into a first intermediate frequency fR1a of 248.3 MHz. Then, the selectivity of the signal is increased by the first intermediate frequency band pass filter 9a and then amplified by the first intermediate frequency amplifier 10a. Then, the frequency is mixed by the converter 11a with a second local oscillator frequency of 259.1 MHz, which is provided by the second local oscillator 12 through a contact 33a of the operation mode / transmission / reception switch 33, and m (in this case m = 2) multiplied by the m-times multiplier 18, and thus converted into a second intermediate frequency fR2 of 10.8 MHz. Then, the selectivity of the frequency is increased by the second intermediate frequency band pass filter 15a and then demodulated by a demodulator 16a to obtain a reception output.

When a signal is transmitted, a second local oscillator frequency f L2 of 129.55 MHz is allowed by the second local oscillator 12 to pass through a contact 33a of the mode / transmit / receive switch 33 and then m (in this case m = 2) multiplied by the m-times multiplier 18 and thus converted into 259.1 MHz. An output at this frequency is then modulated digitally with I and Q signals into modulator 19. The intermediate transfer frequency fT1 thus obtained is amplified by the intermediate transfer frequency amplifier 20. The selectivity of the frequency is increased by the intermediate transfer frequency band pass filter 21 and then applied to the converter 22 having received the first local oscillator frequency fL1a (the preceding switching operation is performed by a transmission / reception controller (not shown here)). This is 1636.05 MHz to 1658.85 MHz in a frequency range different from that which occurs when a signal is received. Therefore, the frequency is converted into the high-frequency signal having the transmission frequency fT from 1895.15 MHz to 1917.95 MHz, which is the transmission frequency for the respective subscriber. Subsequently, the signal may pass through the contact 32a of the operation mode switch 32 and then the selectivity of the high frequency signal is increased by a high frequency band pass filter 23a and subsequently amplified by the high frequency amplifier 24a and the high frequency power amplifier 25. Then, the selectivity is increased by the high-frequency band pass filter 26a, and then the signal can pass through the contact 31a of the operation mode switch 31 and the contact 2t of the antenna switch 2. Then, the signal is transmitted from the antenna 1.

Reception and transmission are switched by switching the antenna switch 2 at high speed. In an example case where four radio transmission devices use the same frequency, a frame consisting of 5 ms is divided into 8 time slots, each of which comprises 625 μs. A radio communication device transmits a signal in the first time contactor, waits during the following three time slots, receives a signal in the fifth slot, and then waits again during the following three time slots. During the previous timeslots, other radio transmission devices can serially repeat transmission and reception so that transmission and reception are simultaneously possible. When a signal is received, the transmission / reception control (not shown here) shuts down the operation of each device (the amplifiers, converters and modulators) of the transmission circuit. When a signal is transmitted, similarly, each device in the receiving circuit is turned off.

The FDD mode will now be described. The operation mode switches 29, 30, 31 and 32 are switched to the contacts 29b, 30b, 31b and 32b. In addition, the operation mode / transmission / reception switch 33 is switched to the contact 33b.

When a signal is received, a high frequency signal applied by the antenna 1 is processed so that the high frequency band pass filter 3b selects the receiving frequency fR of the respective subscriber from 810 MHz to 826 MHz because the antenna switch 2 has been connected to the contact 2r, and the operation mode switch 29 has been connected to the contact 29b. The selected frequency fR is applied to the high-frequency amplifier 4b in which the frequency fR is amplified. Then, the selectivity is further increased by the high-frequency band pass filter 5b, and subsequently applied to the converter 6b by mixing the frequency with a first local oscillator frequency fLhb of 680.9 MHz to 696.9 MHz supplied from the first local oscillator 8b Is provided to be converted into a first intermediate frequency fR1b of 129.1 MHz. The selectivity is increased by the first intermediate band pass filter 9b, and subsequently the signal is amplified by the first repeater 10b. Then, the amplified frequency is mixed by the converter 11b with a second local oscillator frequency of 129.55 MHz, which is obtained by the second local oscillator frequency fL2 of 129.55 MHz, that of the second local oscillator 12 by the operating mode contact 33b. Transmission / reception switch 33 is generated, multiplied by n (in this case, n = 1) by the n-times multiplier 14, and thus converted into a second intermediate frequency fR2b of 450 kHz. Subsequently, the selectivity of the second intermediate frequency fR2b is increased by the second intermediate frequency bandpass filter 15b and subsequently demodulated by the demodulator 16b. In this way, a reception output can be obtained.

When a signal is transmitted, the operation mode / transmission / reception switch 33 is switched to the contact 33a. A second local oscillator frequency f L2 of 129.55 MHz, which is generated by the second local oscillator 12, can pass through the contact 33 a of the operating mode / transmission / reception switch 33 and is subsequently m-multiplied by the m-times multiplier 18 (in this case m = 2), so that an output of 259.1 MHz is obtained. The output is digitally modulated with I and Q signals by the modulator 19 so that an intermediate transfer frequency fT1 is obtained. The intermediate transfer frequency fT1 is amplified by the intermediate transfer frequency amplifier 20. The selectivity of the amplified frequency is increased by the intermediate transmission frequency bandpass filter 21. Then, the frequency is mixed by the converter 22 having the first local oscillator frequency f L1 b of 680.9 MHz to 696.9 MHz, which is provided to the first local oscillator 8b via the contact 30b of the mode switch 30, and so into a high-frequency signal which has a transmission frequency fTb of 940 MHz to 946 MHz. Then, the high-frequency signal is allowed to pass through the contact 32b of the operation mode switch 32 and then applied to the high-frequency band-pass filter 32b, in which the selectivity of the frequency is increased. Then, the frequency is amplified by the high-frequency amplifier 24b and the high-frequency power amplifier 25b. Then, the selectivity of the frequency is increased by the high frequency band pass filter 26b, and then the signal can pass through the contact 31b of the operation mode switch 31 and the contact 2t of the antenna switch 2. In this way, the signal is transmitted from the antenna 1.

Reception and transmission as described above are switched with a period shorter than the voice signal by the switching of the antenna switch 2 and the operation mode / transmission / reception switch 33 similarly to the embodiment of FIG. Therefore, transmission and reception can be performed simultaneously.

The embodiment shown may perform a similar operation to that of the embodiment of FIG. 1 by using equation (1) or equation (2) such that the multiplication factor of the m-times multiplier 18 and the n-times multiplier 14 is the frequency for the use in the transmission or reception can be determined by the FDD method or the divisor of the divider. As described above, the TDMA radio transmission apparatus is constructed such that the transmission part for the FDD system and that for the TDD system are formed as a unit, that the reception part for the FDD and that for the TDD system as a unit are formed and that two first local oscillator circuits are provided, such that one of the first local oscillator circuits is used for transmission and reception according to the TDD method, and the other circuit is used for transmission and reception according to the FDD method. As for the second local oscillator circuit, a structure similar to that of the embodiment of Fig. 1 is used here. In addition, the m-times multiplier is used to perform the transmission and reception according to the TDD method. The m-times multiplier is used to perform the transmission according to the FDD method, while the m-times multiplier is used to perform the reception. Therefore, carrier oscillators can be saved as compared with a conventional two-mode wireless device 3. As described above, this can reduce the total number of oscillators.

Referring now to Figure 3, there is shown a block diagram of a second embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention. This embodiment differs from the first embodiment shown in FIG. 2 3, it is shown that operation mode switches 34 and 35 are inserted to combine the high-frequency amplifiers 24a and 24b and the high-frequency power amplifiers 25a and 25b for transmission according to the first embodiment into a single high-frequency amplifier 24c and a single high-frequency power amplifier 25c, so that the high-frequency transmission circuit is simplified. Moreover, a dual-band frequency synthesizer 8c capable of outputting frequencies in the range of the two-frequency bands is used in place of the two first local oscillator circuits 8a and 8b according to the first embodiment, so that a first local oscillator is saved. It should be noted that the dual-band synthesizer 8c is switched to be adapted to the operation mode and the transmission and reception by a controller not shown here. The other parts having the same functions as those according to the first embodiment are given the same reference numerals and are excluded from the detailed description.

In this embodiment, when a signal is transmitted in the case of the TDD method, operation mode switches 31, 32, 33, 34, and 35 are connected to contacts 31a, 32a, 34a, and 35a to form a circuit composed of the converter 22 , the high frequency band pass filter 23a, the high frequency amplifier 24c, the high frequency power amplifier 25c, and the high frequency band pass filter 26a. In the case of the FDD method, the mode switches 31, 32, 34 and 35 are switched to contacts 31b, 32b, 34 and 35b to form a circuit consisting of the converter 22, the high frequency band pass filter 23b, the high frequency amplifier 24c, the high frequency power amplifier 25c and the high frequency band pass filter 26b.

The two improvements according to this embodiment may be applied together or individually. Although the description of this embodiment has been made with respect to the transmitting part, of course, the structure according to this embodiment may be applied to the receiving part if respective operating mode switches are provided at the back of the high-frequency band pass filters 3a and 3b and over the high-frequency band pass filters 5a and 5b.

Referring to Fig. 4, there is shown a block diagram of a third embodiment of the time division multiple access FDD / TDD dual mode wireless unit according to the present invention. This embodiment differs from the second embodiment shown in FIG. 3 in that the operation mode switches 31 and 34 are omitted and that a two-pass low-pass filter 36 is interposed between the high frequency band pass filters 26a and 26b between the high frequency power amplifier 25c and the antenna switch 2. Thereby, a filter can be saved and the operation mode switch can be simplified. Since the other parts are similar to those according to the second embodiment of FIG. 3 are the parts with the same functions have been given the same reference numerals and omitted from the detailed description. The location of the dual band low pass filter is not limited to the situation described above. The number of parts can be further reduced if the dual band low pass filters are used in other parts.

Referring to Fig. 5, there is shown a block diagram of a fourth embodiment of the time division multiple access FDD / TDD dual mode wireless unit according to the present invention. This embodiment differs from the first embodiment shown in Fig. 2 in that an operation mode switch 37 is disposed at the back of the first intermediate frequency filters 9a and 9b. Instead of the subsequent second intermediate frequency band pass filters 15a and 15b and the demodulators 16a and 16b, there is provided a synchronous demodulator circuit consisting of an intermediate frequency amplifier 38, multipliers 39 and 40, a 90 ° phase shifter 41 and baseband low pass filters 43 and 44. Moreover, for the 90 ° phase shifter 41, there is provided an operation mode switch 42 for selectively receiving the outputs of the m times multiplier 18 or the n times multiplier 14.

Due to the structure described above, the second intermediate frequency circuit and the demodulator can be replaced by the synchronous demodulator circuit. In the foregoing case, the oscillator frequency of the second local oscillator 12 is set to 130 MHz, the intermediate frequency of the TDD receiving circuit is set to 260 MHz, and the intermediate frequency of the FDD receiving circuit is set to 130 MHz. Moreover, the oscillator frequencies of the first intermediate frequency oscillators 8a and 8b must be controlled to match the mode of operation, transmission and reception so that they can be adapted to the transmission and reception frequencies in the embodiment of FIG. The structure of the synchronous demodulator circuit can be varied as well as the structure described. Since a synchronous demodulator circuit is known, its detailed description is omitted here.

According to this embodiment, the synchronous demodulator circuit is used instead of the second intermediate frequency circuit and the demodulator according to the first embodiment, so that the structure of the circuit is simplified. Referring to Fig. 6, there is shown a block diagram of a fifth embodiment of a time division multiple access FDD / TDD dual mode wireless unit according to the present invention. This embodiment differs from the first embodiment shown in FIG. 2 in that antennas 1A and 1B and a diversity switch 45 are provided instead of the antenna 1. Although not shown, the receiving sensitivities of the antennas 1A and 1B are compared with each other when a signal is received, and to switch the multiple reception, the diversity switch 45 is switched to a contact 45a so as to include excellent transmission and reception severity , Since the diversity technique is known, its detailed description is omitted here.

As described above, the time division multiple access FDD / TDD dual mode wireless communication device according to the present invention receives an output from the n-fold multiplier at a second local oscillator for the TDD system when a signal is received by the TDD method , When a signal is received by the FDD method, an output from the m-fold multiplier (or m-divider) is provided by the second local oscillator for the FDD method. When a signal is transmitted by the TDD method or the FDD method, an output from the m times multiplier (or the m divider) is received by the modulator. In this way, the number of oscillators can be further reduced. Thus, the structure of the circuit can be simplified.

As described in the first to second embodiments, according to the present invention, the number of the oscillators, filters, and the like can be reduced, and the structure of the circuit can be simplified.

The transmission and reception frequencies, the frequencies occurring in each circuit part, the values ​​such as the multiplication factor, the number of amplifiers and filters, and the modulation method of the carrier are only described as examples. They can of course be changed, if necessary. For example, the FDD system requires a large output, and a high output power amplifier may be provided at the end of the high frequency power amplifier adapted to the FDD system. In the high-frequency band-pass filters, those located on the output side of the power amplifier may be replaced by low-pass filters.

The techniques according to each embodiment may be used alone or in combination with each other. As far as the detailed circuit structure is concerned, this can be modified within the scope of the basic idea of ​​the present invention.

As described above, the time division multiple access FDD radio transmission apparatus according to the present invention comprises the second oscillating means for generating the second frequency, the first multiplying / dividing means for multiplying the second frequency by n, or dividing it by n, and FIG second multiplier / divider to multiply the second frequency by m or to divide it by m. Therefore, the number of oscillators can be advantageously reduced and the structure of the circuit can be simplified.

The time-division multiple access FDD / TDD dual-mode wireless communication device according to the present invention has the advantage that the number of oscillators can be further reduced.

The following describes a first two-frequency bandpass filter. Fig. 10 is a block diagram of an essential part of the first two-frequency band-pass filter. Figs. 11 and 15 are diagrams which support the explanation. In Fig. 10 reference numeral 211 denotes a first band pass filter passing frequencies of 950 MHz, 212 denotes a second band pass filter passing frequencies of 1.9 GHz, 213 denotes a first phase shifter which passes a phase angle φ1, 214 denotes a second phase shifter having a phase angle φ1 Phase angle φ2 passes, 215 denotes a common input terminal, and 216 denotes a common output terminal.

Figs. 11 (a) and 11 (b) show a Smith chart in which input and output impedances of the first and second filters are plotted. Since a bandpass filter generally coincides with the characteristic impedance in the passband, the impedance of the bandpass filter is close to the center of the diagram: the bandpass filter has an impedance near the outside of the diagram when the frequency is outside the passband.

Fig. 12 shows the transmission characteristics of the first and second filters. When the filters are connected in parallel and the input and output terminals are commonly connected, the signal in the pass band of the first filter 211 flows to the second filter 212 because the impedance of the band from the second filter 212 is low, causing attenuation. In the foregoing case, a transmission characteristic as shown in FIG. 13 and therefore the insertion loss deteriorates and the filter characteristic is destroyed. As a result, a switch 163 according to a conventional structure as shown in Fig. 25 has been used to isolate the filters from each other. In this embodiment, no switch according to the conventional example which needs a control signal is used, but phase shifters which pass phase angles of φ1 and φ2 are connected to the input and output terminals of the filters.

As shown in FIG. 14 (a), in the first filter 211, the value of the phase angle φ1 of the first phase shifter 213 is adjusted to an appropriate value to take the impedance in the passband (1.9 GHz) of the second filter 212 to be a high impedance value allow. As shown in FIG. 14 (b), similarly, in the second filter 212, the value of the phase angle φ2 of the second phase shifter 214 is adjusted to an appropriate value to make the impedance in the pass band (950 MHz) of the first filter 211 high in impedance. The elements described above are connected in parallel and connected through the common input terminal 215 and the common output terminal 216. In the foregoing case, the impedance of the second filter 212 in the pass band (950 MHz) of the first filter 211 assumes a high impedance value in the vicinity of the no-load value. Therefore, a loss of the band component of 950 MHz to the second filter 212 can be effectively prevented. In this way, the insertion loss characteristic of the first filter 211 can be maintained. Similarly, the impedance of the first filter 211 in the passband (1.9 GHz) of the second filter 212 is increased up to a value near the no-load value. In this way, the loss of the band component of 1.9 GHz to the first filter 211 can be effectively prevented. Therefore, the insertion loss characteristic of the second filter 212 can be maintained. Therefore, an overall transfer characteristic as shown in Fig. 15 is produced.

Fig. 16 is a block diagram showing an essential part of the first two-frequency branching filter. Referring to Fig. 16, reference numeral 71 denotes a first band pass filter which allows the passage of a frequency of 950 MHz. 72 means a second band pass filter allowing the passage of a frequency of 1.9 GHz. 73 means a first phase shifter which passes a phase angle of φ1. 74 means a second phase shifter which passes a phase angle of φ2. 75 means a common input terminal, 76 means a first output terminal, and 77 means a second output terminal. Based on the same basic principle as that in the embodiment of FIG. 10 is used, in the first filter 71, the angle value of the phase angle φ1 of the first phase shifter 73 is set to an appropriate value to make the impedance in the passband (1.9 GHz) of the second filter 72 to be a high impedance value. In the second filter 72, the angle of the phase angle φ2 of the second phase shifter 74 is set to an appropriate value so that the impedance in the pass band (950 MHz) of the first filter 71 becomes a high impedance value. Therefore, a loss of the band component of 1.9 GHz from the common input terminal 75 to the second filter 72 can be effectively prevented. Also, loss of the 950 MHz component to the first filter 71 can be effectively prevented. Consequently, a two-frequency branching filter can be constructed in which only the 950 MHz component at the first output port 76 can be tapped, with only the transmission loss due to the first filter 71 taking place, and only the 1.9 GHz component at the second output port 77 can be tapped with only the transmission loss due to the second filter 77 taking place.

Fig. 17 is a block diagram of a second two-frequency bandpass filter. Reference numerals 81 and 82 denote first and second band pass filters similar to those according to the embodiment shown in FIG. 10. Reference numeral 83 denotes a transmission line having an electrical length of L1. 84 denotes a second transmission line having an electrical length of L2, and 85 and 86 denote a common input terminal and a common output terminal. Similarly to the circuit shown in Fig. 10, in the first filter 81, the impedance in the 1.9 GHz band becomes high impedance by setting the electrical length L1 of the first transmission line to an appropriate value. In the second filter 82, the impedance in the 950 MHz band becomes high in impedance value by setting the electrical length L2 of the second transmission line 84 to an appropriate value. Therefore, an effect similar to that obtained from the circuit in Fig. 10 can be achieved.

Fig. 18 is a block diagram showing an essential part of a second two-frequency branching filter. This filter is constructed so that the phase shifter according to the circuit of Fig. 16 is replaced by a transmission line. Based on the same basic principle used in the circuit of Fig. 17, a similar effect to that obtained by the circuit of Fig. 16 can be obtained.

Fig. 19 is a block diagram of an essential part of a third two-frequency band pass filter. Reference numerals 101 and 102 denote first and second band pass filters similar to those according to the circuit shown in FIG. 10. Numeral 103 denotes a low-pass filter that passes frequencies of 950 MHz, 104 denotes a high-pass filter that passes frequencies of 1.9 GHz, and 105 and 106 denote a common input terminal and a common output terminal. Similar to the structure shown in FIG. 10 1, the impedance in the 1.9 GHz band assumes a high impedance value by setting the values ​​of the circuit elements, such as capacitors and coils of the low-pass filter 103, correspondingly to the transmission angle in the 1.9 GHz band to an appropriate one Value to set. Moreover, in the second filter 102, the impedance in the band of 950 MHz is set to a high impedance value by appropriately setting the values ​​of the circuit elements such as capacitors and coils of the high-pass filter 104 to the pass angle in the band of 950 MHz to an appropriate value adjust. Therefore, a similar effect to that obtained with the structure of Fig. 10 can be achieved.

Fig. 20 is a block diagram showing an essential part of a third two-frequency branching filter. This filter is constructed so that the phase shifters according to the structure shown in Fig. 16 are replaced by a low-pass filter and a high-pass filter. Based on the same basic principles as those employed in the structure of Fig. 19, an effect similar to that obtained by the structure of Fig. 16 can be obtained.

Although the circuits shown in Figs. 19 and 20 include concentrated circuit elements serving as low-pass filters and high-pass filters, a distributed-constant line may be used to achieve a similar effect.

Fig. 21 shows the structure of a fourth two-frequency bandpass filter. This filter is constructed such that the two-frequency band pass filters shown in Fig. 19 are formed as an integrated dielectric multilayer structure. Fig. 21 shows an example in which two band-pass filters are stacked in the vertical direction in a unit. In Fig. 21 Reference numerals 212a to 212h denote first to eighth layers of dielectric material, 212i, 212l, and 212o denote first, second, and third grounded shielding layers, and 212j, 212k, 212m, and 212n denote first to fourth pattern layers. Reference numeral 121 denotes a first bandpass filter having two 1/4 wavelength resonators having short-circuited ends; a capacitor formed by opposing electrodes to connect the two 1/4 wavelength resonators and the like. Reference numeral 122 denotes a second bandpass filter having two 1/4 wavelength resonators having a different resonant frequency than the resonator included in the first bandpass filter 121 and having a capacitor formed by opposing electrodes to connect the 1/4 wavelength resonators and the same. Reference numeral 123 denotes a low-pass filter having a grounded capacitor formed by opposed electrodes and a series-connected coil formed by wire windings. Reference numeral 124 denotes a high-pass filter having a series-connected capacitor formed by opposed electrodes and a grounded coil formed by wire turns. Reference numeral 125 denotes an input terminal, 126 denotes an output terminal, and 127 denotes a grounded electrode. With this structure, similar to the structure shown in Fig. 19, a two-frequency band pass filter can be realized. Since an integrated structure is used, the size of the circuit can be reduced.

Fig. 22 is a schematic diagram of a fifth two-frequency bandpass filter. This filter has another structure in which the dielectric layers of the two-frequency band-pass filter are superposed in an integrated manner. In this structure, two bandpass filters are arranged horizontally when manufactured integrally. In Fig. 22 213a to 213e denote first to fifth layers of dielectric material, 213f and 213i denote first and second grounded shielding layers, and 213g and 213h denote first and second pattern layers. Reference numeral 131 denotes a first band pass filter, 132 denotes a second band pass filter, 133 denotes a low pass filter, 134 denotes a high pass filter, 135 denotes an input port, 136 denotes an output port, 137 denotes a grounded electrode, and 138 denotes an inner shield electrode. Even with this structure, a two-band bandpass filter can be obtained by an effect similar to that obtained with the structure of FIG. 19 receives, are produced. Moreover, the size of the circuit can be reduced similarly to the structure shown in FIG. 21. Although the size of the surface is increased as compared with the structure shown in Fig. 21, the height can be shortened. A portable device such as used in mobile communication typically requires a smaller dimension than a reduced surface. Therefore, the structure described above is advantageous.

Fig. 23 is a schematic view of a fourth two-frequency branching filter. This filter is constructed such that the two-frequency branching filter shown in Fig. 20 is constituted by integrally formed dielectric material layers. In Fig. 23 Reference numerals 214a to 214h denote first to eighth layers of dielectric material, 214i, 214l, and 214o denote first, second, and third grounded shielding layers, 214j, 214k, 214m, and 214n denote first to fourth pattern layers. Reference numeral 141 denotes a first band-pass filter, 142 denotes a second band-pass filter, 143 denotes a low-pass filter, 144 denotes a high-pass filter, 145 denotes an input port, 146 denotes a first output port, 147 denotes a second output port, and 148 denotes a grounded electrode. As a result, similar to the structure in FIG. 20, a two-frequency branching filter can be manufactured. Since the structure is made integrated, the size of the circuit can be reduced. Fig. 24 is a schematic view of a fifth two-frequency branching filter. This structure differs from the structure shown in Fig. 23 in that the two-frequency branching filter of Fig. 20 is formed by integrally formed dielectric material layers. In this structure, two bandpass filters are arranged horizontally in integrated manufacturing. This structure is substantially the same as that of Fig. 22. Reference numeral 156 denotes a first output port, and 157 denotes a second output port. In addition, with this structure, an effect similar to that obtained with the structure of Fig. 20 can be achieved, so that a two-frequency branching filter is realized. Since the integrated structure is used, the size of the circuit can be reduced. Although the surface dimension is increased as compared with the embodiment of Fig. 23, the height can be advantageously shortened for use in a portable telephone or the like.

Although the structures shown in Figs. 21 to 24 have the band pass filter formed by two 1/4 wavelength resonators with two short-circuited ends, three or more resonators may be provided. Another structure, in which no resonator is provided, can be used to achieve a similar effect.

Although each of the structures shown in Figs. 16, 18, 20, 23 and 24 has the branching filter, of course, a frequency combiner can be obtained by reversing the input and the output.

Although each of the structures shown in Figs. 10 to 24 are constructed so that the first and second band-pass filters allow the passage of the 950 MHz band and the 1.9 GHz band to simplify the description, of course, each Combination of two frequencies are used, if the first filter allows the passage of a frequency which is higher than the transmission frequency of the second filter and if the conditions for the frequency are met.

Although each of the structures shown in FIGS. 10 to 24 includes the dual-frequency bandpass filter, the branching filter, and the frequency combiner, a similar technique may be a multi-frequency bandpass filter, a multi-frequency-branching filter, and a multi-frequency combiner coupled to a plurality of frequencies including three frequencies; are customizable.

As described above, a two-frequency band pass filter can be realized which does not require a control signal and is capable of reducing the total insertion loss.

Moreover, a two-frequency branching filter (combiner) that does not require a control signal and is capable of reducing the total insertion loss can be realized.

Fig. 27 is a circuit diagram showing an essential part of a first controllable frequency band VCO. A voltage VT for the variation of the frequency is applied to a voltage terminal 301. Then, VT is passed through the capacitors 302 and 303 and applied to the cathode of a varactor diode 305 via a coil 304. The cathode of the varactor diode 305 is connected through a capacitor 306 to a distributed constant line 307 and a capacitor 309 for resonance. While the anode of the same is grounded. The other end of the distributed constant line 307 is grounded through a band switch 15. The resonant frequency adjustment capacitor 309, the varactor diode 305 and the distributed constant line 307 form a resonant circuit. The other terminals of the capacitors 302, 303 and 309 are grounded.

The connection point between the distributed constant line 307 and the capacitor 309 is connected to the collector of a resonance transistor 320 through a capacitor 314. A supply voltage is connected from a power supply terminal 316 through a choke coil 321 to the preceding collector. The supply voltage is divided by the resistors 318 and 319 and applied to the base of the transistor 310 from a power supply terminal 317. Said connection point is grounded through a capacitor 323 to cut off the DC component. A capacitor 322 is connected between the collector and the base of the oscillator transistor 320. A Kondenstor 324 is connected between the collector and the emitter of the oscillator transistor 320. A capacitor 325 and a choke coil 326 are connected in parallel with the emitter of the transistor 320 and the other ends are grounded. The emitter of transistor 320 is further connected to the base of a buffer transistor 328 via a capacitor 327. The emitter of transistor 328 is grounded and the collector is connected to a voltage source via a coil 330 and further connected to an output terminal 331.

The following explains the operation of the circuit described above. Initially, a band switch 315 is shorted to determine the oscillation frequency band. Thereby, the resonance circuit including the distributed constant line 307 is brought into a state in which one end of the distributed constant line 307 is grounded. Therefore, the resonance circuit oscillates at a frequency band substantially equal to the wavelength λ1 satisfying the equation λ1 = 4L, ie, L = λ1 / 4 (hereinafter referred to as "1/4 wavelength mode"). Therefore, an oscillator circuit including the transistor 320 oscillates. Similarly, the voltage VT is applied to the voltage terminal 301 for a change in frequency and applied to the varactor diode 305 so that the equivalent capacitance of the varactor diode 305 changes. In this way, the oscillator frequency can be set exactly. The oscillator output, which is transmitted as a result of the oscillation of the oscillator circuit including the transistor 320, is transmitted from the buffer circuit through the output terminal 331 due to the transistor 328.

Then, the band switch 315 is opened to change the oscillator frequency band. Thereby resonates the resonant circuit including the distributed constant line 307 with a frequency band that includes substantially the wavelength λ2, which satisfies the equation λ2 = 2L, ie, L = λ2 / 2, assuming that the length of the line with distributed constant 307 L (hereinafter referred to as a "1/2 wavelength mode"). Therefore, since the voltage V T for the variation of the frequency applied to the voltage terminal 301 is applied to the cathode of the varactor diode 305 for a variation of the frequency, the equivalent capacitance of the varactor diode 305 changes. Therefore, the oscillator frequency is set exactly.

At this time, the resonance frequencies f1 and f2 are as follows:

f 1; = k / λ & sub1 ;, f & sub2; = k / λ & sub2;

where k is a constant determined by the structure of the distributed constant line.

Therefore

f 1; = k / 4L, f & sub2; = k / 2L

Accordingly, when the band switch 315 is opened, that is, when the conductive ends of the distributed constant line 307 are opened to allow resonance in 1/2 wavelength mode, resonance takes place in a frequency range twice that in FIG Case when the connections are shorted.

Fig. 28 is a circuit diagram showing an essential part of a second controllable frequency band VCO. Fig. 29 is a circuit diagram showing an essential part of a resonance circuit when one end of the distributed constant line is opened. Fig. 30 is a circuit diagram showing an essential part of a resonance circuit when one end of the distributed-constant line is grounded. The parts having the same functions as those corresponding to the VCO of FIG. 28, have the same reference numerals and are omitted from the description. Although the voltage VT for the variation of the frequency is applied as the first voltage to the voltage terminal 301 to vary the frequency similarly to the VCO of FIG. 27, unlike the VCO of FIG. 27 the anode of a switching diode 308 which is a switching device is provided in place of the band switch 315 and connected to the other end of the distributed constant line 307 with the cathode of the switching diode 308 grounded. A coil 311 is connected to a connection point between the resonant frequency adjustment capacitor 309 and the distributed constant line 307. The other terminal of the coil 311 is connected to a frequency band switching power supply terminal 310 to which a frequency band switching voltage VS, which is a second voltage, is applied. The grounding is made from the above point via the capacitors 312 and 313. The capacitors 312 and 313, similar to the capacitors 302 and 303, include capacitors having different characteristics so that complete bridging is achieved to avoid external loss of the high frequency component and to prevent leakage of noise from outside.

Now the operation of the previous structure will be described. When a ground potential or a negative potential is applied to the power supply terminal 310 as a voltage VS for switching the frequency band to switch the frequency band and thereby set the oscillation frequency band, the switching diode 308 is not electrically conductive. Therefore, the other end of the distributed constant line 307 is, as it were, opened. Accordingly, the resonance circuit including the distributed constant line 307 in a high frequency band, similar to the embodiment shown in FIG. 27, oscillates substantially in the 1/2 wavelength operation mode because the end of the distributed constant line 307 has been opened. Therefore, the oscillator circuit including the transistor 302 oscillates. When the voltage VT for the variation of the frequency applied to the voltage terminal 310 is applied to the varactor diode 308, which is the varactor device, to change the frequency, the oscillation frequency is accurately set. The oscillator output generated by the oscillator circuit including the transistor 320 is transmitted from the buffer circuit through the output terminal 331 due to the transistor 328.

Subsequently, the frequency band switching voltage VS is applied to the frequency band switching power supply terminal 310 to turn on the switching diode 308. The switching diode 308, which has been turned on with the voltage VS to allow the switching frequency band to pass through the distributed constant line 307, causes the other end of the distributed constant line 307 to be grounded. Since the other end of the distributed constant line 307 is grounded, the resonant circuit including the distributed constant line 307 oscillates in a low frequency band, which is substantially half the size of the 1/4 wavelength mode. The oscillator circuit including the transistor 320 oscillates. When the voltage VT for varying the frequency applied to the frequency varying voltage terminal 301 is applied to the varactor diode 305 similarly as in the foregoing structure, the equivalent capacitance of the varactor diode 305 changes. Therefore, the oscillation frequency is accurately set. In this embodiment, the capacitor 309 may be omitted if the resonant frequency can be determined by the varactor diode 305 and the distributed constant line 307.

It should be noted that the switching diode 308 can be replaced by another switching device that can operate similarly, e.g. B. a FET. In the foregoing case, the voltage for controlling the switching of the frequency band is not allowed to pass through the distributed constant line, but it is applied to the gate terminal.

Fig. 31 shows a third controllable frequency band VCO in an explanatory view showing the combination of distributed constant lines. In Fig. 31 (a), the distributed constant line is divided into portions 307a and 307b having different lengths. A switch 315a is disposed between the portions 307a and 307b. Another end is grounded in AC outlook. When the switch 315a is turned on, a distributed constant line having a grounded terminal and swinging in the 1/4 wavelength mode is formed, so that the length L & sub1; + L & sub2; is as shown in Fig. 31 (b). When the switch 315a is turned off, a distributed constant line oscillating in the 1/2 wavelength mode is formed, so that the length L & sub1; is as shown in Fig. 31 (c). When the circuit shown in FIG. 31 (a) is switched into the circuit of Fig. 27 instead of the distributed constant line 307 to have suitable lengths L & sub1; and L & sub2; to choose, the frequency band is not limited to 1: 2. The freedom of the resonant frequency band can be increased.

In the structure shown in Fig. 31 (a), a switch is provided between two distributed constant lines. If the number of divisions of the distributed constant line and the number of switches increases, three or more frequency bands can be selected. In the previous case, the other end of the distributed constant line need not necessarily be grounded.

When the circuit shown in Fig. 31 (a) is used as the distributed constant line for the circuit of Fig. 28, and a diode 308 is provided in place of the switch 315a, the foregoing may be used with the circuit Fig. 28 can be achieved. In the foregoing case, since the diode can select only two frequency bands, a switching device such as FET capable of selecting three or more frequency bands is used.

Fig. 32 shows a fourth controllable frequency band VCO in an explanatory view showing a combination of distributed constant lines. Referring to Fig. 32 (a), the structure is constructed so that the length L & sub1; + L & sub2; and ground at a position of length L & sub1; seen from one end by a switch 315b can be made. When the switch 315b is turned on, a distributed constant line of length L₁ oscillating in the 1/4 wave mode is formed, as shown in Fig. 32 (b). When the switch 315a is turned off, a distributed constant line having a length of L & sub1; + L & sub2; and oscillates in the 1/2 wavelength mode as shown in Fig. 32 (c). When the circuit shown in FIG. 32 (a) is substituted for the distributed constant line 307 in the circuit of Fig. 27 to have the lengths L & sub1; and L & sub2; Accordingly, the frequency band is not limited to 1: 2, but the freedom of the resonance frequency band to which the switching can be made is improved.

When the circuit shown in Fig. 32 (a) is used as the distributed constant line for the circuit of Fig. 28 and a diode 308 is provided in place of the switch 315a, the above-described operation in the circuit can be made Fig. 28 can be achieved.

Although the structure of Fig. 32 (a) includes a switch connected at an intermediate position within a distributed constant line, increasing the number of switches that can be alternately turned on or off allows three or more frequencies to be selected can. In the foregoing case, a combination in which the other end of the distributed-constant line is grounded is not necessarily required. Since the diode can only select two frequency bands, a switching device such as a FET is used to select three or more frequency bands.

Although a switch is connected to an intermediate position of a distributed constant line from the structure of Fig. 32 (a), a switch may be connected at an intermediate position between two distributed constant lines to achieve a similar effect.

Fig. 33 shows a fifth controllable frequency band VCO in an explanatory view showing a combination of distributed constant lines. In Fig. 33, the circuit is constructed so that grounding from an intermediate position with a distributed constant line 307a or 307b as shown in Fig. 31 (a) can be achieved by the switch 315c. When both switches 315a and 315c are turned off, or either the switch 315a or the switch 315c is turned on, switching of three frequency bands may be performed. By further increasing the number of switches, the number of frequency bands to which switching can be made can be further increased. This advantage can be achieved by increasing the number of switches in the circuit of Fig. 32 (a).

It is to be noted that a switching device such as a FET may be used in place of the switches 315a or 315c. By controlling the gate potential of these transistors, the connection, disconnection, grounding and opening of the distributed constant lines can be arbitrarily switched.

According to each of the structures of Figs. 27 and 28, the switch or switching diode provided at the other end of the distributed constant line is turned on or off to the resonance mode of the distributed constant line of 1/2 wavelength to switch to a 1/4 wavelength. Therefore, a controllable frequency band VCO can be realized that requires only a simple structure.

According to each of the structures shown in Figs. 31 and 32, when the switch or the switching diode provided between the distributed constant line divided into at least two parts is turned on or off, or when the switch or the switching diode is so are arranged to be grounded, turned on or off from a middle position of a distributed constant line, the length of the distributed constant line can be changed and the resonance mode can be switched from a 1/2 wavelength to a 1/4 wavelength and only a simple structure is needed. Therefore, a controllable frequency band VCO having improved freedom in adjusting the frequency band can be realized.

According to the structures shown in Fig. 33, a VCO capable of switching three or more frequency bands can be realized by combining the VCOs of Figs. 31 and 32 with each other or by turning on or off two or more switches ,

The structures of the parts, including the resonant circuits, the oscillator circuits and the surrounding circuits shown in Figs. 27 and 28 are not limited to the illustrated structures. Modifications and combinations within the scope of the invention may be allowed. Although the description has a structure in which the capacitor, the varactor diode and the switching diode are directly earthed, they may of course be grounded in AC view.

The varactor diode and the switching diode can be replaced by other devices with similar functionality. For example, the switching diode 308 may be replaced by a FET. In the previous case, the frequency band switching control voltage is applied without being allowed to pass through the distributed constant line.

Although the foregoing structures have been described with respect to the structure in which both the first local oscillator circuit and the second local oscillator circuit are VCOs capable of switching two frequency bands, a VCO capable of switching three or more frequency bands may also be employed. if the number of frequency bands you want to use is large.

As described above, the controllable frequency band VCO allows circuit size, space and cost to be reduced. Therefore, the VCO with controllable frequency band can be manufactured at a low cost.

Fig. 35 is a circuit diagram showing a first matrix switch for switching from two terminals to many common terminals according to the present invention. In Fig. 35, each transistor is an FET. A first terminal RF1 is connected to the drains of a first short-circuit transistor QS1, a first connection transistor QC1 and a second connection transistor QC2. A second terminal RF2 is connected to the drains of a second short-circuit transistor QS2, a third connection transistor QC3, and the fourth connection transistor QC4. The sources of the transistor QC1 and QC3 are connected to a common terminal RFCOM1. The sources of the transistor QC2 and QC4 are connected to a second common terminal RFCOM2. The sources of transistors QS1 and QS2 are grounded.

A first control terminal Vcont1 is connected to the gate of the transistor QS2 via a resistor R2 and to the gate of the transistor QS1 via an inverter Inv1 and a resistor R1. A second control terminal Vcont2 is connected to the gate of the transistor QC2 via a resistor R4, the gate of the transistor QC3 via a resistor R5, the gate of the transistor QC1 via an inverter Inv2 and a resistor R3 and to the gate of the transistor QC4 via the inverter Inv2 and a resistor R5.

The foregoing connection will be described in different ways. The first and second short-circuit transistors QS1 and QS2 are between ground and each of the first and second input terminals RF1 and RF2. Between the first port RF1 and the second common port RFCOM1, between the first port RF1 and the second common port RFCOM2, between the second port RF2 and the first common port RFCOM1 and between the second port RF2 and the second common port RFCOM2 are the first to fourth connection transistors QC1 to QC4 each connected in the form of a bridge.

The first control terminal Vcont1 is connected to the gates of the first and second short-circuit transistors QS1 and QS2. In this case, the first control terminal Vcont1 is connected to the transistor QS2 and connected to the other transistor QS1 via the inverter Inv1. The second control terminal Vcont2 is connected, for example, to the gates of the transistors QC2 and QC3 among the first to fourth connection transistors provided at the opposite ends of the bridge. The second control terminal Vcont2 is connected via the inverter Inv2 to the gates of the transistors QC1 and QC2 provided at the other opposite ends of the bridge.

The operation of the foregoing structure will now be described with reference to Fig. 36, which is an equivalent circuit diagram to the circuit of Fig. 35, and with reference to Table 2 which shows the applied control voltages and the operation of the circuit. Table 2

Via first and second control terminals Vcont1 and Vcont2, a high (H) or low (L) potential is applied as a control voltage.

When a high potential is applied to the first control terminal Vcont1 and the second control terminal Vcont2, the transistor QS2 is turned on due to the high potential applied to the first control terminal Vcont1 because the FET is turned on when its gate is high. The transistor QS1 is turned off via the inverter Inv1. The low potential applied to the second control terminal Vcont2 causes the transistors QC2 and QC3 to be turned on. Since the polarity is reversed via the passage through the inverter Inv2, the transistors QC1 and QC4 are turned off. As a result, such a state of the equivalent circuit of FIG. 36 ensures that signal received via the first terminal RF2 is connected only to the second common terminal RFCOM2 and thus transmitted from the second common terminal RFCOM2. A signal received through the second terminal RF2 is grounded because the transistor QS2 is turned on, so that the transmission of the signal to the other common terminal is prevented.

When low potentials are applied to both control terminals Vcont1 and Vcont2, all FETs are brought into a state opposite to the state in Fig. 36, because a FET is turned off when its gate potential is low. Therefore, a signal received through the second terminal RF2 is connected only to the second common terminal RFCOM2 so as to be transmitted from the second common terminal RFCOM2. A signal received through the first terminal RF1 is grounded because the transistor QS1 is turned on, so that the transmission of the signal to another common terminal is prevented.

When the potentials applied to the first and second control terminals Vcont1 and Vcont2 are L and H or H and L, conduction is performed as shown in Table 2. Accordingly, the operation can be performed as a matrix switch for switching two terminals to two common terminals, in which the connection between one of the terminals (RF1, RF2) and either of the two common terminals (RFCOM1, RFCOM2) is formed by only one pair becomes as shown in the equivalent circuit of Fig. 42. The previous signal flow can also be inverted.

In the description, a general FET was used. In the case where a gallium arsenide FET (GaAsFET) is used as the FET, ground potential is used as the high potential, and negative potential sufficient to cut off the channel is used as the low potential. In the case where a metal oxide FET (MOSFET) is used, ground potential is used as a low potential, and a positive potential capable of forming a sufficient channel is used as the high potential. Thereby, the effect described in the foregoing can be achieved.

As described above, since the circuit has a structure as shown in Fig. 35, two transistors and two resistors can be saved as compared with the conventional structure of Fig. 40. Therefore, the structure of the circuit can be simplified.

A second matrix switch for switching from two terminals to a plurality of common terminals will now be described with reference to Fig. 37, which is a circuit diagram, and with reference to Table 3, wherein the operation of each part of the circuit is shown with respect to the control potential of the control terminal , described. Table 3

Fig. 37 (a) shows a transistor matrix part, and Fig. 37 (b) shows a control circuit part. In Fig. 37 (a), all the transistors FETs are similar to those in the embodiment of Fig. 35. In Fig. 37 (a), a first terminal RF1 is connected to the drains of a first short-circuit capacitor QS11, a first connection transistor QC11, a second connection transistor QC12 and a third connection transistor QC13. A second terminal RF2 is connected to the drains of a second shorting transistor QS12, a fourth connecting transistor QC14, a fifth connecting transistor QC15 and a sixth connecting transistor QC16. The sources of the transistors QC1 and QC14 are connected to a first common terminal RFCOM1. The sources of the transistors QC12 and CQ15 are connected to a second common terminal RFCOM2. The sources of the transistors QC13 and QC16 are connected to a third common terminal RFCOM3. The sources of transistors QS11 and QS12 are each grounded. The gates of the transistors QS11 and QS12 are connected through the resistors R11 and R12 to the terminals GS11 and GS12. The gates of the transistors QC11 to QC16 are connected to the terminals GC11 to GC16 through resistors R13 to R18.

In Fig. 37 (b), each of the three AND circuits AND1, AND2 and AND3 has three inputs including an inverted input. A first control terminal Vcont11 is connected to the inverted input of the AND circuit AND1, the inputs of AND2 and AND3, a terminal GC11 and a terminal GC14 via an inverter Inv12. A second control terminal Vcont12 is connected to the inverted input of the AND circuit AND2, the inputs of AND1 and AND3, a terminal GC12 and a terminal GC15 via an inverter Inv13 as shown. A third control terminal Vcont13 is connected to the inverted input of the AND circuit AND3, the inputs of AND1 and AND2, a terminal GC13 and a terminal GC16 via an inverter Inv14. The outputs from the AND circuit AND1 and AND3 are applied to an OR circuit OR1. The output from the OR circuit OR1 is connected to the terminal GS11 and to the terminal GS12 via an inverter Inv11.

The operation of the structure described above will now be shown. When low, high and high potentials are applied to the control terminals Vcont11 to Vcont13 as shown in Table 3, only the high potential output from the AND circuit AND1 can be obtained. Low potential outputs are obtained from the AND circuits AND2 and AND3. Therefore, there is a high potential at the terminal GS11 and a low potential at the terminal GS12. As a result, the transistor GS11 becomes conductive, so that the input of the first terminal RF1 is grounded. The transistor QS12 becomes nonconductive so that the input is received by the second terminal RF2. The terminal GC14 is at a high potential and the transistor QC14 is turned on so that the second terminal RF2 and the first common terminal RFCOM1 are connected to each other. Since the terminals GC15 and GC16 are at low potential, the transistors QC15 and QC16 are turned off, so that no connection is made between the other common terminals. The terminals GC12 and GC13 are at high potential so that the transistors QC12 and QC13 are turned on. Since the first terminal RF1 is grounded as described above, no signal is transmitted to the second and third common terminals.

As described above, only one of the potentials applied to the first to third control terminals Vcont1 to Vcont3 assumes a low value and the other potentials are high, or only one of the potentials takes a high value and the other potentials have a low value. As a result, the potential of each section changes as shown in Table 3, so that a signal line as described is achieved. Accordingly, an operation as a matrix switch for switching two terminals to three common terminals can be achieved, in which a connection between any of two terminals (RF1, RF2) and any of three common terminals (RFCOM1 to RFCOM2) is independently made by only one pair become. The signal flow can also be inverted in comparison to the above description.

When a GaAsFET is used as the FET, similar to the structure shown in FIG. 35, ground potential is applied as the high potential, and a negative potential sufficient to pinch off the channel is used as the low potential. When a MOSFET is used, ground potential is applied as the low potential, and a positive potential capable of forming a sufficient channel is applied as a high potential. In this way, the above effect can be achieved.

Now, a third matrix switch for switching two terminals to a plurality of common terminals will be described with reference to Fig. 38 which is a circuit diagram and with reference to Table 4 which shows the operation of each part of the circuit with respect to the control potential of the control terminal , Table 4

Fig. 38 (a) shows a transistor matrix part, and Fig. 38 (b) shows a control circuit part. In Fig. 38 (a), all the transistors FETs are similar to those in the embodiment of Fig. 35.

In Fig. 38 (a), the first and second terminals RF1 and RF2, the first to third common terminals RFCOM1 to RFCOM3, the first and second short-circuit transistors QS21 and QS22, the first to third connection transistors QC21 to QC23, and the fifth to seventh connection transistors QC25 to QC27 similar to the corresponding parts according to the embodiment of Fig. 37 (a). In contrast to this embodiment, a fourth common terminal RFCOM4 is added, and fourth to eighth connection transistors QC24 to QC28 whose sources are connected to the fourth common terminal RFCOM4 are added.

The structure of Fig. 38 (b) differs from that of Fig. 37 (b) in that each of the AND circuits AND21 and AND24 has four inputs including an inverted input, and a fourth control terminal Vcont24 and an inverter Inv25 are added , The other parts are similar to those of the structure in Fig. 37 (b).

The operation of the above structure will now be described.

As shown in Table 4, when low, high, high and high potentials are applied to the control terminals Vcont21 to Vcont24, only high potential can be obtained from the AND circuits AND21 and obtained from the AND circuits AND22, AND23, AND24 you have a low potential. Therefore, the connection GS21 is at high potential and the connection GS22 is at low potential. The transistor GS21 becomes conductive so that the input through the first terminal RF1 is grounded. The transistor QS22 becomes nonconductive so that the input is received by the second terminal RF2. The terminal GC24 is at a high potential and the transistor GC25 is turned on so that the second terminal RF2 and the first common terminal RFCOM1 are connected to each other. Since terminals GC26, GC27, and GC28 are at low potential, transistors QC26, QC27, and QC28 are turned off, so no connection to another common terminal is made. Terminals GC22, GG23 and GC24 are at high potential so that transistors QC22, QC23 and QC24 are turned on. Since the first terminal RF1 is grounded as described above, no signal is transmitted to the second, third and fourth common terminals RFCOM2 to RFCOM4.

As described above, only one of the potentials applied to the first, second, third and fourth control terminals Vcont21 to Vcont24 assumes a low value and the other potentials have a high value or only a potential has a high value and other potentials have a low value. Therefore, the potential of each part is changed as in Table 4 so that a signal line as shown in Table 4 takes place. Accordingly, the operation as a matrix switch for switching two terminals to four common terminals can be achieved, and the connection between any one of two terminals (RF1, RF2) and any one of four common terminals (RFCOM1 to RFCOM4) is made independently by only one pair , The signal flow can also be inverted compared to the previous description.

In the case where a gallium arsenide FET (GaAsFET) is used as the FET, similar to the structures of Figs. 35 and 37, ground potential is applied as the high potential and negative potential sufficient to cut off the channel becomes low Potential created. In the case where a metal oxide FET (MOSFET) is used, ground potential is applied as a low potential, and a positive potential capable of sufficiently forming a channel is used as a high potential. In this way, the above effect can be achieved.

As described above, each of the circuits of Figs. 35 and 37 is constructed so that either the first terminal or the second terminal is grounded via the short-circuiting transistor. A control circuit controls the gate of the connection transistor to establish the connection between the first terminal or the second terminal which is not grounded and any of k (1≤k≥n) common terminals, so that the operation of a matrix switch for switching two ports after n common ports is performed so that the connection between any of two ports (RF1, RF2) and any one of n common ports (RFCOM1 to RFCOMn) is made independently by only one pair. When n is 4 or more, the control circuits and the control terminals of the control circuits must be increased, as can be understood from the difference between the circuits of FIGS. 37 and 38.

Fig. 39 is a circuit diagram showing a third matrix switch for switching two terminals after a plurality of common terminals. The difference between the two-terminal switching matrix switch after two common terminals of Fig. 39 and that of Fig. 35 is that a DC isolation capacitor is provided between each terminal, the source of each connection transistor and the ground. In addition, Vref is added to provide a reference voltage to the source of each connection transistor and the source of the short-circuit transistor.

As a result of the foregoing structure, the reference value of the gate voltage for controlling the switching of the transistor can be changed with respect to the magnitude of Vref. When a GaAsFET is used as the FET, ground potential is needed as high potential and negative potential is needed as low potential. When the positive part having the same absolute value as the negative potential used as the low potential is applied as Vref in the foregoing structure, by using ground potential as the low potential and the positive potential which is the same as Vref, as a high potential similar operation can be achieved.

Of course, the foregoing structure can also be applied to a matrix switch for switching from two terminals to multiple terminals having not less than three terminals.

Although the circuit has been described for the gallium arsenide FET and the metal oxide FET, the transistor is not limited to these types. Any transistor that has the desired characteristics can be used regardless of material and structure.

The control circuit is not limited to the described control circuit. For example, a microcomputer with which similar potentials of the control signals can be applied to the short-circuit and connection transistors can be used. In the foregoing case, the control may be such that only one connection transistor, for example in the structure of FIG. 35, becomes conductive. The use of microcomputers has the advantage that the number n of common connections increases.

As described above, according to the matrix switch for switching from two terminals to a plurality of common terminals, the number of elements can be reduced to achieve a similar operation, the transmission loss can be reduced, and the addition of other circuits enables the switching to a plurality of common connections.