A circuit for biasing a magnetoresistive sensor and amplifying signals produced thereby

The present invention relates to a circuit for biasing a magnetoresistive sensor and for amplifying the signals excited thereby.

Most existing magnetoresistive sensors, in particular sensors for bubble storage and magnetic recording, are biased with a constant current by preamplifiers, which detect the signal voltage generated at the sensor terminals. Since the stripe height is inversely proportional to the sensor resistance and varies from sensor to sensor due to different manufacturing processes and changes in contact recording due to wear over the life of the sensor, it is desirable to detect signals generated by the sensor that are not related to the stripe height are dependent. It is therefore desirable to sense and amplify a voltage representing ΔRh / Rh or current representing ΔRh / Rh, where ΔRh is the change in resistance Rh of the magnetoresistive sensor that results from the magnetic input signal from the recording medium to be read.

European Patent No. EP-A-0241770, relevant under Article 54 (3) EPC, describes a transimpedance amplifier for biasing a magnetoresistive sensor with a current having a constant time average and for amplifying deviations from this constant value, that arise as a result of changes in the stationary resistance value of the sensor. DC current feedback compensates for the current flow in both paths of a differential input stage to correct the DC offset voltage, which can otherwise develop at the output.

The invention provides a circuit to apply a magnetoresistive sensor to a constant bias and to amplify the signals generated thereby, this circuit comprising:

a magnetoresistive sensor having a steady resistance;

an amplifier means having an input stage responsive to voltage deviations from the constant bias voltage applied to the sensor to produce an amplified output signal at an output stage of the amplifier means which represents the changes in the steady state resistance of the sensor due to changes in the magnetic field caused by the Sensor exposed results;

wherein the input stage has at least two transistors connected with the magnetoresistive sensor between the bases of the transistors of the pair in a differential pair arrangement, and an emitter resistor connected between the emitters of the differential pair, the emitter of a transistor of the pair is connected to the first constant current source and the amplifier means has a connecting means, which connects the emitter resistor to the bases of the differential pair, whereby the bias voltage is related to a voltage generated by a current of the first constant current source flowing through the emitter resistor.

Two embodiments of a voltage amplifier according to the invention for the constant bias and the amplification of the signals generated by a magnetoresistive sensor are described here. In both circuits, the differential input stage has an integrated offset correction derived from emitter resistors and a high-impedance current source. The circuits differ in the configuration of the transconductive feedback to minimize the DC error signal at the amplifier output.

Electrically, the resistance Rh of the magnetoresistive sensor lies between the bases of two transistors connected in a differential pair arrangement, which comprise the input stage of the amplifier. The bias voltage applied to the magnetoresistive sensor is kept constant because it arises independently of the sensor resistance as a product of the emitter resistance of the input stage and half of the current from a constant current source.

In the circuit configurations according to the invention, the signal representing ΔRh / Rh is detected as a time-variable voltage at the magnetoresistive sensor. The steady-state value of Rh refers to the resistance value of Rh while a bias is applied but no magnetic field changes are detected.

The amplifier can have as many input stages as there are magnetoresistive sensors in the system in question. The other components of the amplifier include the output and feedback stages, which are common to all input stages in a multi-head system and can be switched back and forth between them. In addition, circuits can be added to shorten the settling time when activating and deactivating magnetoresistive sensors in a multi-sensor system.

The embodiment of the invention will now be described by way of example with reference to the accompanying drawings, in which:

1A and 1B are the basic circuit diagrams of the two amplifiers according to the invention;

Fig. 2 is a circuit diagram of an amplifier according to Fig. 1A;

Figure 3 is a block diagram showing the coupling of selectable input stages to the common amplifier stage;

Figure 4 is a circuit diagram of the individual selectable input stages of the amplifier of Figure 3;

Figure 5 is a circuit diagram of the common amplifier stage of Figure 3;

Figure 6 is a circuit diagram of an amplifier of Figure 1B;

FIGS. 7A and 7B are circuit diagrams of expansions to shorten the settling time of the amplifiers according to FIGS. 5 and 6, when magnetoresistive sensors are activated and deactivated in a system comprising several sensors.

1A and 1B, transistors T1a and T1b form a differential amplifier input stage with a built-in offset emitter resistor RE. J1 is a voltage source with high input impedance, so this input stage provides true differential signal processing for AC signals. DC and low frequency errors at the output, at R4a and R4b, are minimized by feedback circuits in both configurations. The magnetoresistive sensor, shown here as an equivalent circuit with the resistor Rh and the voltage source Vi, is coupled between the bases of the transistors T1a and T1b.

In the configurations of Figs. 1A and 1B, the output of the feedback stage g & sub0; a current and the input quantity a voltage. The feedback amplifier g & sub0; is a transconductance amplifier. The amplifier G in FIG. 1A contains an RC element which provides a main pole for separating low-frequency error signals from high-frequency information signals. The error signal is subtracted from the information signal Vi at the bases of the transistors T1a and T1b.

When the error signal is minimized, the current from the constant current source J1 is evenly divided between the transistors T1a and T1b, so that a reference voltage Vre arises at the emitter resistor RE which corresponds to the product of RE and half of the current supplied by the current source J1. Vre thus lies between the bases of the transistors T1a and T1b and is therefore the voltage with which the magnetoresistive sensor Rh is biased regardless of its resistance value.

In the configuration shown in Fig. 1A, the differential voltage amplifier stage G couples transistors T1a and T1b of the input differential stage to the transconductance amplifier g0. In addition, as shown elsewhere in this description, the amplifier stage G provides a main pole for the control of the low-frequency error signals. The DC voltage at the Rh sensor is kept constant regardless of the Rh value by regulating the current flowing through it. The configuration in Fig. 1A provides a ground potential at the common connection point of the input resistors R1a and R1b, which becomes the average potential of the magnetoresistive sensor. If the average potential of the sensor is the earth potential, corrosion and electrostatic discharge are reduced and the reliability of the sensor is improved. The average potential of the magnetoresistive sensor could also be applied to any desired voltage in this circuit.

In the configuration shown in Fig. 1B, the transconductance amplifier comprises g & sub0; a single ended push-pull amplifier stage with a resistor at the output. The current through the sensor Rh is regulated in the same way as described for the configuration in Fig. 1A. The resistors R1a and R1b determine the input impedance of the amplifier and act as part of the RC element in a resistance divider configuration with the sensor Rh. 1B, the capacitor C also reduces the noise in the amplifier g & sub0; at information signal frequencies.

In Fig. 2, with further reference to Fig. 1A, amplifier G includes a differential voltage follower and the input at transconductance stage g 0. The differential voltage follower contains the transistors T3a and T3b, the resistors R2a and R2b and the current sources J3a and J3b.

The input part of the transconductance stage consists of the transistors T4a and T4b, the resistors R3a and R3b, the capacitor C and the current source J4. the rest of the transconductance level g & sub0; is a current mirror consisting of the transistors D1a and D1b, T2a and T2b and the current sources J2a and J2b.

The general voltage gain transfer function of the entire amplifier is calculated <heading>Equation (1)</heading>

for Ri »Rh and ft» fpole

The terms for equation (1) are defined as follows:

Rb = series base resistance of T1

B = forward current gain

rE = (k T / q Ic &amp; sub1;

rb = series base resistance of T4 (includes R2)

re = (k T / q Ic 4)

ft = device transit frequency

fpole = main pole frequency

Rh = resistance at the MR head (stationary value)

Ic1 = Collector current of T1

IC4 = Collector current of T4

k = Boltzmann constant

T = absolute temperature

q = electron charge

For the voltage gain transfer function at high frequencies <heading>Equation (2)</heading>

for f »(1 / (4 π C R 3))

The voltage gain transfer function at low frequencies is calculated <heading>Equation (3)</heading>

The transfer functions (1), (2) and (3) are approximate formulas since they do not take fluctuations in the transfer frequency of the transistors and the transistor forward current gain into account. The amplifier has a high-pass frequency response.

In order to make it easier to switch from one magnetoresistive sensor to another in a system consisting of several sensors, the circuit shown in FIG. 2 can be divided into several selectable input stages g 1, g 2. ... gn, each of which is assigned to a single sensor. Such input stages are coupled to a common stage gc as shown in FIG. 3.

4 and 5, the input stages g &amp; sub1; to gn coupled to a common stage gc at the nodes N1, N2, NF1 and NF2. Transistors T33 and 34 are cascode-coupled to expand the frequency response in the high frequency range when multiple input stages are coupled to a common stage.

The common level g &amp; sub0; comprises the voltage follower stage and the input of the transimpedance stage from FIG. 2. The RC element, from which the main pole is formed, is in the common stage g 0. so fewer capacitors are needed. The RC element comprises the capacitor C and the resistors R3a and R3b. If the resistors R5a, R5b, R5c and R5d in Fig. 4 are the same and the resistors R6a, R6b, R6c, R6d, R6e and R6f are also the same, the transimpedance gain is identical to the gain in the amplifier from FIG. 2 if the emitter area ratios of the transistors D1a, D1b, T2a, T2b, D6a, D6b , T6a, T6b, T6c and T6d are the same and the current sources J6 and J4 are also the same.

To achieve a desired input stage g &amp; sub1; power sources J0a, J1, J5 and J6a must be activated at the same time. The unwanted input stage is deactivated accordingly by deactivating the associated power sources. The transistors T6a and T6b correspond to the current sources J2a and J2b in FIG. 2. The current source J5, the resistor R8 and the transistors D5, T5a, T5b and T7 serve to select the corresponding current mirror when activating various magnetoresistive sensors.

In order to minimize the DC offset at the output of the common stage and at the same time to maintain stationary low frequency bandwidths, a feedforward control is used. 4 and 5, the current from current source J0b is mirrored by the current mirror comprising D16 and T2b and flows into one terminal of Rh while the current from current source J0a is drawn from the other terminal of Rh.

Thus, an offset current flows through Rh, the optimal value of which is represented by

Equation (4)

Vodc = Az [(J 1/2) RE - J0 Rh]

where J0 = J 1 RE / 2Rh.

5 and 6, the currents from the current sources J6a and J6b are still the same during the stationary operation of the circuit. These currents can be temporarily higher during the switching process, ie when the input stages are activated or deactivated. To regulate and reduce the settling time of the circuit, the currents from the current sources J6a and J6b are regulated by an additional control line, with which the value of the current is changed at the moment of the switching operation. After the transition currents have subsided, the currents from the current sources mentioned can return to their original values. By increasing the current from the current sources J6a and J6b, the Discharge the capacitor C available current temporarily stronger, and the control gain of the circuit is increased accordingly.

Alternatively, the recovery of the transition currents when switching can be controlled by the feedback circuit shown in FIG. 7A. The operation of the circuit shown in Fig. 7A is described in European Patent No. EP-A-0241770. The nodes N3a, N3b, N4a and N4b are coupled to the corresponding nodes of the common stage from FIG. 5.

The configuration in FIG. 1B is implemented according to the circuit shown in FIG. 6, in which two selectable input stages are shown. Block g &amp; sub0; consists of a differential voltage follower and a push-pull transconductance stage. The differential voltage sequence consists of the transistors T3a and T3b, the resistors R2a and R2b and the current sources J3a and J3b. The push-pull transconductance stage comprises an input stage and a right and a left current mirror. The input stage consists of transistors T4a and T4b and current source J4. The left current mirror consists of transistors D1b, T2b, T27 and T6 and resistors R5c, R5d, R6 and R28. The right current mirror consists of transistors D1a and T2a and resistors R5a and R5b.

The resistance divider of FIG. 1B is selectable in the circuit shown in FIG. 6. The output of the transconductance amplifier at node 5 is also the common connection for the plurality of resistor divider elements. The desired divider is selected simultaneously with the selection of the desired sensor / input amplifier combination. For example, if the sensor Rha is desired, the transistors T29 and T31 are activated simultaneously by applying the corresponding control signal to the control node "sel a". This control node simultaneously selects the desired divider and the sensor / input amplifier. If sensor Rhb is desired, an associated control signal is accordingly applied to control node "sel b". For the circuit configuration shown, the control signal at each of the input nodes consists of a negative voltage.

The general voltage gain transfer function of the amplifier shown in Figure 6 is calculated <heading>Equation (5)</heading>

for ft »fpole, the terms for equation (5) being described elsewhere in this patent.

The voltage gain transfer function at high frequencies is calculated for the circuit of FIG <heading>Equation (6)</heading>

for f »(L1 / (4 π C RL1)

The following applies to the circuit in FIG. 6 for the voltage amplification transfer function at low frequencies <heading>Equation (7)</heading>

The transfer functions (5), (6) and (7) are approximate formulas since they do not take fluctuations in the transfer frequency of the transistors and the transistor forward current gain into account. The amplifier has a high-pass frequency response.

As with the circuits in FIGS. 4 and 5, a feedforward control is used to minimize the DC offset at the output. The current source J0 delivers an offset current through the activated Rh. The optimal value of such an offset current can be adjusted

Equation (8)

Vodc = A &amp; sub2; [(Ic 30/2) RE - J0 Rh]

can be estimated. The following applies here: J0 = Ic 30 RE / 2Rh, where Ic 30 is the collector current of T &amp; sub3; &amp; sub0; is.

Similar to the circuit configuration in FIGS. 4 and 5, the gain by the transconductance amplifier and the current available for charging and discharging the capacitor C can be increased to reduce the settling time of the circuit when switching. The increase in gain and charge or discharge current is achieved as described above for the circuit configurations of FIGS. 4 and 5. Alternatively, the recovery time when switching can be adjusted with the help of the 7B can be regulated, the operation of which is described in European Patent No. EP-A-0241770. The nodes 5, 6A and 6B show the connection of this circuit to correspondingly labeled nodes of the circuit of FIG. 6.