Micro-electro-mechanical transducer having an insulation extension

Microelectromechanical transducer with insulating extension

[0001] This application claims priority for the following U.S. provisional applications: No. 60/692,038 filed on June 17, 2005; No. 60/705,606 filed on August 3, 2005; Filed on April 4, 2006 No. 60/744242, the contents of these patents are incorporated herein by reference in their entirety.

[0002] This application also incorporates the entire contents of the following applications by reference:

[0003] The International Application (PCT) No. PCT/IB2006/051567 named METHODS FOR FABRICATING MICRO-ELECTROMECHANICAL DEVICES filed on May 18, 2006;

[0004] International Application (PCT) No. PCT/IB2006/051568 named MICRO-ELECTRO-MECHANICALTRANSDUCERS filed on May 18, 2006;

[0005] The International Application (PCT) No. PCT/IB2006/051569 named MICRO-ELECTRO-MECHANICALTRANSDUCERS filed on May 18, 2006.

Technical field

[0006] The present application relates to a microelectromechanical device having movable mechanical parts for energy conversion, and more particularly to a micromachined ultrasonic transducer (MUT) such as a capacitive micromachined ultrasonic transducer (cMUT).

Background technique

[0007] Microelectromechanical transducers usually share common features, which include movable mechanical parts for energy conversion. An example of such a microelectromechanical transducer is a micromachined ultrasonic transducer (MUT). The ultrasonic transducer performs a series of energy conversion to realize its transducer function. In its receiving mode, the acoustic energy of ultrasonic waves propagating in the medium where the transducer is placed is converted into the mechanical energy of the movable part (usually the diaphragm) in the transducer. The movement of the movable part is then converted into a detectable electromagnetic (usually electrical) signal. In its transmitter mode, the reverse energy conversion process occurs.

[0008] Various types of ultrasonic transducers for transmitting and receiving ultrasonic waves have been developed. Ultrasonic transducers can work in a variety of media, including liquids, solids and gases. These transducers are commonly used for medical imaging, biochemical imaging, non-destructive detection of materials, sonar, communications, proximity sensors, airflow measurement, field process monitoring, acoustic microscopy, underwater sensing and imaging for diagnosis and treatment And others. In addition to discrete ultrasonic transducers, ultrasonic transducer arrays containing multiple transducers have also been developed. For example, two-dimensional array ultrasound transducers have been developed for imaging applications.

[0009] Compared with the widely used piezoelectric (PZT) ultrasonic transducer, MUT has advantages in device manufacturing method, bandwidth, and operating temperature. For example, manufacturing a conventional PZT transducer array involves cutting and connecting individual piezoelectric elements. This process is full of difficulties and high costs, not to mention the large input impedance mismatch problem to the transmitting/receiving electronic device caused by these components. In comparison, the micromachining technology used in the manufacture of MUTs is more competent to manufacture such arrays. In terms of performance, MUT proved the dynamic performance comparable to that of the PZT transducer. For these reasons, MUT is becoming a compelling alternative to piezoelectric (PZT) ultrasonic transducers.

[0010] Among several MUTs, capacitive micromachined ultrasonic transducers (cMUT) are widely used, which use electrostatic transducers. Figure 1 shows a cross-sectional view of the basic structure of the prior art cMUT. The cMUT of FIG. 1 is structured on the substrate 11. Each cMUT unit has a parallel plate capacitor, which is composed of a rigid bottom electrode 12 and a top electrode 14 on or in a flexible film 16 for transmitting or receiving sound waves in an adjacent medium. The flexible membrane 16 in each unit is supported by an anchor 18. Membrane 16 and substrate 11 and top electrode

12 are spaced apart to define a transducing space 19 therebetween. A DC bias is applied between the electrodes 12 and 14 to deflect the membrane 16 to the optimal position for cMUT operation, usually with the goal of maximizing sensitivity and bandwidth. During transmission, an AC signal is applied to the transducer. The alternating electrostatic force between the top electrode and the bottom electrode excites the membrane 16 in order to transfer acoustic energy into the medium (not shown) surrounding the cMUT. During the receiving period, the emitted sound wave vibrates the membrane 16, thus changing the capacitance between the two electrodes. The electronic circuit detects this change in capacitance.

[0011] Electrical insulation between the two electrodes 12 and 14 is required for proper operation. A basic form of this insulation is provided by an anchor 18, which may be formed of an insulating material and at the same time provide support between the two electrodes 12 and 14. In addition to the anchor 18, another insulating layer (not shown) may be provided between the two electrodes 12 and 14 of the cMUT 10 to prevent electrical shorts during the operation of the transducer. Generally speaking, the gap between the two cMUT electrodes 12 and 14 affects the transduction performance of the cMUT, while the thickness of the insulating layer and the height of the anchor 18 affect the breakdown voltage and parasitic capacitance of the cMUT transducer in a competitive manner. Generally, a smaller separation gap is desired to obtain better cMUT transduction performance, and a thicker insulating layer and a higher anchor are desired to increase the breakdown voltage and reduce the parasitic capacitance. Therefore, the design of cMUT usually compromises between these two competing factors and compromises the performance of cMUT.

[0012] Due to the importance of these MUT devices, it is generally expected to improve the technology in terms of performance, functionality, and manufacturability, and especially to optimize the energy conversion performance, breakdown voltage and parasitic capacitance reduction.

Summary of the invention

[0013] This patent application discloses a microelectromechanical transducer (such as a cMUT) having two conductive layers (for example, electrodes) separated by an insulator containing insulating extensions. The two conductive layers define a transduction gap therebetween. The insulator has an insulating support generally arranged between two conductive layers and an insulating extension extending into at least one of the two conductive layers. The use of insulating extensions can increase effective insulation without increasing the transduction gap. This patent application also discloses a method for manufacturing microelectromechanical transducers. The technology of the present invention can be used for conventional membrane-based cMUTs and cMUTs with embedded springs with moving rigid top plates.

[0014] In one embodiment, the main conductive layer (the conductive layer into which the insulating extension extends) is thicker than the insulating extension so that the insulating extension is included in the conductive layer. The conductive layer may include a base conductive layer and a supplementary conductive layer, and the conductivity of the supplementary conductive layer is significantly higher than that of the base conductive layer. The two layers can be formed on one silicon wafer with different doping levels. In one embodiment, the base conductive layer is a silicon layer and the supplementary conductive layer is a metal layer.

[0015] In one embodiment, the depth that the insulating extension extends into the conductive layer is at least 25% of the transduction gap, so effective insulation is significantly increased without increasing the transduction gap.

[0016] The insulating support and the insulating extension may be formed of the same insulating material or any combination of different insulating materials. The insulating support may be separated or connected to the insulating extension.

[0017] In one embodiment, the insulating extension is provided in a cavity formed in the main conductive layer. The insulating extension portion may be a solid material that completely fills the cavity or partially fills the cavity and leaves a partial gap therein.

[0018] The insulating extension portion may include two extension ends, the first extension end extends into the first conductive layer, and the second end extends into the second conductive layer. The two extension ends may have the same or different insulating layer materials.

[0019] In one embodiment, the insulating extension is located at a position where the two conductive layers are most likely to contact each other or close to each other during operation. It is also possible to use a motion brake that partially extends through the transduction gap to limit the maximum transduction distance.

[0020] The microelectromechanical transducer according to the present invention may be a capacitive micromachined ultrasonic transducer, in which the first conductive layer is used as a bottom electrode, and the second conductive layer is used as a movable top electrode. A conductive substrate such as a silicon wafer can be used as the bottom electrode. The second conductive layer may have an elastic film supported by an insulating support.

[0021] According to the first aspect of the present invention, the insulating extension is coupled to a microelectromechanical transducer with an embedded spring. The transducer includes (1) a substrate; (2) a middle elastic layer arranged on the substrate, the substrate and the middle elastic layer define a cavity therebetween, the cavity is bounded by a side wall, wherein the middle elastic layer Extending from the side wall to cover the cavity; (3) an insulating connector on the middle elastic layer; (4) a top plate arranged on the insulating connector, wherein the insulating connector separates the top plate from the middle elastic layer to define a lower part of the top plate Transduction gap; and (5) Insulation extension that extends beyond the transduction gap.

[0022] In one embodiment, the top plate includes a conductive layer and an insulating extension extending into the conductive layer. For example, the top plate may have a silicon/polysilicon layer, and the insulating extension extends into the silicon/polysilicon layer. For more effective electrodes, the top plate may also include a metal layer.

[0023] In another embodiment, the intermediate elastic layer includes a conductive layer and an insulating extension extending into the conductive layer. Alternatively, the substrate is conductive, and the insulating extension portion extends into the conductive substrate.

[0024] The microelectromechanical transducer with an embedded spring may be a capacitive micromachined ultrasonic transducer with a bottom electrode and a top electrode. The bottom electrode may be a part of the substrate and/or the middle elastic layer, and the top electrode may be a part of the top plate. The sidewall of the substrate may be conductive, and the bottom electrode may include at least a part of the sidewall of the substrate. The bottom electrode may also include a separate conductive layer deposited on the middle elastic layer or the substrate.

[0025] In one embodiment, the top plate is significantly stiffer than the middle elastic layer, and does not substantially bend when moved by the vertical displacement of the insulating connector. The maximum vertical displacement of the top plate moving through the transducing space can be limited by the motion brake.

[0026] In another embodiment, a capacitive micromachined ultrasonic transducer (cMUT) includes: (1) a bottom layer including a substantially stationary substrate and serving as a bottom electrode; (2) a top layer including a film and serving as a top electrode, the film It is suitable for inducing transduction excitation by vibrating with respect to the stationary substrate, the top layer and the bottom layer define a transduction gap therebetween; and (3) an insulator having a main part and an insulating extension, the main part is generally arranged between the bottom layer and the top layer and The bottom layer and the top layer are supported, and the insulating extension part extends into at least one of the bottom layer and the top layer.

[0027] In one embodiment, at least one of the bottom layer and the top layer has a conductive layer thicker than the insulating extension, so that the insulating extension is included in the conductive layer.

[0028] Another aspect of the present invention relates to a method for manufacturing a microelectromechanical transducer having two electrodes separated by an insulator containing insulating extensions. The method includes the following steps: (1) forming a groove on the main surface of the first conductive layer; (2) forming a support feature of insulating material that extends from the groove on the main surface of the first wafer material To the free end; and (3) placing the second conductive layer on the free end of the support feature.

[0029] The first conductive layer may include a silicon/polysilicon layer. The step of forming the groove may include a direct etching process, a differential oxidation process, or any combination thereof. The step of forming support features may include growing an insulating layer on the groove and patterning and etching the insulating layer. The step of disposing the second conductive layer on the free end of the support feature may include bonding the SOI wafer to the free end of the support feature and deep etching the SOI wafer to leave the desired portion of the SOI layer on the support feature. The step of providing the second conductive layer may further include depositing a metal layer on the remaining layers of the SOI wafer. The desired portion of the SOI wafer remaining on the support feature may include a silicon/polysilicon layer that forms at least a portion of the second conductive layer. In one embodiment, the desired portion of the SOI layer remaining on the support feature provides a film layer adapted to vibrate relative to the first conductive layer under appropriate transduction excitation. Instead of using SOI wafers, wafers that carry functional layers such as nitride, oxide, metal, parylene, or other polymer layers to serve as a desired film layer may be used.

[0030] In an embodiment of the above method, the step of disposing the second conductive layer on the free end of the supporting feature includes: (1) depositing a sacrificial layer on the first conductive layer and the supporting feature; (2) Depositing a functional layer on the sacrificial layer; and (3) removing the sacrificial layer to leave the functional layer on the free end of the support feature. The step of arranging the second conductive layer is also included in the function

A metal layer is deposited on the layer. The functional layer may include a silicon/polysilicon layer forming at least a part of the second conductive layer. The functional layer on the support feature may be a film layer adapted to vibrate relative to the first conductive layer under appropriate transduction excitation.

[0031] Another method for manufacturing a microelectromechanical transducer having two electrodes separated by an insulator containing insulating extensions includes the following steps: (1) on the main surface of the substrate by removing the material of the substrate Forming a patterned trench, where the patterned trench includes thin lines of unremoved material of the substrate; (2) oxidizing the thin lines of unremoved material of the substrate in the patterned trench, so that the patterned trench constitutes an insulator; (3) Pattern and etch the main surface of the silicon/polysilicon substrate so that the insulator in the trench has a top end upright on the substrate; and (4) the top conductive layer is placed on the top of the insulator.

[0032] Another alternative method for manufacturing a similar microelectromechanical transducer includes the following steps: (1) forming a trench on the main surface of the substrate by removing the material of the substrate; (2) using an insulating material Fill the trench; (3) Pattern and etch the main surface of the silicon/polysilicon substrate so that the insulating material in the trench has a top upright on the substrate; and (4) Place the top conductive layer on the top of the insulator.

[0033] The method is also used to incorporate an insulating extension according to the invention into a microelectromechanical transducer with embedded springs. An exemplary method for manufacturing such a transducer includes the following steps: (1) providing a top plate, a middle elastic layer, and a substrate; (2) a main layer that can serve as either the top plate and the middle elastic layer A supporting feature of insulating material is formed on the main surface, wherein the supporting feature extends from a point below the main surface to a free end beyond the main surface; and (3) joining the top plate, the middle elastic layer and the substrate so that the top plate and the middle elastic layer The support feature is connected at its free end, while the middle elastic layer is connected to the substrate on the opposite picture. In the resulting transducer, the substrate and the middle elastic layer define a cavity therebetween, the cavity is bounded by a side wall, and the middle elastic layer extends from the side wall to cover the cavity.

[0034] In one embodiment, the main layer includes a silicon/polysilicon layer, and the step of forming the support features includes: (1) forming a groove on the main surface of the silicon/polysilicon layer; and (2) by forming a groove on the main surface of the silicon/polysilicon layer; Insulating material is introduced above to form support features. Alternatively, the step of forming the support feature includes the following steps: (1) a patterned trench is formed on the silicon/polysilicon layer by removing the silicon/polysilicon material, wherein the patterned trench includes fine lines of unremoved material of the silicon/polysilicon layer; 2) Oxidize the thin lines of unremoved material of the silicon/polysilicon layer in the patterned trench so that the patterned trench contains a non-conductive structure; and (3) pattern and etch the silicon/polysilicon layer to remove the silicon/polysilicon layer from the non-conductive structure in the trench. The conductive structure forms the support feature. Instead of using patterned trenches, simple trenches (without fine internal structures such as thin lines from which material is not removed) can be formed and filled with insulating materials.

[0035] The above and other features and advantages will be more apparent from several embodiments described in detail below with reference to the accompanying drawings.

Description of the drawings

[0036] FIG. 1 shows a cross-sectional view of the basic structure of a prior art cMUT.

[0037] FIG. 2 shows an enlarged part of a prior art cMUT to illustrate the relationship between the height of the insulating anchor and the interval between two electrodes.

[0038] FIG. 3 shows an enlarged portion of another prior art cMUT to further illustrate the relationship between the height of the insulating anchor and the spacing between the two electrodes.

[0039] FIG. 4 shows an enlarged part of an electrostatic transducer according to the present invention.

[0040] FIGS. 4a and 4b show two variants of the insulating extension concept shown in FIG. 4.

[0041] FIGS. 5-7 show additional variants of the insulating extension concept shown in FIG. 4.

[0042] FIG. 8 is a cross-sectional view of a cMUT structure using an insulating extension part according to the present invention.

[0043] FIGS. 9-14 are cross-sectional views of a variation of the cMUT structure using the insulating extension according to the present invention.

CN 101558552 Β

[0044] FIG. 15 is an enlarged view of a selected portion of an embedded spring microelectromechanical transducer (ESMUT).

[0045] FIG. 16 is an enlarged view of the different selected ESMUT parts of the complete ESMUT element.

[0046] FIG. 17 shows an ESMUT structure using an insulating extension part according to the present invention.

[0047] FIG. 18 shows another ESMUT structure using an insulating extension according to the present invention.

[0048] FIGS. 19.1-19.9a show an exemplary process flow diagram for bonding the insulating extension of the present invention to a conventional film-based cMUT using wafer bonding technology.

[0049] FIGS. 20.1-20.3 show an exemplary process of forming grooves on the surface of the oxidizable layer using an oxidation process.

[0050] FIGS. 21.1-21.3 show another exemplary process of forming grooves on the surface of an oxidizable layer using an oxidation process.

[0051] FIGS. 22.1-22.5 illustrate another exemplary process of forming groove patterns with different groove depths on a substrate using an oxidation process.

[0052] FIGS. 23.1-23.5 illustrate another exemplary process of manufacturing a desired groove pattern on a silicon substrate using an O 2 implantation and oxidation process.

[0053] FIGS. 24.1-24.5 show another process of making a desired groove pattern on a silicon substrate using O2 implantation and local oxidation of silicon (LOCOS).

[0054] FIGS. 25.1-25.7 show an exemplary method of forming a deep insulating extension in a conventional cMUT with a flexible film surface.

[0055] FIGS. 26.1-26.7 show another method of forming deep insulating extensions by etching.

[0056] FIGS. 27.1-27.16 show a wafer bonding process for manufacturing an ESMUT with insulating extensions according to the present invention.

[0057] Detailed description

[0058] The microelectromechanical transducer such as capacitive micromachined ultrasonic transducer (cMUT) of the present invention will be described in detail with the accompanying drawings, and similar components in all the drawings are marked with similar reference numerals or words. The microelectromechanical transducer can be manufactured using any suitable method, especially the methods disclosed in the several patent applications identified herein.

[0059] The invention is described below with reference to specific embodiments. In most cases, the cMUT structure is used to illustrate the invention. However, it should be appreciated that the present invention is not limited to cMUT. It will be clear to those skilled in the art that various modifications can be made and other embodiments can be adopted without departing from the broader scope of the present invention. Therefore, these or other changes to specific embodiments should be covered by the present invention. Those skilled in the art will realize that the various features disclosed in combination with the embodiments can be used individually or in combination.

[0060] In this document, a conductive material is defined as having a resistivity of less than 1 X 10⁴ Ω-cm material. So in this case silicon and polysilicon are regarded as conductive materials. A good conductive material preferably has a resistivity less than IQ-cm. Unless otherwise specified, the terms "insulating material" and "dielectric material" are used interchangeably, and they are defined as having a resistivity greater than 1×10⁴ Ω-cm material. Good insulating materials preferably have greater than 1 X ΙΟ⁸ Ω-cm resistivity. Insulators are generally composed of insulating materials but can include air and vacuum in special cases.

[0061] Note that the terms "transducer" and "transduction member" are used in a broad sense in this specification to include not only devices that perform executive and sensory functions but also devices that perform executive or sensory functions. It should also be noted that the term "cantilever" is used in a broad sense herein to describe a structure having an anchoring end, an elastic part extending from the anchoring end to the exerting end to activate or move the elastic part. Therefore, the cantilever does not necessarily mean a literal one-dimensional beam-shaped cantilever, but also includes similar structures with multiple beams extending in different directions, such as bridges or beams.

Include area or plane spring (two-dimensional "cantilever"), where the anchoring end is an extension line that is the closed perimeter of an area or part thereof, the elastic part is an extension area and the force application end can be a single point, a small area or an extension line (Closed end, open end or segment).

[0062] In order to illustrate the present invention, certain aspects of designs in accordance with the prior art are first discussed in accordance with the present invention. Note that for the purpose of clearer description, the discussion in this article will be based on the hindsight of the prior art design published in the present invention.

[0063] In order for the cMUT to work properly, electrical insulation between the two electrodes is required. A basic form of this insulation is provided by an anchor that also provides support between the two electrodes.

[0064] FIG. 2 shows an enlarged part of the prior art cMUT to illustrate the relationship between the height of the insulating anchor and the interval between the two electrodes. As shown in the figure, the Η gap is the height of the anchor insulator 28 and is defined by the electrode. The electrode spacing gap H between 22 and 24 is not determined or limited. In the structure shown in FIG. 2, the height of the insulator is also the same as the height of the electrode interval gap 1.

[0065] FIG. 3 shows an enlarged part of another prior art cMUT to further illustrate the relationship between the height of the insulating anchor and the interval between the two electrodes. In addition to the anchor insulator 38, another insulator layer 33 is also provided between the two electrodes 32 and 34 of the cMUT to prevent electrical shorts between the two electrodes 32 and 34 during the operation of the transducer. In addition, the total height of the insulator H is determined or limited by the electrode spacing gap between the electrodes 32 and 34. In the structure shown in FIG. 3, the total height of the insulator is the same as the height of the electrode gap.

[0066] The separation gap between two electrodes in an electrostatic transducer such as a cMUT affects the transducer performance. Generally speaking, a smaller separation gap leads to better transduction performance. On the other hand, the height of the insulator Ife steel affects the breakdown voltage and parasitic capacitance of the transducer. Generally, a thicker insulating layer and a higher anchor (that is, a larger H slit is desired to increase the breakdown voltage and reduce the parasitic capacitance. But because in the conventional design of an electrostatic transducer, the H slit is essentially It is determined or restricted by the liver, usually a compromise between these two competing factors, and a compromise or restriction on the performance of the transducer.

[0067] The present invention is conceived to eliminate the above limitations inherent in the prior art design of electrostatic transducers such as cMUT.

[0068] FIG. 4 shows an enlarged part of an electrostatic transducer according to the present invention. The electrostatic transducer has a bottom electrode 410 and a top electrode 420 separated from each other by a gap gap K. The interval between the bottom electrode 410 and the top electrode 420 defines a transduction space therebetween. The insulating support portion 430 is generally disposed between the bottom electrode 410 and the top electrode 420. The electrostatic transducer also has an insulating extension 440 extending into the bottom electrode 410.

[0069] The above design changes the relationship between the body and the grind. As shown, the H insulator is the sum of the height of the insulating support portion 430 and the thickness of the insulating extension 440. Although the height of the insulating support portion 430 is still limited by the electrode spacing gap, the thickness of the insulating extension 440 has nothing to do with this limitation, so a certain degree of design freedom is provided to avoid increasing the electrode spacing gap. Increase the total height of the insulator. Because the additional insulating extension 440 does not affect the interval between the two electrodes 410 and 420, it can be freely designed to have a desired thickness to achieve the desired breakdown voltage and parasitic capacitance without compromising the device's transduction performance.

[0070] By removing the relationship between the height of the insulator and the gap between the electrodes, the performance of the transducer can be improved by optimizing the electrode spacing of the transducer, and at the same time, the breakdown voltage and parasitic can be optimized without compromise. capacitance. This novel design can be used in a variety of electrostatic transducers and is especially important for improving the performance of high-frequency cMUTs.

[0071] As shown in the description of the manufacturing method herein, the insulating extension 440 may be formed in the electrode 410 in various ways. In one embodiment, a cavity is formed in the electrode 410 first, and then an insulating material is introduced into the cavity to form the insulating extension 440. The insulating material may be a solid material that completely fills the cavity, but may also be any other insulating material that completely fills the cavity or partially fills the cavity with partial voids therein.

[0072] The insulating extension portion 440 and the insulating support portion 430 may be made of the same insulating material or any combination of different insulating materials. In the configuration shown in FIG. 4, the bottom electrode 410 is thicker than the insulating extension 440 so that the insulating extension 440 is included in the bottom electrode 410. However, the insulating extension 440 may extend beyond the bottom electrode 410, especially if the bottom electrode 410 is part of a thicker combined layer that includes the insulating extension 440.

[0073] In another embodiment, the bottom electrode 410 may include a plurality of conductive layers or one conductive layer on a dielectric substrate. For example, the bottom electrode 410 may have a base conductive layer and a supplementary conductive layer. This can be the case: a silicon substrate is used as a base conductive layer and a supplementary conductive layer whose conductivity is significantly higher than that of the silicon substrate is used to form a more effective electrode. Examples of supplementary layers include polysilicon layers, metal layers or continuous parts of the same silicon substrate but with higher doping levels. In this case, the insulating extension 440 may extend beyond the supplementary layer and further into the silicon substrate.

[0074] The thickness of the insulating extension 440 extending in the bottom electrode 410 may be determined by design requirements for optimizing breakdown voltage, parasitic capacitance, and energy conversion performance. The extended thickness is essentially an unlimited design freedom except for performance considerations. For example, in one embodiment, the depth of the insulating extension 440 is at least 25% of the transduction gap to ensure a significant improvement.

[0075] The illustrated insulating extension portion 440 is wider than the insulating support portion 430 in its cross-sectional dimension. This configuration may be better for optimizing breakdown voltage and parasitic capacitance without having an excessive support area, but it is not required.

[0076] As shown in FIG. 4, the insulating extension portion 440 and the insulating support portion 430 may be directly connected to each other (in some embodiments, it may even be a continuous part of the same insulating material), or the two options shown in FIGS. 4a and 4b As shown in the structure, another insulating layer 435 is interposed therebetween.

[0077] Figures 5-7 show variations of the concept shown in Figure 4. In these drawings, similar components are indicated with similar or identical reference numerals. Except that the insulator in FIG. 5 has two insulating extensions 540 and 550 extending to the bottom electrode 510 and the top electrode 520, respectively, FIG. 5 shows an electrostatic transducer similar to that of FIG. Similar to FIG. 4, the bottom electrode 510 and the top electrode 520 are separated from each other by a gap. The spacing between the bottom electrode 510 and the top electrode 520 defines a transduction gap therebetween. The insulating support part 530 is generally arranged between the bottom electrode 510 and the top electrode 520. As shown, it is also expected to be the sum of the height of the insulating support portion 530 and the thickness of the insulating extension portions 540 and 550. For a given interval gap, the total height of the insulator can be optimized by adjusting the thickness of the insulating extension 540 or the thickness of the insulating extension 550 or both.

[0078] Except that the insulating extension in FIG. 6 has a slightly complicated structure, FIG. 6 shows another electrostatic transducer similar to FIG. 4. The insulating extension in the bottom electrode 610 includes a first part 640 and a second part 645, which are made of different insulating materials. As shown, the first portion 640 of the insulating extension is configured to define certain voids (occupied by the second portion 645 shown). The first portion 640 abuts the insulating support portion 630, and the second portion 645 of the insulating extension occupies the gap defined by the constructed first portion 640. In one embodiment, the second portion 645 includes air or a sealed vacuum.

[0079] FIG. 7 shows another electrostatic transducer similar to FIG. 5 with two insulating extensions extending to the bottom electrode 710 and the top electrode 720. However, the insulating extension parts in FIG. 7 each have a slightly more complicated structure than the opposite part in FIG. 5. The insulating extension in the bottom electrode 710 includes a first part 740 and a second part 745 that may be formed of different insulating materials. Similarly, the insulating extension in the top electrode 720 includes a first part 750 and a second part 755. As shown, the first portions 740 and 750 of the insulating extension are adjacent to the insulating support portion 730, and the second portions 745 and 755 of the insulating extension each occupy the gap defined by the first portions 740 and 750. In one embodiment, the second portions 745 and 755 each include air or a sealed vacuum.

[0080] The basic design of the above insulating extension part can be embodied in a variety of microelectromechanical transducers as shown below with reference to FIGS. 8-18 using cMUT as an example. Specifically, it can be used in a capacitive micromachined ultrasonic transducer, which includes: (1)

A bottom layer containing a substantially stationary substrate and used as a bottom electrode; (2) A top layer containing a film or plate and used as a top electrode. The film or plate is adapted to vibrate relative to the stationary substrate to induce transduction excitation, and the top and bottom layers are defined in between Transduction gap; and (3) an insulator having a main part and an insulating extension. The main part is generally arranged between the bottom and top layers and supports the bottom and top layers, while the insulating extension extends into at least one of the bottom and top layers.

[0081] It should be appreciated that although certain types of insulating extension configurations are used in these examples for illustrative purposes, any other insulating extension configurations within the general concept of the present invention (such as those described above with reference to FIGS. 4-7 ) Can be used for the same or similar purposes.

[0082] FIG. 8 is a cross-sectional view of a cMUT structure using an insulating extension part according to the present invention. The cMUT element 800 is constructed on a substrate wafer 801 and has a bottom electrode layer 810 and a film layer 819 carrying the top electrode layer 820. An insulating support (anchor) 830 is provided between the bottom electrode layer 810 and the film layer 819 (having a top electrode layer 820) to support the film layer 819 fixed or sandwiched on top of the insulating support (anchor) 830. The film layer 819 and the bottom electrode 810 define a transduction gap 815. The film 819 vibrates with respect to the substrate through the transduction gap 815 after receiving the transduction excitation to perform a transduction function.

[0083] It should be appreciated that in FIG. 8 and other drawings herein, the bottom electrode layer 810 is not required to be a separate layer from the substrate 801. In some embodiments, the substrate 801 and the bottom electrode 810 may be a single conductive layer used as a bottom electrode. In other embodiments, the substrate 801 may be a conductive silicon substrate and the bottom electrode 810 is a continuous part of the same substrate 801 but has a higher doping level.

[0084] Insulating extensions 840 and 842 are formed in the bottom electrode layer 810 to enlarge the total insulator height. The insulating extensions 840 are each connected to the corresponding insulating support (anchor) 830, while the insulating extension 842 is not connected to the insulating support (anchor) but is located where the top electrode 820 and the bottom electrode 810 are most likely to be in contact with each other during the operation of the transducer. Close to the point where they touch each other. This location is usually but not always near the middle of each cMUT cell defined by two opposing insulation points (anchors) 830. The insulating extension 842 is located between the two insulating extensions 840 as an illustration. Any design of the insulating extensions shown above may be used as an alternative to the insulating extensions 840 and 842 shown.

[0085] FIG. 9 is a cross-sectional view of another cMUT structure using an insulating extension according to the present invention. The cMUT structure 900 is similar to the cMUT structure 800 shown in FIG. 8 except that the insulating extensions 940 and 942 extend beyond the bottom electrode 910 into the substrate 901. This configuration is beneficial when the substrate 901 itself is formed of a material that is conductive or not very insulating. For example, the substrate 901 may be a silicon wafer that is considered conductive in the context of the present invention. The conductive substrate 901 and the bottom electrode layer 910 together serve as a part of the bottom electrode, and the bottom electrode layer 910 is preferably more conductive than the substrate 901.

[0086] FIG. 10 is a cross-sectional view of another cMUT structure using an insulating extension according to the present invention. Except that the cMUT structure 1000 further includes an insulating support (anchor) 930 and an insulating layer 950 between the insulating extensions 940 and 942, the cMUT structure 1000 is similar to the cMUT structure 900 shown in FIG. 9. It should be appreciated that the insulating layer 950 may also be located between the film layer 919 and the insulating support (anchor) 930.

[0087] FIG. 11 is a cross-sectional view of another cMUT structure using an insulating extension according to the present invention. The cMUT structure 1100 is similar to the cMUT structure 1000 shown in FIG. 10, except for the following differences: (1) the insulating layer 1150 is patterned in the cMUT structure 1100 to cover only the area above the insulating extensions 940 and 942; and (2) the conductive liner The bottom 1101 alone serves as a bottom electrode without an additional conductive layer. One suitable material for the conductive substrate 1101 is a doped silicon wafer.

[0088] FIG. 12 is a cross-sectional view of another cMUT structure using an insulating extension according to the present invention. The cMUT structure 1200 is similar to the cMUT structure 1100 shown in FIG. 11 except that the cMUT structure 1200 also includes a motion brake 1230 provided on the insulating extension 942. As shown, unlike the insulating extension 940 that is provided under the insulating support (anchor) 930 and connected to the insulating support (anchor) 930, the insulating extension 942 is provided at every point where the electrodes are most likely to be in contact with or close to each other during operation.

CN 101558552 Β

Near the middle of a cMUT unit. (In the specific configuration of FIG. 12, the bottom electrode includes a conductive substrate 1201, and the top electrode 920 includes a patterned conductive layer carried by the film layer 919.) The motion brakes 1230 provided at these positions help to limit the operation period. The maximum displacement of the top electrode 920 relative to the bottom electrode, thus preventing a direct short circuit between the electrodes.

[0089] FIG. 13 is a cross-sectional view of a cMUT structure that achieves a similar effect of the insulating extension part according to the present invention. The cMUT structure 1300 is constructed on a substrate 1301± and has a patterned bottom electrode layer 1310 disposed on the substrate 1301. The insulating layer 1350 covers the top surface of the substrate 1301 and the bottom electrode 1310. The patterned bottom electrode layer 1310 defines a void 1340, and if the void 1340 contains a sealed vacuum or air, they serve as at least a part of the insulating extension. In the specific example shown in FIG. 13, the void 1340 is partially filled with the insulating layer 1350. In this case, the remaining empty area of the void 1340 and the portion of the insulating layer 1350 filled in the void 1340 together serve as an insulating extension.

[0090] The substrate 1301 may be formed of an insulating material, a conductive material, or a conductive material covered by an insulating material. If the substrate 1301 is formed of a conductive material, it can also serve as at least a part of the bottom electrode.

[0091] FIG. 14 is a cross-sectional view of a cMUT structure that achieves a similar effect of the insulating extension part according to the present invention. The cMUT structure 1400 is similar to the cMUT structure shown in FIG. 13 except that the cMUT structure 1400 also includes a motion stopper 1430 disposed on the additional insulating extension 1442, and the insulating layer 1450 is patterned and does not cover most of the bottom electrode 1410.

[0092] In addition to the above patterned bottom electrode as shown in FIGS. 13-14, the top electrode can also be patterned so that the top electrode and the bottom electrode are near the position where the insulating support (anchor) 930 is located, and during operation. Certain selected positions, such as the position where the electrode and the bottom electrode are most likely to be in contact with or close to each other, do not overlap with each other.

[0093] The insulating extensions according to the present invention can also be used for microelectromechanical transducers with embedded springs as described in several PCT patent applications cited herein. Specifically, the insulating extension can be used for a microelectromechanical transducer having movable mechanical parts to convert energy. An exemplary transducer includes: (1) a substrate; (2) a middle elastic layer disposed on the substrate, the substrate and the middle elastic layer define a cavity therebetween, the cavity is bounded by sidewalls, and the middle The elastic layer extends from the side wall to cover the cavity; (3) the insulating connector on the middle elastic layer; (4) the top plate arranged on the insulating connector, and the insulating connector separates the top plate from the middle elastic layer to define a transduction gap under the top plate; And (5) Insulation extensions that extend beyond the transduction gap.

[0094] FIG. 15 is an enlarged view of a selected part of an embedded spring microelectromechanical transducer (ESMUT) (ESMUT part 1500 is a part of a complete ESMUT element shown). The structure of the selected ESMUT portion 1500 provides a basis for understanding the complete ESMUT elements as described in the several PCT patent applications cited herein.

[0095] For certain applications such as ESMUTs with high operating frequencies, a complete ESMUT element or device may only utilize a basic unit similar to the ESMUT part 1500. For other applications, it is better to use a combination of multiple basic units shown in FIG. 15 and/or FIG. 16.

[0096] The ESMUT portion 1500 is constructed on a substrate 1501, on which there are supporting features (hereinafter referred to as "side wall anchors") 1503. The supporting features 1503 have cavities 1502 and 1503 on two opposite sides, respectively. The two side walls of the boundary of 1502a. The support feature (sidewall anchor) 1503 may be an integral part of the substrate 1501 formed as a result of forming the cavities 1502 and 1502a, but may also be an additional structure added to a separate substrate. In one embodiment, for example, the sidewall anchor 1503 is part of the middle elastic layer 1520. The substrate 1501 may be made of a non-conductive material or a conductive material such as silicon or polysilicon. In the configuration where the sidewall anchor 1503 is a separate structure, the conductivity of the sidewall anchor 1 503 may be the same as or different from the conductivity of the substrate 1501. For example, the substrate 1501 may be made of a non-conductive material and the sidewall anchor 1503 is a conductive material such as metal, silicon, or polysilicon.

[0097] The illustrated ESMUT structure also has a second cavity 1502a on the other side of the sidewall anchor 1503. Depending on how the ESMUT part 1500 is obtained from the ESMUT element and where the ESMUT element is obtained, the second cavity 1502a can belong to different and subdivided components.

CN 101558552 Β

A separate cavity, or just another part of the same circular or extended cavity as the cavity 1502. The selected ESMUT part 1500 also has a second connector 1530a in the other half. In addition, depending on how the ESMUT part 1500 is obtained from the ESMUT element 1500 and where from the ESMUT element 1500, the second connector 1530a may be a part of a different or separate connector, or just the same circular shape as the connector 1530 Or extend another part of the connector.

[0098] The ESMUT structure part 1500 also has these components: (a) a middle elastic layer 1520, which is preferably an elastic film; (b) a bottom electrode 1525 on the middle elastic layer 1520, a connection on the top of the middle elastic layer 1520 (C) the insulating layer 1535 on the connector 1530; (d) the top plate 1540 connected to the connectors 1530 and 1530a through the insulating layer 1535 therebetween; and (e) the top electrode 1550.

[0099] The bottom side of the top plate 1540 faces the top side of the middle elastic layer 1520, and the bottom side of the middle elastic layer 1520 faces the front side of the substrate wafer, so that the connector 1530 stands upright from the middle elastic layer 1520 to define the exchange under the top plate 1540. Energy space 1560. The energy transduction space 1560 is generally defined between the top surface of the top plate layer 1540 and the upper surface of the top surface of the middle elastic layer 1520 or the top surface of the sidewall anchor 1503. When there is an intervening layer between the top surface of the top plate layer 1540 and the top surface of the middle elastic layer 1520 or the top surface of the sidewall anchor 1503, the available transduction space may be reduced. For example, if another layer is deposited on the middle elastic layer 1520 or the sidewall anchor 1503, the top surface of the sidewall anchor is defined as the uncovered surface of the layer deposited on the sidewall anchor 1503. In the exemplary configuration shown in FIG. 15, the actual height of the available transduction space 1560 may be reduced by the thickness of the insulating layer 1535, the bottom electrode 1525, and the middle elastic layer 1520.

[0100] In some embodiments, the entire height between the top plate layer 1540 and the top surface of the sidewall anchor 1503 may be used for the transduction space 1560. For example, if other features (e.g., motion brake) are used to prevent electrical shorts between the two electrodes, the insulating layer can be removed; the conductive substrate wafer itself can be used to implement the bottom electrode on the substrate (e.g., anchor 1503± on the side wall). ), without the need for a separate electrode layer; and the cantilever can be formed on the side that is flush with or below the top surface of the sidewall anchor 1503, which is connected to the middle elastic layer of the sidewall anchor 1503, instead of using A continuous middle elastic layer is formed on top of the sidewall anchor 1503.

[0101] Both the substrate 1501 including the sidewall anchor 1503 and the middle elastic layer 1520 are conductive. In this case, the substrate 1501 can be used as a conductor for accessing the conductive middle elastic layer 1520, and the middle elastic layer 1520 can be used as a bottom electrode.

[0102] The connectors 1530 and 1530a are located in the middle elastic layer 1520± and each have substantially the same connector height. The connectors 1530 and 1530a are each separated from the side wall of the respective side wall anchor 1503 by a sufficient length in the horizontal direction. This defines two cantilevers with a back-to-back dual cantilever configuration, each anchored on the respective sides of the sidewall anchor 1503. The cantilever can be excited by the respective connector (1530 or 1530a) at the force application end (for example, 1522 on the left cantilever) where the connector (1530 or 1530a) is located. The cantilever and the respective cavities 1502 and 1502a realize the vertical displacement of the connectors 1530 and 1530a, which causes the top plate 1540 to move substantially vertically in a motion similar to a piston, thereby changing the transducing space 1560. When the two halves of the ESMUT structure 1500 move in the same phase, the vertical piston-like movement is further ensured.

[0103] In the specific example shown, the top surface of the sidewall anchor 1503 is covered by the middle elastic layer 1520, and the middle elastic layer 1520 is in turn covered by the bottom electrode 1525. In addition, the top plate 1540 and the connector 1530 are not directly connected to each other, but an insulating layer 1535 is interposed therebetween. Therefore, the transduction space 1560 is partially occupied by the middle elastic layer 1520, the bottom electrode 1525, and the insulating layer 1535. The portion of the middle elastic layer 1520 covering the top surface of the sidewall anchor 1503, the bottom electrode 1525 and the insulating layer 1535 are optional. In any case, in order to achieve the desired energy conversion, if additional layers are included in the structure, the transduction space 1560 should not be completely occupied by these additional layers.

[0104] FIG. 16 is an enlarged view of the ESMUT part 1600 of different options, which is another part of the complete ESMUT element.

Part. The selected ESMUT part 1500 and the selected ESMUT part 1600 shown in FIG. 15 can be taken from the deviated position of the same ESMUT element. The selected ESMUT portion 1600 is constructed on a substrate 1601, which has a cavity 1602 bordered by two sidewall anchors 1603 and 1603a on two opposite sides_oThe ESMUT structure part 1600 also has these components: a middle elastic layer 1620, a bottom electrode 1625 on the middle elastic layer 1620, a connector 1630 on the middle elastic layer 1620, an insulating layer 1635 on the connector 1630, insulation through intervention The layer 1635 is connected to the top plate 1640 of the connector 1630 and the top electrode 1650.

[0105] The connector 1630 is located on the middle elastic layer 1620, and is horizontally separated from the sidewalls of the sidewall anchor 1603 and the sidewall anchor 1603a. The intermediate elastic layer 1620 between the sidewall anchor 1603 and the sidewall anchor 1603a defines a double cantilever anchored at the sidewall anchor 1603 and the sidewall anchor 1603a. The double cantilevers are connected head-to-head at a location 1622 where the connector 1630 is provided to form a bridge.

[0106] The top plate 1640 is located on the connector 1630, and the connector 1630 separates the top plate 1640 from the middle elastic layer 1620 to define a transducing space 1660 under the top plate. The double cantilever and cavity 1602 realize the vertical displacement of the connector 1630, which moves the top plate 1640 substantially vertically, thus changing the transducing space and activating the transducing member of the transducer for energy conversion.

[0107] The above ESMUT design can be used as the basic construction unit for constructing various microelectromechanical transducers with movable mechanical parts for converting energy. The ESMUT structure essentially abolishes the fact that the cMUT element is divided into several units and requires The conventional concept of cell insulation wall supporting and clamping the membrane at the perimeter of each cMUT cell.

[0108] As shown below with reference to FIGS. 17-18, the insulating extension according to the present invention can be incorporated in the ESMUT to further improve its performance.

[0109] FIG. 17 shows an ESMUT structure using an insulating extension part according to the present invention_o ESMUT structure 1700 is based on ESMUT structure 1500 and shares most of the components of ESMUT structure 1500_o The ESMUT structure 1700 has insulating extensions 1742 and 1744 extending into the top plate 1540 to provide additional insulation without increasing the transduction space 1560. As shown, the insulating extensions 1742 are aligned with the connectors 1530 and 1530a and connected to them through an optional insulating layer 1535. The connectors 1530 and 1530a are formed of insulating materials and are the equivalent of the insulating support part in FIGS. 4-7 and the insulating support or insulating anchor in FIGS. 8-14. The insulating extensions 1744 are located between the insulating extensions 1742 and in the vicinity of the top plate 1540 including the optional intervening insulating layer 1535 that is most likely to contact the bottom electrode 1525 or close to the middle of the bottom electrode 1525.

[0110] FIG. 18 shows another ESMUT structure using an insulating extension part according to the present invention_o The ESMUT structure 1800 is based on the ESMUT structure 1600 and shares most of the components of the ESMUT structure 1600. The ESMUT structure 1800 has insulating extensions 1842 and 1844 extending into the top plate 1640 to provide additional insulation without increasing the transduction space 1660. As shown, the insulating extension 1842 is aligned with the connector 1630 and connected to it through an optional insulating layer 1635. The connector 530 is formed of an insulating material and is the equivalent of the insulating support part in FIGS. 4-7 and the insulating support or insulating anchor in FIGS. 8-14. The insulating extension 1844 is located at a position where the top plate 1540 including the optional intervening insulating layer 1635 is most likely to contact the bottom electrode 1625 or close to the bottom electrode 1625.

[0111] The insulating extensions 1742, 1744, 1842, and 1844 in the above embodiments allow the breakdown voltage to be maximized and parasitic capacitance to be minimized without reducing the processing performance of the transducer. If the maximum displacement of the top plate 1540/1640 is limited by other components such as motion brakes to avoid the top plate 1540/1640 (or an intervening layer such as 1535/1635) and the middle elastic layer 1520/1620 (or such as 1525/1625) The insulating extensions 1744 and 1844 are optional. When the top plate 1550 or 1650 is a conductive layer (such as a silicon or polysilicon layer) or a non-conductive layer that does not have sufficient insulating ability, the additional insulating effect of the insulating extension is particularly useful. It should be appreciated that although certain types of insulating extensions are used for illustrative purposes herein, any configuration of insulating extensions according to the present invention can be used for

ESMUT structure. For example, the insulating extension may alternatively or additionally be configured in the middle elastic layer 1520 or 1620 and/or the substrate anchor 1503 or 1603.

[0112] Manufacturing method:

[0113] Microelectromechanical transducers with insulating extensions according to the present invention can be manufactured using a variety of methods. According to one aspect of the present invention, a method for manufacturing a microelectromechanical transducer having two electrodes separated by an insulator containing insulating extensions includes the following steps: (1) forming a groove on the main surface of the first conductive layer; (2) Forming a support feature of insulating material that extends from the groove to the free end on the main surface of the first wafer material; and (3) arranging a second conductive layer on the free end of the support feature.

[0114] A method for forming a very deep insulating extension is also described. The exemplary method includes the following steps: (1) forming patterned trenches on the main surface of the substrate by removing substrate material, wherein the patterned trenches include thin lines of unremoved material of the substrate; (2) in the patterned trenches The thin lines of unremoved material of the substrate are oxidized in the groove so that the patterned groove constitutes an insulator; (3) the main surface of the substrate is patterned and etched so that the insulator has a top on the substrate; and (4) the top The conductive layer is arranged on the top of the insulator. A suitable substrate for this method is an oxidizable substrate such as a silicon wafer.

[0115] Alternatively, the method may further include the following steps: (1) forming a trench on the main surface of the substrate by removing the material of the substrate; (2) filling the trench with an insulating material; (3) patterning and etching the substrate The main surface is such that the insulating material in the trench has a top end on the substrate; and (4) the top conductive layer is arranged on the top end of the insulator. A suitable substrate for this method is a silicon wafer.

[0116] An exemplary method for manufacturing an ESMUT according to the present invention includes the following steps: (1) providing a top plate, a middle elastic layer, and a substrate; (2) forming insulation on the main surface of one of the top plate and the middle elastic layer A support feature of the material, the support feature extending from a point below the main surface to a free end above the main surface; and (3) joining the top plate, the middle elastic layer and the substrate so that the top plate and the middle elastic layer are in the supporting feature The free ends of the are connected by support features, while the middle elastic layer is connected to the substrate on the opposite side. In the resulting ESMUT, the substrate and the middle elastic layer define a cavity therebetween, the cavity is bounded by the side wall, and the middle elastic layer extends from the side wall to cover the cavity.

[0117] Exemplary embodiments of each method are described below with reference to FIGS. 19-27. The process for forming the insulating extension can be incorporated into the conventional manufacturing process of the microelectromechanical transducer such as the cMUT process by adding several steps for forming the insulating extension. As shown below, the combination of the steps of forming a desired groove or cavity with a desired pattern on the substrate is an important element of the method.

[0118] It should be appreciated that the various steps shown can occur in any order as long as they are physically compatible with each other to achieve the final structure. Many selected steps-including but not limited to those specifically described herein-are possible. In addition, it should be realized that many of the steps described below are optional, including but not limited to the steps specifically described in a selective manner.

[0119] FIGS. 19.1-19.9a show the process flow of using wafer bonding technology to bond the insulating extension of the present invention into a conventional film-based cMUT. The main steps of the process are described below.

[0120] In step 1 (FIG. 19.1), a desired groove pattern including grooves 1905 and 1906 is formed on the substrate 1901±. In the example shown, there are two different depths of grooves, one (1905) is used for the insulating extension of the insulating support (anchor) and the other (1906) is used for the possible contact between the two electrodes during the operation of the transducer. Insulation extension at the location. The two types of grooves 1905 and 1906 may be formed in a single step at the same time, or separately formed in two steps. There are many suitable methods for forming the desired groove pattern on the substrate. In the case of using an etchable substrate (for example, a silicon wafer), a desired groove pattern can be formed by directly etching the substrate using an appropriate etching technique.

[0121] In step 2 (FIG. 19.2), the insulating layer 1931 (for example, thermal oxide, 1/1'0, nitride, D0$ and $06) is introduced

CN 101558552 Β

Enter the grooves 1905 and 1906 and reach the desired thickness.

[0122] In step 3 (19.3), the insulating layer 1931 is patterned and etched to form an insulating support (anchor) 1932 and a motion stopper 1934, each of which stands upright in the grooves 1905 and 1906 and extends to one Free end.

[0123] In step 4 (FIG. 19.4), if necessary, another insulating layer 1933 is grown_Ο

[0124] In step 5 (FIG. 19.5), if necessary, the insulating layer 1933 is patterned, leaving a layer 1935 in each of the grooves 1905 and 1906 to form a part of the insulating extension.

[0125] In step 6 (FIG. 19.6), the SOI wafer with the desired film layer 1919 is bonded to the free ends of the insulating support (anchor) 1932 and the motion brake 1934. The SOI wafer is then annealed and etched back to leave a film 1919 on the insulating support (anchor) 1932. In this step, if necessary, through holes can be etched to access the bottom electrode.

[0126] Instead of using an SOI wafer, a wafer carrying a functional layer such as a nitride, oxide, metal, parylene, or other polymer layer used as the desired film layer 1919 and an appropriate bonding technique may be used , To achieve step 6 above.

[0127] In step 7 (FIG. 19.7), a metal layer 1920 is deposited to form a top electrode. After this step, if necessary, the film layer 1919 between adjacent cMUT elements can be etched to separate each aMUT element.

[0128] Other variations of the steps can be used. For example, the SOI bonding technology used in steps 6 and 7 above can be replaced by a selected surface micromachining process using sacrificial technology. The following describes the selection method, including step 6, step 7, step 8 and 9.

[0129] In the selected step 6 (FIG. 19.6a), the sacrificial layer 1939 is deposited on the free ends of the insulating support (anchor) 1932 and the motion brake 1934.

[0130] In the selected step 7 (FIG. 19.7a), the film layer 1919 is deposited and patterned as required.

[0131] In the selected step 8 (FIG. 19.8a), if necessary, via holes (not shown) are etched, and then the sacrificial layer 1939 is removed. After that, seal the through hole with an appropriate material.

[0132] In selected step 9 (FIG. 19.9a), a metal layer 1920 is deposited to form a top electrode. The resulting structure is similar to Figure 19.7ο

[0133] There is a lot of freedom in choosing an appropriate process step and further choosing different materials for each layer in this step. Specifically, different bonding techniques (for example, silicon fusion bonding, eutectic bonding, anodic bonding, and thermocompression bonding) can be applied to the process to form films with different materials (for example, silicon, silicon nitride, oxide, polymer Material, sapphire, diamond and SiC) ο

[0134] Similar processes such as the use of wafer bonding and surface micromachining techniques can be used to manufacture an ESMUT having an insulating extension incorporated therein according to the present invention.

[0135] There are many suitable methods for fabricating the desired groove pattern on the substrate. In addition to directly etching the substrate using an appropriate etching process, other methods such as the differential oxidation method described below with reference to FIGS. 20-22 may be used to form the desired groove pattern. Since oxides with different oxidation thicknesses consume different amounts of oxidized material, differential oxidation can be used to form patterns (for example, grooves) on the oxidizable conductive surface. This is achieved by using the nitride layer and/or oxide layer as a mask for additional oxidation. The nitride layer can basically block the oxidation of the lower part, and the oxide layer can slow down the oxidation of the lower part. Using an oxide layer or a nitride layer as an oxidation mask, oxidations with different thicknesses can be formed at desired positions on the surface of the conductive (for example, silicon) material.

[0136] Since the oxidation process consumes the oxidized material, it can be regarded as equivalent to the direct etching of the material. However, the oxidation process is generally easier to control and has better accuracy than direct etching. Therefore, the formation of grooves by the oxidation method can be more accurate than the pattern, grooves and material distribution on the electrode surface and substrate required for manufacturing transducers (such as cMUT).

The direct etching process of uniformity and uniformity is better.

[0137] FIGS. 20.1-20.3 illustrate an exemplary process for forming grooves on a substrate. This method is particularly suitable for forming grooves on oxidizable substrates such as silicon substrates. This process can also be used to form grooves on the oxidizable top plate layer or the middle elastic layer.

[0138] In step 1 (FIG. 20.1), a first oxide layer 2010 is grown on the main surface of the substrate 2001. The oxide layer

2010 is patterned and has openings where the substrate is not covered by oxide 2015_o

[0139] In step 2 (FIG. 20.2), a second oxide layer 2020 is grown on the first oxide layer 2010 (including the opening 2015). The second oxide layer 2020 has a first depth 2030 that enters the substrate 2001 at a location where the opening 2015 is located, and a second depth that enters the substrate 2001 at a location covered by the first oxide layer 2020. Because the first oxide layer 2020 slows down the oxidation process, the first depth 2030 will be greater than the second depth. The difference between the two depths will be the basis for forming the groove in the next step.

[0140] In step 3 (FIG. 20.3), the first oxide layer 2010 and the second oxide layer 2020 are removed to form a groove

2040 ο

[0141] FIGS. 21.1-21.3 show another exemplary process for forming grooves on a substrate. This method is particularly suitable for forming grooves on oxidizable substrates such as silicon substrates. This process can also be used to form grooves on the oxidizable top plate layer or the middle elastic layer.

[0142] In step 1 (FIG. 21.1), a first oxide layer 2110 and a nitride layer 2120 are grown on the main surface of the substrate 2101. The oxide layer 2110 is patterned and has an opening 2115 where the substrate is not covered by oxide. The nitride layer 2120 has an opening consistent with the opening 2115 of the first oxide layer 2110.

[0143] In step 2 (FIG. 21.2), a second oxide layer 2130 is grown on the first oxide layer 2110 and the nitride layer (including the opening 2115). The second oxide layer enters the desired depth of the substrate 2001 at the position where the opening 2015 is located. The nitride layer 2120 substantially prevents further oxidation in other regions. The depth of the second oxide layer is the basis for forming the groove in the next step.

[0144] In step 3 (FIG. 21.3), the nitride layer 2120, the first oxide layer 2110, and the second oxide layer 2130 are removed to form a groove 2140.

[0145] The above methods can be repeated or combined to form more complex groove patterns with various depths. Figure 22.122.5 shows a process of forming a desired groove pattern on a silicon substrate using an oxidation process. This method can also be applied to other oxidizable substrates. The main steps of the process are described below.

[0146] In step 1 (FIG. 22.1), if necessary, a thermal oxide layer 2231 is formed and patterned on the substrate 2201±, and has a desired thickness.

[0147] In step 2 (FIG. 22.2), another thermal oxide layer is grown on the pattern of the first thermal oxide layer 2231

2232 to the desired thickness.

[0148] In step 3 (FIG. 22.3), the resulting thermal oxide layers 2231 and 2232 are further patterned into a desired pattern for forming a desired groove in the next step.

[0149] In step 4 (FIG. 22.4), another thermal oxide layer 2233 is formed on the oxide pattern to a desired thickness. This will further define the different depths of the desired grooves that will be formed.

[0150] In step 5 (FIG. 22.5), the remaining oxide is removed to form a desired groove pattern on the silicon substrate 2201±. The groove pattern includes two grooves of different depths. One type (2205) is used to form an insulating extension of an insulating support (anchor), and the other (2206) is used to form an insulating extension at a position where the two electrodes may contact during the operation of the transducer.

CN 101558552 Β

[0151] FIGS. 23.1-23.5 show another process for manufacturing a desired groove pattern on a silicon substrate using an O 2 implantation and oxidation process. This method can also be applied to other oxidizable substrates. The main steps of the process are described below.

[0152] In step 1 (FIG. 23.1), patterned (selective) 02 implantation is performed on the silicon substrate 2301± by using the patterned mask 2309.

[0153] In step 2 (FIG. 23.2), thermal oxidation is performed on the silicon substrate 2301 ± treated by O 2 implantation. Thermal oxidation forms an oxide layer 2331 with a thicker oxide structure in selected regions where O2 implantation occurs.

[0154] In step 3 (FIG. 23.3), the patterned oxide layer 233L·

[0155] In step 4 (FIG. 23.4), further thermal oxidation is performed on the patterned oxide layer 2331±.

[0156] In step 5 (FIG. 23.5), the existing oxide is removed to form a desired groove pattern on the silicon substrate 2301±. The groove pattern includes two grooves of different depths, one (2305) is used to form the insulating extension of the insulating support (anchor), and the other (2306) is used for the contact between the two electrodes during the operation of the transducer. Insulation extension at the location.

[0157] FIGS. 24.1-24.5 show another process for manufacturing a desired groove pattern on a silicon substrate using O2 implantation and local oxidation of silicon (LOCOS). This method can also be applied to other oxidizable substrates. The main steps of the process are described below.

[0158] In step 1 (FIG. 24.1), a patterned (selective) 02 implantation is performed on the silicon substrate 2401± using a patterned mask 2409.

[0159] In step 2 (FIG. 24.2), a patterned nitride protective layer 2431 is deposited on the silicon substrate 2401 ± treated with O 2 implantation. Then perform the LOCOS process on the silicon substrate 2401± with the patterned nitride protective layer 2431_o The LOCOS process forms oxide patterns with two types of locally oxidized regions, including thicker oxide structures 2032 in selected regions where 02 implantation occurs and thinner oxides in other unprotected regions where 02 implantation does not occur.Physical structure2304. The above process can be replaced by two separate LOCOS processes with a desired oxide layer thickness to form two types of local oxidation separately.

[0160] In step 3 (FIG. 24.3), nitride and oxide are removed to form a desired groove pattern on the silicon substrate 2401±. The groove pattern includes two grooves of different depths, one (2405) is used to form the insulating extension of the insulating support (anchor), and the other (2406) is used to contact the two electrodes during the operation of the transducer. Insulation extension at the location.

[0161] Method of forming a very thick high-insulation extension:

[0162] In the above-mentioned method, the insulating extension is manufactured by growing or depositing an insulating material. Therefore, the thickness of the insulating extension is limited by the film deposition or film growth process. However, in some applications, very thick insulators may be required to prevent electrical breakdown. Therefore, a different process is required to make very thick insulating extensions in the microelectromechanical transducer.

[0163] FIGS. 25.1-25.7 show an exemplary method of forming a very deep insulating extension in a conventional cMUT with a flexible film surface. An exemplary method forms a deep insulating extension by etching a desired pattern on a substrate and then completely oxidizing the pattern. The patterned area on the substrate can be filled with thermal oxide with a well-designed pattern. The main steps of the exemplary method are described below.

[0164] In step 1 (FIG. 25.1), first, a desired groove pattern 2531 is formed on the substrate 2501±. The groove pattern 2531 can be formed by various techniques, including a direct etching process, oxidation, or LOCOS. This step is optional.

[0165] In step 2 (FIG. 25.2), a desired silicon pattern is etched on the surface of the substrate 2501 and the groove 2531. The silicon pattern has a plurality of deep patterned grooves etched to a desired thickness at selected positions on the groove including the groove pattern 2531. Each patterned trench has a void in which the original material of the substrate 2501 is removed but there are still narrow lines 2537 of the original material of the substrate 2501 that are not removed.

[0166] In step 3 (FIG. 25.3), the graph of the narrow line 2532 with the unremoved substrate material is completely oxidized by thermal oxidation.

The trench is formed to form an oxide layer 2533 with a variable depth. Specifically, the oxide layer 2533 has deep oxide portions 2532 and 2534 that fill the spaces that were once deep patterned trenches. In this step, if the thermal oxide does not completely fill the trench, a filling material can be added. The surface of the oxide layer 2533 can be polished if necessary. If step 1 of FIG. 25.1 has not been performed previously to form the desired change in surface height, the oxide at the position corresponding to the groove 2531 of FIG. 25 can be etched to the desired height in this step.

[0167] In step 4 (FIG. 25.4), the oxide layer 2533 is patterned, and selected portions of the substrate 2501 under the oxide layer 2533 are etched to a desired thickness. After this step, the deep oxide portions 2532 and 2534 remain in the substrate 2501. In addition to the direct etching process, an oxidation or LOCOS process can be used to etch the substrate in this step.

[0168] In step 5 (FIG. 25.5), the remaining oxide is patterned again, and the underlying substrate is etched to a desired thickness to form a clearer structure of the deep oxide portions 2532 and 2534, which will become insulating Support (anchor) and insulating extension. If necessary, a thin oxide layer can be grown and patterned after this step.

[0169] In step 6 (FIG. 25.6), the SOI wafer is bonded on the free ends of the deep oxide portions 2532 and 2534. The handle wafer and box layer of the SOI wafer are removed to leave a film layer 2519. As shown, the deep oxide portions 2532 each provide an insulating support (anchor) on the substrate 2501 and a deep insulating extension that extends into the substrate 2501, while the deep oxide portions 2534 each provide an adjacent insulating support (anchor). The middle position of the support (anchor) extends to the deep insulating extension within the substrate 2501. If desired, the deep oxide portion 2534 may also have a portion above the substrate 2501 to form a motion brake.

[0170] In step 7 (FIG. 25.7), if necessary, a metal layer 2520 is deposited and patterned to form a top electrode. Then, if necessary, the film layer is etched to separate the individual cMUT components.

[0171] It should be appreciated that the process described above is only exemplary. Even many variations within each step of the process are possible. For example, different patterns can be used in the first four steps (step 1 to step 4) to obtain a structure that can be used in step 5 to form a clear structure of the deep oxide portions 2532 and 2534. An example of this selected patterning is shown below with reference to Fig. 25.la-25·4a, which is the selection scheme of Fig. 25.1-25.4. In addition, the surface micromachining process shown in the steps in Figures 19.6a-19.8a can be used to replace the steps in Figure 25.6 to form a cMUT with a very high insulating extension.

[0172] Compared with the method of controlling the thickness of the insulating extension portion using film deposition or film growth, the above method defines the thickness of the insulating extension portion through an etching process. The insulating extension can be manufactured to a very wide range of thicknesses, in fact any thickness that can be required for cMUT design optimization.

[0173] The above method can be easily applied to cMUT design. For example, the same method can be used to form a similar insulating extension on the rigid top plate or the middle elastic layer of the ESMUT (cMUT with embedded spring as shown in FIG. 1518). In order to coordinate with this method, the main layer (the layer of the ESMUT in which the insulating extension is formed) may be formed of any material that can be oxidized (for example, silicon, Ge, GaAs, or any other semiconductor material).

[0174] FIGS. 26.1-26.7 show another method of forming deep insulating extensions by etching. The main steps of these methods are described below.

[0175] In step 1 (FIG. 26.1), trenches 2631 are etched in the substrate 2601±.

[0176] In step 2 (FIG. 26.2), the trench 2631 is filled with the desired dielectric material 2633 (for example, glass frit, LTO, SOG, silicon nitride, PSG, or a combination of multiple layers of these materials).

[0177] In step 3 (FIG. 26.3), if necessary, the surface of the dielectric material 2632 is polished.

[0178] In step 4 (FIG. 26.4), the filling material 2633± is patterned and etched to leave the substrate 2601±

Deep insulators 2632 and 2634 (including corresponding insulating extensions). In this step, two different types of deep insulators 2632 and 2634 with different heights are formed_O

[0179] In step 5 (FIG. 26.5), the substrate 2601 is etched to a desired thickness to further define the insulators 2632 and 2634. Each insulator 2632 or 2634 now has two well-defined parts. The first part is an insulating extension that extends into the substrate 2601, and the second part is an insulating support or anchor that extends above the substrate 2601.

[0180] In step 6 (FIG. 26.6), another etching is performed on the substrate 2601± to form an outer trench 2635 surrounding the insulating extension._Ο

[0181] In step 7 (FIG. 26.7), the SOI wafer is first bonded to the free end of the insulator 2632, and then the handle wafer and the box oxide layer are removed from the film 2619 _oThen, if necessary, a metal layer 2620 is deposited and patterned to form a top electrode. If necessary, the film layer 2019 can be etched to separate the cMUT elements.

[0182] Similar to the method in FIGS. 25.1-25.7, the above method defines the insulating extension thickness by the etching depth instead of the thickness of the deposited material. This method can therefore form very thick insulating extensions, which is important for forming high-temperature cMUTs or cMUTs with a large breakdown voltage.

[0183] A wide range of filling materials such as glass frit, SOG, LTO, nitride, TEOS, etc. can be used to fill the trench in this method. The trench can also be filled with a combination of multiple layers of materials, and at least one of them should be an insulating material.

[0184] The methods shown in FIGS. 25-26 all use wafer bonding techniques to form cMUTs with insulating extensions. However, once the insulating extension is manufactured, surface micromachining based on sacrificial technology can be used to complete the cMUT.

[0185] The manufacturing method shown in FIGS. 19-26 is an example of bonding the insulating extension of the present invention to a conventional cMUT (cMUT with flexible film). However, this method can be easily used for other cMUT designs. Specifically, the same method can be used to form a similar insulating extension on the top plate or the middle elastic layer of the ESMUT (such as the cMUT with embedded springs disclosed in several PCT patent applications cited herein). The main layer in which the insulating extension is formed may be formed of any suitable material, but if the main layer is formed of a conductive material such as silicon, Ge, GaAs, or other semiconductor materials, the insulating extension is particularly beneficial.

[0186] FIGS. 27.1-27.16 show a wafer bonding process for manufacturing an ESMUT with insulating extensions according to the present invention. The ESMUT also has self-aligned features incorporated in the manufacturing process, but includes self-alignment only for illustrative purposes. Quasi-features, while insulating extensions are not required. The process can also incorporate other features such as trench sealing. The steps of this process are described below.

[0187] In step 1 (FIG. 27.1), the process starts with the SOI wafer 2780 carrying the silicon layer 2740 that will become the top plate layer 2740 of the resulting cMUT structure. An oxide layer 2781 and a nitride layer 2782 are grown on the bottom of the top plate 2740. Alternatively, the step starts with an original wafer, which can be ground and polished to a desired thickness for the top plate layer in a later step.

[0188] In step 2 (FIG. 27.2), the oxide layer 2781 and the nitride layer 2782 are patterned according to the cMUT design to expose certain areas of the top plate layer 2740.

[0189] In step 3 (FIG. 27.3), the exposed area of the top plate layer 2740 is oxidized to a desired thickness.

[0190] In step 4 (FIG. 27.4), the nitride layer and the oxide layer are removed to form a groove 2741 on the bottom surface of the top plate layer 2740. The groove 2741 will serve as a basis for receiving an insulator including an insulating extension and an insulating support.

[0191] In step 5 (FIG. 27.5), a supporting feature 2731 of insulating material is formed in the groove 2741± of the top plate layer 2740. These support features 2731 will provide a leaf spring connector 2730 (which is an insulator) and an insulating extension in the groove. One way to form this support feature 2731 is to grow an oxide layer.

[0192] In step 6 (FIG. 27.6), another oxide layer 2732 is grown on the groove 2741± of the top plate layer 2740. The optional oxide layer 2732 can be patterned to become an additional part of the insulating extension in the groove 2741. The optional oxide layer 2732 can improve insulation by preventing leakage on the surface.

[0193] In step 7 (FIG. 27.7), another SOI wafer 2785 carrying the silicon layer 2721 is bonded to the leaf spring connector 2730. The silicon layer 2721 will become the middle elastic layer 2720 in the final ESMUT structure to form an embedded spring (cantilever). For this purpose, the silicon layer 2721 should have an appropriate thickness.

[0194] In step 8 (FIG. 27.8), the SOI wafer 2785 is deeply etched to remove the carrier layer and the oxide layer, leaving a silicon layer 2721 that will become the middle elastic layer 2720. If necessary, silicon doping may be performed in selected regions of the silicon layer 2721 in this step.

[0195] In step 9 (FIG. 27.9), an oxide layer 2786 and a nitride layer 2787 are formed and patterned on the silicon layer 2721±, leaving a select area 2788 of the silicon layer 2721 accessible.

[0196] In step 10 (FIG. 27.10), the reachable area 2788 of the silicon layer 2721 is oxidized to a desired thickness.

[0197] In step 11 (FIG. 27.11), the oxide layer and the nitride layer are removed at selected locations while leaving the oxide and nitride on top of the region 2713 of the silicon layer 2721. Area 2713 will be the sidewall anchor 2703 in the final ESMUT structure. Now the other uncovered areas of the silicon layer 2721 are exposed for the next step.

[0198] In step 12 (FIG. 27.12), the exposed area of the silicon layer 2721 is oxidized to a desired thickness.

[0199] In step 13 (FIG. 27.13), the oxide and nitride on the region 2713 and the new oxide layer formed in step 12 are removed to form an intermediate elastic layer 2720, which will become 2703. The sidewall anchors and cantilever dividers 2722 feature thicker parts. The cantilever partition 2725 can have two functions at the same time: (1) acting as a motion brake; and (2) defining the length of the spring about 2703.

[0200] In step 14 (FIG. 27.14), the original wafer 2701 having the desired thickness is bonded. This layer becomes the substrate 2701 for the final ESMUT structure. After this step, the process of completing the manufacturing is similar to the last few steps of some of the other exemplary manufacturing methods described herein. An example is briefly described below.

[0201] In step 15 (FIG. 27.15), the top SOI wafer 2780 is deeply etched to remove the carrier layer and the oxide layer to form the top plate 2740.

[0202] In step 16 (FIG. 27.16), a metal layer 2750 is deposited and patterned if necessary to form interconnections. in

A trench 2715 is formed between the ESMUT elements to separate each ESMUT element.

[0203] Several other options are available for step 14 above. For example, instead of bonding the original wafer, a processed wafer with through-wafer interconnections formed therein may be used for fusion bonding to the intermediate elastic layer 2720. The processed wafer and the intermediate elastic layer 2720 define a cavity pattern corresponding to the shape of the area where the cantilever is formed. Other wafer bonding techniques (for example, eutectic bonding, thermal compression bonding, and anodic bonding) can also be used to accomplish this step.

[0204] Alternatively, a wafer or integrated circuit (IC) with a desired metal pattern or a PCB with a desired circuit may be bonded to the middle elastic layer 2720. The wafer may be formed of materials such as glass, sapphire, or silicon. Alternatively, a silicon wafer having an integrated circuit (IC) constructed therein may be bonded to the middle elastic layer 2720.

[0205] Instead of forming the insulating extension on the top plate 2740, a similar process may be performed to fabricate the insulating extension on the middle elastic layer 2720.

[0206] The material selection and process method selection in each step of the manufacturing method shown in FIGS. 27.1-27.16 above are similar to the methods described herein associated with other manufacturing methods of microelectromechanical structures. In addition, although cMUT is used for illustrative purposes in the above-mentioned processes, these methods are not limited thereto. Micro-electromechanical structure can also use only each

Part of the process or a different step sequence of the process shown in Figures 27.1-27.16. In addition, instead of using the SOI wafer, the middle elastic layer of the MEMS structure with embedded springs can be formed of a silicon wafer or a silicon wafer with a highly doped layer. The cantilever regions on the middle elastic layer can be formed sequentially using selective silicon etching.

[0207] The microelectromechanical transducer according to the present invention is described in detail with reference to the accompanying drawings and exemplary embodiments. The transducer can potentially reduce or eliminate many problems with the prior art. The present invention does not have to utilize a large number of smaller cells to form addressable transducer elements. With this technique, much less or only one unit is necessary for each addressable transducing element. The design of the microelectromechanical transducer of the present invention is particularly suitable for the application of capacitive micromachined ultrasonic transducer (cMUT), but can also be used for other micromechanical devices with movable mechanical parts to convert energy.

[0208] Specifically, the microelectromechanical transducer according to the present invention can utilize the International Patent Application (PCT) No. PCT/IB2006/051566 named THROUGHWAFER INTERCONNECT ION filed on May 18, 2006; May 18, 2006 The International Patent Application (PCT) No. PCT/IB2006/051567 filed on May 18, 2006 named METHODS FORFABRICATING MICRO-ELECTRO-MECHANICAL DEVICES; The International Patent Application (PCT) named MICRO-ELECTROMECHANICAL TRANSDUCERS filed on May 18, 2006 No. PCT/IB2006/051568; and the international patent application (PCT) No. PCT/IB2006/051569 named MICRO-ELECTRO-MECHANICAL TRANSDUCERS filed on May 18, 2006 to manufacture or combine in These patent applications disclose microelectromechanical transducers. These patent applications are incorporated herein by reference.

[0209] In the above description, the content disclosed by the present invention has been described with reference to specific embodiments thereof, but those skilled in the art will realize that the content disclosed by the present invention is not limited thereto. The various features and aspects in the above summary of the invention can be used individually or in combination. In addition, the content of the present invention can be used in many environments and applications other than those described herein without departing from the broader spirit and scope. We require patent protection for various modifications and changes that fall within the scope and spirit of the appended claims. Therefore, the and drawings should be regarded as illustrative rather than restrictive. It should be appreciated that the terms "including", "including" and "having" as used herein are clearly identified as open-ended technical terms.