Method of fabricating PCB in parallel manner

A PCB method of parallel mode

technical field

The invention relates to a multi-layer printed circuit board (MLB: Multi-layer PCB) method. More specifically, the invention relates to a multi-layer PCB method, formed with the adhesion a parallel to the working process and a circuit layer of insulating layer and simultaneously hierarchical solution, by the normal constructing of PCB manufacturing method to differ from.

background technology

Wherein a defined, thin, 髙 for integrated package and portable electric device and tendency, comprising developing to realize the fine, and is of PCB device and package. Therefore, is used to form a multi-layer PCB materials in replacing, and is a PCB lightning-protection layer there is a line of PCB of the fine cover, a ensuring consistency between datum of the reliability of PCB and improving of PCB design density. And the electronic device, dual-row embedded the sealing groove () and electronic device with possibility a surface process type electronic element replacing, therefore gradually increasing the electronic component mounting density. Additionally, wherein the need to ensuring consistency between datum for designing complexity PCB exquisite technology, wherein the lower novel portable multi-functional electronic product is used to antennas are used movies and magnetism online data.

PCB is divided the following: typeOne-sided PCB, only the insulating substrate in one side of the circuit; Double-sided PCB, forming a wire on the middle two ends; And multiple PCB (MLB), forming a wire in multilayer. Usually, one-sided PCB is very popular, wherein the electronic element usually with simple structure, and methods circuit patterns are not complex. The, recently, wherein the antenna is a day to complex integrated high of fine circuit of heavy wants, widely for double-sided PCB or MLB. , The invention claims a a MLB method.

MLB is a - comprising a building circuit is line is expanded connection area of said PCB. The detail, comprising MLB and outer layer, and inner layer of the (T/C) is made as raw material core lines are. The traditional seat, the MLB is at least two inner layer and by sinking rollers material of said PCB of two outer layer inner layer is made of. Therefore, the understand terminology MLB in the invention is used for capable of a PCB at least four composed of. The circuit complex capacity, MLB of the comprising six, and small ten or a multi-layer.

Constructing power circuit, the grounding circuit, a signal circuit in the inner layer equal, and prepreg cloth is inserted between the outer layer or outer layer, is realized isolation and adhesion. At the same time, the wiring each (through hole) through the circuit in each other is.

MLB of with a wiring density of the expectation gain; and upper shortcoming wherein manufacturing process and a plurality of increasing and wiring density of compound. Special, wherein constructing method for manufacturing the inner layer of completing the MLB manufacturing according to the normal and it use, a discovered of the inner layer with defect part, and claim abandon with defect inner layer MLB. Is developed the inspection to compensate the defect.

Is steps are arrayed to construct the groove is six PCB section drawings according to the normal the inserting position to lm. The electromagnetic of the invention, terminology of the midspan in the edges of the comprising forming the inner layer and other isolating layer and technical the inner layer.

Inserting position of the copper-coated layer thin plate (CCL 101) that drawings of raw sewage. Copper foil 102 coating the insulating layer (103) is. Usually, a copper-coated thin layer and used as PCB substrate, and unit coater of thin layer one of the copper the insulating layer is made of light.

To use, the copper-coated layer thin plate is includes: Glass/ring is installed in the resin CCL, heat-resistant resin CCL and paper is epoxy CCL, 髙 frequency CCL and flexible CCL (polyimide film), a complex CCL equal. , Glass/epoxy resin CCL layer is common used for making double-sided PCB and multiple PCB.

Glass/epoxy resin CCL from the reinforced matrix and copper foil; and epoxy resin (resin and lead is) in the reinforced seeps substrate is the glass fibre the. To type and thermal stability of an array, glass/ring is installed in the resin CCL is a grading FR-1 of international electric secondary of manufacturers (NEMA) is stipulated to FR-5. The traditional seat, layer on for FR-4 layer glass is epoxy resin CCL, further recently, gradually increased/epoxy resin CCL the need to FR-5 layer glass, FR-5 layer glass/ring is installed in the resin CCL provided with a glass softening point (Tg).

A diagram, 1b to form a copper covered thin layer and 101 drill hole of the circuit hole for connecting the.

A diagram lc, and is chemically copper-plating and electrolysis copper-plating process. On the surface, and is chemically copper-plating front electrolysis copper-plating process. The copper-plating electrolysis process front end is chemically copper-plating the edge of impossible end of the electrolyte is the insulating layer the electrolysis copper-plating process. The other testing, and is chemically copper-plating process to form a circuit and pre-processing process end of the electrolysis copper-plating technique thin film layer. Wherein very difficult end is chemically copper-plating process and easy the economic efficiency, is formed on the circuit structure of a electrolysis copper-plating technique current connecting part.

Then, a conveniently for protecting to form a circuit hole on the starch 106 plug on circuit hole 104 of the chemical plated and electrolysis copper-plating multiple 105 layer. The starch is usually made of insulating oil material, and according to any anticipated made of PCB, a rod is made of the conductive propeller. The conductive starch can only comprising a majority the metal according Cu, Comprising, Au, Sn or a Pb, or the metal and organic an insulating. The, according to any MLB using, and omit using starch the circular plug hole process.

The image lc, convenient for battery, chemical plated and electrolysis copper-plating multiple 105 layer is used as layer; and each other is not differentiated two.

The image ld, constructing system anti-eclipse 107 to form a pattern circuit for a circuit.

The circuit structure and connection points of transfer printing to the substrate is conveniently constructing anti-eclipse system. With multiple transfer method, a method of further layer on for printed board by the ultraviolet on the connection position of the circuit structure and is a photosensitive dry film is. The aspect ', recently

Live dry film for liquid photoresist.

And the circuit according to the dry film or LPR used as anti-eclipse pattern 107, and image to le pores, wherein the matrix plunges to the etching liquid, forming circuit structure.

The circuit structure of; the appearance with automatic optical shell (AOI) for monitoring circuit according to the conveniently for estimating internal circuit for forming correctly, and performing a surface processing to the female terminal, such as black oxide.

The AOI device is used in appearance of an automatic PCB. The device for image sensor and came from examination appearance of PCB by the pattern identification method of computer. The sealing the image sensor reading device and volume of graph's information, the AOI component information and a data images to appraise whether a defect to exist.

By using the AOI device, capable rope (connecting section (the flowing mounting element PCB part of the minimum value and power supply of each grounding ring state. In addition, capable of measuring circuit system and width of the omission for detecting hole. The, it gauged the inner hole behaviour.

At least a circuit pattern inner layer l-shaped the outer layer, and black oxide is line for improving metal system and thermal stability.

The image lf, paints coated copper resin's (RCC) is terminal substrate two sides on. RCC is only of the copper foil a resin layer is 108 to 109) and resin layer 108 serve as a circuit layer respectively substrate to be.

The image lg, forming covert circuit hole 110 of the outer layer of each other electric connector. Forming covert circuit hole of the mechanical drill hole, further configured wherein set time to the precise a process for processing through hole, condition is made of aluminium yttria garnet laser beam or C02 laser beam. The YAG laser beam a drill copper foil and an insulating layer, and C02 laser beam is a drill with the position lh, forming the outer layer according to the electroplating process 111.

The position l1, according to the same working process of the inner layer circuit pattern surface, and to the position lh as the outer layer formed 111. A currency according to the circuit and conducting outer layer (111), and surface treated, wherein the inner layer pattern circuit condition such.

The image lj, a RCC of terminal matrix two sides coating connector. The RCC comprising a resin layer 112 two-purpose the copper foils 113) resin layer (112) both ends, a resin layer (112) used as insulator.

The image lk; and laser beam to form a circuit hiding hole 114 of the outer layer of each other electric connector.

The digital 11, forming the additional according to the electroplating process the outer layer (115).

The image lm, according to the outer layer of the outer layer (111) are working that is attached 115, wherein granted of a a conducting layer is 115 circuit, and performing a surface processing to the layer.

By a layer and lamination structure and a surface processing of check and terminal structure of circuit or designable pattern circuit, a casing increase for a PCB layer number.

Then, optical welding tin (photo-solder) slushing compound and Ni/Au coating layer and terminal circuit structure, forming six PCB thereby.

The detail, which is not installed on the substrate or on the chip component of MLB of the light welding tin slushing composite (PSR) pattern; and Ni/Au layer is plated to the welding tin slushing composite pattern is; the light welding tin slushing composite system used as slushing zinc-plating layer, and therefore, only of the substrate or a chip and other part of MLB the zinc-plating layer Ni/Au. On the surface, a communication executing Ni and Au electroplating process. Ni and Au electroplating finished the MLB manufacturing process, thereby prevented is covered with welding tin slushing composite copper foil of exposition is not oxide contacts, increases is installed on MLB element the weldability, and provides the fine conductive.

The PCB in method for dealing with the slenderness and miniaturized of electronic product recently tendency with the limit, and when according to the regular method of multifunctional PCB, a production cost, it is provided enough competitive power. The, recently, the upper price of electronic device dropped, and according to rapid growing the electronic device, industrial need to reduce the end cycle.

And the tendency, and a constructing method to form a circuit hole and display circuit hole wall efficiently obtaining layer of the laser beam according to the normal connected, and a lamination layer in method, very difficult minimum production cost and reduces the PCB same time.

The normal constructing path shortcoming to bottom in that: When the MLB layer is added that wherein a reuse laser beam forming the layer and circuit of lamination hole, display, check and surface processing, thereby lengthen the MLB same time, and MLB manufacturing is mounted expected is very difficult to MLB rope, therefore which is prevent ingress is MLB with defect ratio, so increase the MLB production cost.

Additionally, forming circuit hole to obtain the MLB circuit layer the electric connector and a copper conductive hole circuit board, and a protecting circuit hole copper layer in the shortcoming the normal method of) is method using starch circuit plug hole: The sealing copper conductive circuit hole wall. Additionally the circular plug hole process of operating using starch.

Intervals; and MLB dielectric resin insulating layer impedance than a circuit layer 髙; and impedance affects the operation of circuit. The resistance value of the insulating layer is fixed to the thickness and dielectric of resin insulating layer physical property, namely, the double-face of dielectric consumption, made elastic dielectric resin. Therefore, wherein the need to develop is easy to control the insulating layer impedance method.

WO2001/39267 is claimed for manufacturing process PCB, a adhesive layer the one-sided PCB lamination to an insulating substrate and forming at the same time or the insulating substrate on two ends of the two sides on the basic unit, and further pressurizes to the terminal structure.

And constructing method for manufacturing multilayer PCB section plane is the same according to according to the patent manufacture's of PCB section, and further for alarm hardened the insulated basal body to be semi-hard the sinking rollers material.

The invention claims a method for manufacturing method of PCB, wherein the lower to the patent the common method of improving hierarchical method in sequence.

invention content

Therefore, oneself of manufacturing to consider according to the existing technology the common conventional constructing technique for of the shortcoming, and An objective of the present invention claims a method for manufacturing method of PCB, formed with a circuit and circuit layer and an insulating layer of parallel in process separation, and methods are alternately arranged and relative to form a lamination the product, thereby reducing production cost, and minimum same time. In addition, the trolley the inner layer circuit for working processing layer, thereby reduction with defect component.

A providing a realizing the volume of the parallel method for manufacturing method OF. The method comprises: The first circuit layer, passes through the first circuit layer is formed in electric connector the first circuit hole is breasts, and forming a first circuit and on the first circuit layer,The first circuit layer side coater of insulator of the first circuit and a circuit layer; two-phaseThe second circuit layer, passes through the second circuit layer is formed in electric connector and second circuit hole is breasts, and forming a second circuit and a second circuit layer,The second circuit layer multiple lamination to the coater of the circuit layer of the insulator side in that: With an elastic first and second circuit layer.

Wherein optimally, the according to the invention claims a parallel method for manufacturing method of PCB, coating of insulating layer comprises a first circuit layer side coater of post insulator, a thickness of the adhesion the post insulator; Ride-through forming a Embankment contacted With the first circuit layer first circuit and insulator component; theConductive starch plug are respectively and Embankment Hole; theWith an insulator removal release film.

Wherein optimally, the according to the invention claims a parallel method for manufacturing method of PCB, a or a forming a second circuit layer comprises passing through the copper covered thin layer and first or the second circuit holes; The first or the wall of electrocoppering second circuit hole is copper covered thin layer; theA first formed on the copper-coated layer thin plate or the second circuit according to form the predetermined of the circuit layer.

Wherein optimally, the according to the invention claims a parallel method for manufacturing PCB as method, first or a forming a second circuit layer comprises passing through the copper covered thin layer and first or the second circuit holes; Double-layer first or second circuit hole wall of the first or the second circuit holes; A first surface of the copper-coated layer thin plate or the second circuit structure.

Wherein optimally, the according to the invention claims a parallel method for manufacturing PCB as method, first or a forming a second circuit layer comprises passing through the copper covered thin layer and first or the second circuit holes; Conductive starch plug the first or the second circuit holes; A first formed on the copper-coated layer thin plate or the second circuit structure.

Wherein optimally, according to the invention claims a parallel method for manufacturing PCB as method - comprising a second the circuit layer multiple lamination the third circuit layer multiple lamination to the second circuit layer is; the third circuit layer with a coating comprising at the same time on insulator.

Brief description for drawings

From the detail of one attached with shape, and multiple clearly a understand the invention and other goals characteristic, and merits: Is an emitter constructing method for manufacturing multilayer conventional PCB sectional drawing according to position 1a); lm The emitter is formed internal circuit circuit layer that drawing according to the regular technology edge position to 2e; Is an emitter automatically according to the invention the fine pore electroplating process to form a circuit layer image 3a to the 3d section; the drawingIs an emitter automatically according to the invention the conductive starch plug process to form a circuit layer (4a points (4d the section; the drawingIs an emitter automatically according to the invention manufacturing multilayer PCB sectional drawing image 5a to 5e; Digital 6 furnace according automatically to the invention is for manufacturing multilayer; PCB Digital 7 to the invention manufacturing the section of drawings six PCB.

detailed description of illustrated embodiments

The, is a gasket shape, the heating detail of this invention.

Digital 6 furnace according automatically to the invention is for manufacturing multilayer PCB. To form rod Of Small insulating layer circuit layer 507a and 507b is parallel to the working process and it is provided with an insulating layer circuit layer 507c, a digital to 6) which are, and according to shoulder's direction of the back part is formed by six PCB according to digital 7 cooling.

With the automatically according to the invention to form a circuit layer of the mode in different process.

Edge position to the 2e emitter structure for PCB circuit layer and realizing embodiment, the method is used to act according to the invention claims a parallel method for manufacturing PCB method of.

A diagram edge; the fixing the copper-coated layer thin plate and coating the copper foils 202) insulating layer (203) are.

The position 2b, as to form a penetrates through the circuit hole is a copper-coated thin layer and 201 drill hole 204.

, Then to the position 2c pores, and is chemically copper-plating and electrolysis copper-plating process to form a conductive layer (205).

, A position to the pores, conductive starch 206 a plug through hole 204, so that the number of protecting to through holes 204.

, Then to the position 2e pores, forming circuit pattern according to such as etching craft's traditional circuit and process.

The circuit layer operable as to act according to the invention the position 5a circuit layer 501.

Constructing of PCB circuit and manufacturing method In one embodiment image 3a to a, the method is used to act according to the invention claims a parallel method for manufacturing method of PCB, and a circuit Kountie and is fixed to the electroplating process wherein plug.

A diagram 3a; fixing the model of the copper-coated layer thin clamp 301, and is copper foil (302) insulating layer (303) are.

And, wherein multiple types copper-coated thin layer terminal, and use in the embodiment of 3-5pm the copper-coated layer for clamping a thin copper foil cutting. The is configured based on the laser or end of the fine pore mechanical process is line for processing with bumps of diameter's fine hole circuit. The testing other; the copper foil flowing conveniently very clamped thin a fixing hole circuit.

The image 3b, passes through the copper covered thin layer clamping to form a circuit hole 304. A by YAG laser beam or the C02 laser beam processing circuit hole conveniently for producing diameter of 50 to 100pm. With traditional of PCB with range to compare 200 to the diameter 300nm circuit hole; the circuit hole is relatively small, therefore of omit using starch the additional plug process.

The position, 3c to form a circuit hole 304 copper-coated thin layer clamping end of the chemical plated and electrolysis plated process to be covered thin layer clamp two sides and hole wall of the zinc-plating. The position 3c pores; the electrical 305) is formed attaining thin copper layer clamp two sides, and connected with the zinc-plating to receive the plug hole circuit 304.

Usually; the processing circuit hole needed the circular plug hole of the dipole, the edge position to 2e the pores; and chemical plated and electrolysis plated process of the conductive hole circuit board; and insulating oil the plug hole circuit of spaces. The, wherein the invention, in the slot form a circuit hole 304: Methods initial columns are relatively small, and according to electroplating process plug hole circuit.

Therefore, wherein the invention, a omit using starch the plug process, wherein uniform and PCB is lower end of the plug process.

The 3d image, forming circuit pattern according to such as etching craft's circuit and process. The circuit structure 306 operable as to act according to the invention claims a method for a circuit layer image 501 5a.

Constructing of PCB circuit and manufacturing method In one embodiment image 4a to 4d, the method is used to act according to the invention claims a parallel method for manufacturing PCB method of.

A diagram 4a, as the model of the copper-coated layer thin clamp 401, and coater of copper foil on insulating layer (403) are 402.

The position 4b pores, forming circuit through hole a drill hole 404 process.

, Then to the position 4c pores, conductive starch 405 plug is circuit hole 4.

, Then to the position 4d pores, forming circuit pattern according to such as etching craft's circuit and process. On the surface, wherein the embodiment, during forming a circuit layer without end of the electroplating process.

, Moreover circuit layer 406 operable as to act according to the invention the position 5a circuit layer 501.

The deferring to edge position to 2e and image 3a to a position and 4a to three pair of working method of manufacturing 4d, and post-processing process to the circuit layer, such as for circuit check process and surface processing method of AOI device.

The understand ends of the technical field, provide and etching process to circuit and modification of forming an obvious.

Steps as the same to act according to the invention image 5a to 5e the top OF sectional drawing.

A diagram 5a, as the first 501 sectional drawing, formed on the circuit layer circuit hole and circuit structure of electric connector, according fixing the edge position to the 2e. A circuit layer (4d the working process of the circuit layer or a timer according prior process of common component and manufacturing double-sided PCB crafts formed relate to serve as a first circuit layer according to position 3a to 3d image or 4a 501.

, Then to the position 5b pores, forming the circuit structure of a first circuit and 501 side coater of 508+509 insulator. The 508+509 arranged at the b- state's thermosetting resin 508 and PET film 509 composed of. On the surface, performing coating of the insulator 508 and PET film 509 composed of a thermosetting resin, or after connecting with a thermosetting resin 508 laminations time coating 509 mildew. The 508+509 accommodating chambers mounted then of PCB splitting technology and an isolating circuit layer pattern circuit. A thermosetting resin 508 are used to ensuring consistency between datum during lamination circuit layer formability.

The image 5c pores, a circuit layer (501) one side of hiding circuit hole (BVH) is coater of insulator through a drill hole 510. May use mechanical drill hole is formed BVH510, wherein the lower end of to a processing circuit through the precise process, is made of aluminium yttria garnet laser beam or C02 laser beam. The YAG laser beam a drill copper foil and an insulating layer, and C02 laser beam is a drill the insulating layer.

, Then to the position 5d pores, conductive starch plug BVH510 the. On the surface, equal to BVH510 is line is a deep enough is 511 to the conductive starch during the conductive starch 511 or 506 and a first circuit and 501 circuit side walls conductive layer and starch 505. , Is equal to BVH510 is line for wherein depths and thermosetting resin 508 thickness of the same, or special heat soundness resin is 508 l-2pm deep.

The image 5e strips, the PET film 509.

The insulating layer second semiconductor layer circuit according 507b Of Small first circuit layer 507a, and has first circuit layer the working method for forming and there is no insulating layer is adhered Of Small circuit layer 507c/digital to 6) are. Capable of the mould (clamp) for manufacturing the PCB universal method for time and device.

Adhesive, wherein an elastic upwards and mounted in the circuit layer 507a and second circuit layer 507b and circuit layer 507c down, and a heating wherein a special coating the first and second circuit layer thermosetting resin is 507a and 508 507b.

At the same time, wherein special thermosetting resin 508, wherein when it is held in a predetermined formability, a thermosetting resin 508) conveniently for wherein the base is formed by setting and of the first circuit layer 507a and second circuit layer 507b and circuit and a circuit layer 507c transformer, thereby wherein a circuit layer to obtain each other are closely.

Digital 7 to the invention manufacturing the section of drawings six PCB.

Forming by 508 to form a circuit layer insulator 508+509 thermosetting resin is 507a and 507b a circuit layer pattern circuit is 507a and 507b each other by, and a plug board is 511 to thermosetting resin 508 the conductive starch the BVH510 circuit layer 507a, 507b and 507c circuit in each other electric connector.

The edges of the invention specifically unit according to edge position to use of circuit layer 2e working process of; and understand ends of the technical field, provide such as to act according to the invention claims a method for applied to the modification of circuit layer (4d working method of forming status according to position 3a to 3d image or 4a.

The according to the invention claims a parallel method for manufacturing method OF; and number of the circuit layer is as a multi-layer PCB layer is flowing are multiple i. For example, four PCB rod Of Small the circuit layer and comprising an insulating layer there is no insulating layer is adhered Of Small the circuit layer, six PCB rod Of Small the circuit layer and an insulating two layers of low-smoke insulating layer is adhered Of Small the circuit layer, a small PCB rod Of Small the circuit layer and a three insulating layers of low-smoke insulating layer is adhered Of Small the circuit layer.

Constructing (build-up) manufacturing method of enhanced so-called the top OF ACK/NAK, comprising an insulating layer on lamination double-sided PCB, and a one-sided PCB lamination structure of terminal double-sided PCB. The, wherein Israel parallel or are connected between lamination manufacturing method of condition of PCB, comprising multiple double-sided PCB continuous laminations and insulating layer is inserted in the double-face Connecting structure.

Therefore, and a plurality of the PCB different structure, how of the observing the PCB is a plane is PCB.

Different from and a plurality of manufacturing PCB the limit in technique in process is further configured designing the circuit in the two-degrees-of-freedom and dramatically reducing, wherein the invention claims a method for manufacturing PCB, can avoid a limiting, and therefore reducing the wiring length and energy through the design of the option a layer of expectation, wherein the driving device to reduce with a layer of reducing.

During the invention processing circuit layer, designed very clamped defined by the circuit hole is formed by electroplating process and cathode small, thereby omits the plug process, wherein ensure is succinct and fast.

During the invention processing insulating layer, semi-hard resin adhesion a circuit layer side to form an insulating layer, and therefore, a control of the insulating layer freely, thereby is reduced of the influence of the high-impedance cover and ensure work and combined circuit strata time interface matched and formability.

Where the invention is demonstration's groove; and understand the terminology used for is a capable of the description, and method of non-limit. To the guide; each revisions and distortions of this invention can are. Therefore, the understand capable practice the invention the range of the auxiliary claim 1-3, which is different from describes such specifically.