Magnetic element with storage layer materials

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MAGNETIC ELEMENT WITH STORAGE LAYER MATERIALS

Field of invention

Embodiments of the invention relate to magnetic element devices. More particularly, embodiments of the invention relate to magnetic elements including a novel storage layer material.

Description of the prior art

Magnetoelectronic devices, also known as spin electronic devices or spintronic devices, are used in numerous information technologies, and provide non-volatile, reliable, radiation-resistant, and high-density data storage and retrieval. Examples of magnetoelectronic devices include, but are not limited to, magnetic random access memory (MRAM), magnetic sensors, and read/write devices for hard disk drives.

Typically, a magnetoelectronic device, such as a magnetic memory element, has a structure that includes multiple ferromagnetic layers separated by at least one non-magnetic layer. Information is stored in a magnetic memory element as well as the direction of the magnetization vectors in the magnetic layers. Magnetization vectors in one magnetic layer, for example, are magnetically fixed or immobilized, while the magnetization direction of other magnetic layers is free to alternate between the same and opposite directions which are called parallel and antiparallel states, respectively. In response to the parallel and antiparallel states, the magnetic memory element represents two different resistances. The resistance has a minimum value when the magnetization vectors of the two layers

2/14 magnetic layers point in substantially the same direction, and a maximum value when the magnetization vectors of the two magnetic layers point in substantially opposite directions. Thus, detecting changes in resistance allows a device, such as an MRAM device, to detect the information stored in the magnetic memory element.

Figures 1A and 1B illustrate a type of magnetic memory element known as a magnetic tunnel junction element in parallel and antiparallel states, respectively.

As shown, a magnetic tunnel junction (MTJ) element 100 may be formed of two magnetic layers 110 and 130, each of which may contain a magnetic field, separated by an insulating layer (tunnel barrier) 120. One of the two layers (e.g., reference layer 110), is set to a particular polarity. The other layer's polarity (e.g., storage layer 130) 132 is free to change to match that of an external field that may be applied. A change in polarity 132 of storage layer 130 will change the resistance of MTJ element 100. For example, when the polarities are aligned (FIGURE 1A), a low resistance state exists. When the polarities are not aligned (FIGURE 1B), a high resistance state exists. The illustration of MTJ 100 has been simplified and those skilled in the art will appreciate that each illustrated layer may comprise one or more layers of materials, as is known in the art.

In contrast to conventional RAM technologies that store data as electrical charges or current flows, MRAM stores information magnetically. MRAM has several desirable characteristics that make it a

3/14 candidate for a universal memory, such as high speed, high density (i.e., small bit cell size), low power consumption, and no degradation over time. However, MRAM has scalability issues. Specifically, as bit cells become smaller, the magnetic fields used to switch the memory state increase. Thus, current density and power consumption will increase to provide the higher magnetic fields, which limits the scalability of MRAM.

Unlike conventional MRAM, Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) uses electrons that become spin polarized as the electrons pass through a thin film (spin filter). STT-MRAM is also known as Spin Transfer Torque RAM (STT-RAM), Spin Torque Transfer Magnetization Switching RAM (Spin-RAM), and Spin Momentary Transfer (SMTRAM). During the write operation, the spin-polarized electrons exert a torque on the free layer, which can switch the polarity of the free layer. The read operation is similar to conventional MRAM in that a current is used to sense the resistance/logic state of the storage element MTJ, as discussed previously. As illustrated in FIGURE 2Ά, an STT-MRAM bit cell 200 includes MTJ 205, transistor 210, bit line 220, and word line 230. Transistor 210 is switched for both read and write operations to allow current to flow through MTJ 205 so that the logic state can be read or written.

Referring to FIGURE 2B, a more detailed diagram of an STT-MRAM cell 201 is illustrated, for a more in-depth discussion of the operations of

4/14 read/write. In addition to the previously discussed elements such as MTJ 205, transistor 210, bit line 220, and word line 230, a code line 240, sense amplifier 250, read/write circuitry 260, and bit line reference 270 are illustrated. As discussed above, the write operation in an STT-MRAM is electrical. Read/write circuitry 260 generates a write voltage between bit line 220 and source line 240. Depending on the polarity of the voltage between the bit line 220 and the source line 240, the polarity of the free layer of the MTJ 205 can be changed and correspondingly the logic state can be written to the cell 201. Likewise, during a read operation, a read current is generated which flows between the bit line 220 and through the source line 240 of the MTJ 205. When current is allowed to flow through transistor 210, the resistance (logic state) of MTJ 205 can be determined based on the voltage differential between bit line 220 and source line 240, which is compared to a reference 270 and then amplified by sense amplifier 250. Those skilled in the art will appreciate that the operation and construction of memory cell 201 is known in the art. Additional details are provided, for example, in M. Hosomi, etc., A Nonvolatile Memory with Spi Transfer Torque Magnetoresistive Magnetization Switching: SpinRAM, IEDM Conference Proceedings (2005), which is hereby incorporated by reference in its entirety.

Returning to the MTJ structure of FIGURE 1, storage layer 130 and reference layer 110 were conventionally made of a Cobalt iron boron (CoFeB) material, while tunnel layer 120 was conventionally made of a magnesium oxide material.

5/14 (MgO) in STT-MRAM. However, CoFeB has disadvantages as a storage layer material. For example, it has relatively large magnetostriction. Magnetostriction is a property of ferromagnetic materials that causes them to change their shape when subjected to a magnetic field. Thus, the use of CoFeB can induce a relatively large and uncontrollable switching field or switching current distribution in a memory array.

Summary of the invention

Exemplary embodiments of the invention are directed to magnetic elements including a novel storage layer material.

Thus, one embodiment of the invention may include a magnetic tunnel junction (MTJ) element. The MTJ includes a ferromagnetic reference layer, a ferromagnetic storage layer, and an insulating layer. The ferromagnetic storage layer includes a Cobalt Iron Boron (CoFeB) sublayer coupled to a CoFe sublayer via a non-magnetic sublayer. The insulating layer is disposed between the ferromagnetic reference and storage layers.

Another embodiment of the invention may include another MTJ element. The MTJ also includes a ferromagnetic reference layer, a ferromagnetic storage layer, and an insulating layer. Here, the ferromagnetic storage layer includes a CoFeB sublayer coupled to a nickel iron (NiFe) sublayer via a non-magnetic sublayer. The insulating layer is also disposed between the ferromagnetic reference and storage layers.

Another embodiment of the invention may include a method of forming an MTJ device. The method includes forming a ferromagnetic reference layer, forming a

6/14 ferromagnetic storage layer comprising a CoFeB sublayer coupled to a CoFe sublayer via a non-magnetic sublayer, and forming an insulating layer disposed between the reference and ferromagnetic storage layers.

Another embodiment of the invention may include another method of forming an MTJ device. Here, the method includes forming a ferromagnetic reference layer, forming a ferromagnetic storage layer comprising a CoFeB sublayer coupled to a NiFe sublayer via a non-magnetic sublayer, and forming an insulating layer disposed between the ferromagnetic reference and storage layers.

Another embodiment of the invention may include a memory comprising a transistor and a magnetic tunnel junction (MTJ) element coupled in series with the transistor. The magnetic tunnel junction (MTJ) element may include: a ferromagnetic reference layer; a ferromagnetic storage layer comprising a Cobalt-Iron-Boron (CoFeB) sublayer coupled to a Cobalt-Iron (CoFeB) sublayer via a non-magnetic sublayer, and an insulating layer disposed between the ferromagnetic reference and storage layers.

Brief description of the Figures

The accompanying drawings are presented to assist in describing embodiments of the invention and are provided solely for illustration of the embodiments and not for limitation thereof.

Figures 1A and 1B illustrate a type of magnetic memory element known as a magnetic tunnel junction element in parallel and antiparallel states, respectively.

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Figures 2A and 2B illustrate a memory cell of a conventional STT-MRAM cell, using an MTJ element as a magnetic storage device.

Figures 3A through 3D illustrate an MTJ element including a new storage layer.

Figure 4 illustrates a method of manufacturing an MTJ element including a new storage layer.

Figure 5 illustrates an STT-MRAM circuit including an MTJ element.

Detailed description of the invention

Aspects of embodiments of the invention are disclosed in the following description and related drawings directed to specific embodiments of the invention. Alternative embodiments may be designed without departing from the scope of the invention.

Furthermore, well-known elements of the invention will not be described in detail or will be omitted so as not to obscure the relevant details of embodiments of the invention.

The word exemplary is used herein to mean serving as an example, case, or illustration. Any embodiment described herein as exemplary is not necessarily to be construed as preferred or advantageous over other embodiments. Likewise, the term embodiments of the invention does not require that all embodiments of the invention include the feature, advantage, or mode of operation discussed. As used herein, and commonly in the art, the symbol Á refers to the unit of measurement angstroms.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting to embodiments of the invention. As used herein, the singular forms a/an, and

8/14 o/a are also intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms comprise, comprising, includes and/or including, when used in this document, specify the presence of indicated characteristics, integers, steps, operations, elements and/or components, but do not exclude the presence or addition of one or more other characteristics, integers, steps, operations, elements, components and/or groups thereof.

As discussed in the description of the prior art, cobalt-iron-boron (CoFeB) has disadvantages as a storage layer material because it has, for example, an undesirably large magnetostriction property. Thus, embodiments of the invention provide a novel storage layer for use in magnetic memory elements that help mitigate one or more disadvantages of CoFeB.

Figures 3A-3D illustrate an MTJ element including a novel storage layer in accordance with an embodiment of the invention. As used herein, reference numeral 330 without a corresponding letter a—d refers to storage layers 330a-d collectively.

As shown, MTJ 300 is formed of a reference layer 310, an insulating layer 320, and a storage layer 330. As in the conventional design of FIGURE 1, reference layer 310 may be made of CoFeB or the like, and insulating layer 320 may be made of Magnesium oxide (MgO) or the like. In contrast to the design of FIGURE 1, however, the storage layer 330 of the MTJ 300 is made of a multilayer ferromagnetic cobalt-iron-boron (CoFeB)/(non-magnetic sublayer)/(auxiliary sublayer) structure, in which a CoFeB sublayer

9/14 is coupled to a sub-auxiliary layer via a non-magnetic (e.g., Ruthenium (Ru) spacer sublayer), as will be described below. For ease of notation and explanation Ruthenium or Ru may be used for the non-magnetic sublayer in the following description. However, it will be appreciated that embodiments of the invention are not limited to the use of Ru as the non-magnetic sublayer. For example, chromium (Cr) or tantalum (Ta) could also be used as the non-magnetic sublayer. Furthermore, it will be appreciated that various layers and sublayers described in this document may include additional layers and sublayers to those explicitly demonstrated.

The CoFeB sublayer of storage layer 330 may be ferromagnetically or antiferromagnetically coupled with the auxiliary sublayer, depending on the exchange coupling strength between the two sublayers. In general, exchange coupling refers to the idea that the magnetic moments in the two sublayers attempt to magnetically couple with each other, in either the parallel or antiparallel direction, depending on the Ru thickness, so that the exchange energy can be minimized. Simply put, magnetic exchange coupling is the exchange force required for magnetic moments to align them in either the parallel or antiparallel direction. Specifically, ferromagnetic exchange coupling refers to the state in which the magnetization vectors of the two sublayers are relatively parallel, and antiferromagnetic exchange coupling refers to the state in which the magnetization vectors of the two sublayers are relatively antiparallel.

It has been observed that when the exchange coupling intensity is stronger, the critical switching current will be smaller. Furthermore, the intensity of

10/14 Exchange coupling can be controlled by adjusting the thickness of the non-magnetic (e.g., Ru) sublayer. In general, when a thin layer of non-magnetic metal is sandwiched between two ferromagnetic layers, the electrons in the center layer become polarized in the oscillatory direction. For example, a relatively thin Ru sublayer of approximately 6Á-10Á (e.g., 8Á) can provide antiferromagnetic coupling. A thickness of about 2Á-5Á or a thickness of about 10Á-15Á (e.g., 12Á) of the Ru sublayer can provide ferromagnetic coupling. Increasing the thickness of the additional Ru sublayer to about 15Á-20Á (e.g., 18Á) can provide antiferromagnetic coupling once again. However, while the polarization direction may be oscillatory in nature, the magnitude of the exchange coupling intensity is damped with increasing Ru sublayer thickness such that the array of oscillations that lie outside the Ru sublayer becomes very coarse. Thus, the type of coupling between the CoFeB sublayer and the subauxiliary layer, as well as the exchange coupling intensity, can be defined according to design standards by choosing a suitable Ru sublayer thickness. Similarly, the thickness of the other ferromagnetic sublayers can be in the order of 5Á-50Á, but embodiments of the invention are not limited to any specific thickness.

To decrease critical current switching and improve the stability of STT-MRAM cells, the auxiliary sublayer according to one or more embodiments of the invention may include a CoFe material. Furthermore, to help mitigate magnetostriction, the auxiliary sublayer according to one or more embodiments of the invention may include a

11/14 NiFe material, in addition to or as a replacement for CoFe material, depending on the application.

In particular, Figure 3A illustrates a storage layer 330A made of a CoFeB/non-magnetic/CoFe/NiFe layer structure (e.g., CoFeB/Ru/CoFe/NiFe). Figure 3B illustrates a storage layer 330B made of a CoFeB/non-magnetic/CoFe layer structure (e.g., CoFeB/Ru/CoFe). Figure 3C illustrates a storage layer 330c made of a CoFeB/non-magnetic/NiFe layer structure (e.g., CoFeB/Ru/NiFe). Figure 3D illustrates a storage layer 330d made of a CoFeB/non-magnetic/CoFeB/NiFe (e.g., CoFeB/Ru/CoFeB/NiFe) layer structure. The structures in Figures 3A and 3B use a CoFe material as part of the auxiliary sublayer to provide relatively strong exchange coupling with the CoFeB sublayer via the non-magnetic (e.g., Ru) sublayer, thereby reducing the critical switching current for write operations. The structures in Figures 3A, 3C, and 3D use a NiFe material to reduce magnetostriction-induced switching current and switching field jitter in a memory array. Furthermore, as mentioned above, the above-described Ru sublayer illustrated in Figures 3A–D can be replaced with other nonmagnetic materials to form the nonmagnetic sublayer.

Figure 4 illustrates a method of manufacturing an MTJ element including a new storage layer in accordance with embodiments of the invention.

Referring to Figures 3 and 4, MTJ 300 may be fabricated by forming a first ferromagnetic layer 310 (i.e., one of storage layers 330 and reference layer 310) on a substrate or another layer (block

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410). An insulating layer 320 is formed on the first ferromagnetic layer 310 (block 420). The second ferromagnetic layer 330 (i.e., the other of the storage layer 330 and reference layer 310) is formed on the insulating layer 320 (block 430). Again, each layer may be composed of one or more layers made of one or more materials, and a layer said to be formed on another layer need not necessarily be formed in direct contact with that layer. As illustrated in Figures 3A-3D, the storage layer may be formed from any of the various combinations described herein (e.g., CoFeB/Ru/CoFe/NiFe, CoFeB/Ru/CoFe, CoFeB/Ru/NiFe, or CoFeB/Ru/CoFeB/NiFe) in accordance with various embodiments of the invention.

Figure 5 illustrates a memory element (e.g., an STT-MRAM circuit) including an MTJ element in accordance with an embodiment of the invention.

The circuit includes a bit cell 501 including an MTJ 505 and word line transistor 510 coupled between bit line (BL) 520 and source line (SL) 540. Word line transistor 510 receives a word line read voltage word (WL_rd) from the word line (not shown). A read isolation element 550 is coupled to bit line 520 to isolate sense amplifier 570 during a write operation. Element 550 (e.g., read multiplexer) may be used to select one of the bit lines during the read operation, as well as provide sense amplifier isolation. As will be appreciated by those skilled in the art, read isolation element 550 may be any device or combination of devices that can couple sense amplifier 570 to bit line 520 during read operations and may

13/14 isolate the sense amplifier 570 during write operations. For example, the isolation element 550 may be a transmit port coupled in series with an input of sense amplifier 570. However, those skilled in the art will appreciate that other devices and/or combinations of devices, such as multiplexers and the like, may be used. Furthermore, those skilled in the art will appreciate that the circuit configuration illustrated herein is solely to facilitate description of aspects of embodiments of the invention and is not intended to limit the embodiments of the illustrated elements and/or arrangements.

Returning to Figure 5, isolation element 550 may receive a read-enable signal (rd_en) to coordinate with the read operation. .. A sense amplifier 570 is coupled to bit line 520 and a reference 560. Sense amplifier 570 may be used to determine the state of bit cell 501 by amplifying the voltage differential between bit line 520 and reference 560 at the input of sense amplifier 570 during the read operation. During read operation, transistor 510 is conducting and a read current flows through MTJ 505. Read isolation element 550 will be conducted and a voltage proportional to the resistance of MTJ 505 will be generated and sensed in sense amplifier 570. As discussed above, the resistance will vary according to the logic state of MTJ 505. Thus, data stored in bit cell 501 can be read. A write trigger 580 and read isolation elements 582 and 584 are coupled between bit line 520 and source line 540 to enable selection of a bit line and writing of data to bit cell 501.

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The MTJ 505 may be implemented using the techniques described herein to decrease the critical switching current, help mitigate magnetostriction, and improve STT-MRAM cell stability. For example, MTJ 505 may be implemented as shown in any of Figures 3A through 3D and/or fabricated as illustrated in Figure 4. Additionally, it will be appreciated that memory arrays may be formed from arrays of individual bit cells formed on the MTJ 505 and transistor 510.

While the above disclosure shows illustrative embodiments of the invention, it should be noted that various changes and modifications may be made herein without departing from the scope of embodiments of the invention as defined by the appended claims. For example, while the techniques described in this document for fabricating magnetic elements are generally directed to MTJ elements and STT-MRAM devices, one skilled in the art will appreciate that the storage layers presented herein can be used in conjunction with various magnetoelectric elements in various applications to provide improved performance. Furthermore, the specific logic signals corresponding to the transistors/circuits to be activated may be changed as appropriate to achieve the disclosed functionality as well as the transistors/circuits may be modified to complementary devices (e.g., interchanging NMOS and PMOS devices). Likewise, the functions, steps and/or actions of the methods according to embodiments of the invention described herein need not be performed in the particular order shown. Further, while elements of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.