AU593554B2

Checking access authorisation to a signal processing system

Abstract

This record has no abstract on file.

AU593554B2, drawing sheet 1
Sheet 1 of 35

Term

Term ended

Expired 27 May 2006, 20.3 years ago.

  1. Priority
  2. Filed
  3. Granted
  4. Expired
  5. Today

9 claims: 4 independent, 5 dependent

  1. 1
    The claims defining the invention are as follows:1. A method of authorizing access to a signal processing system from a designated one of a plurality of peripheral units within said system, wherein each said peripheral unit Is connected to said system for the purpose of transmitting and/or receiving signals by means of a unique code number allocated to each said peripheral unit by said system and by means of Identification data freely selectable by users for each said peripheral unit, wherein said method comprises the steps of: said system providing a keyword that is not known to users or operating personnel of said system for each peripheral unit in said signal processing system, said keyword being always derived from said specified code number and said identification data for each respective peripheral unit: furthermore, 1n the event of intended access from a peripheral unit, initially said code number and said Identification data are ;transmitted for said purpose by said peripheral unit;and said signal processing system uses said code number to select »*·« the respective keyword, wherein each of said code number, Identification data and keyword are subjected to combinatorial circuitry;tt ' . : : J' * whereby access to said signal processing system is obtained when ’ ' the output signal of said combinatorial circuit 1s compared with a preset value and found to correspond to said preset value.
  2. 3
    3 ** * * tt « ft ί 11 k t »* ♦ ft t f t ' 6 ,« « $ 7' « o * ' Ora 10 , * t
  3. 4
    4 * * t 11« n 4 tt I 12* ” 13 ,‘S 4U X 1S% * 1 * t 17 «» « ♦ if •station (BS) is checked by means of a code number allocated to the control station, by means of the freely selectable identification data for the respective control station, and by means of a keyword entered in the signal processing system (SVS) for the respective control station. 4. A method as recited in claim 1, further characterized in that, in addition to the code number allocated to the respective peripheral unit and identification data, a system code number designated for the signal processing system (SVS) can be integrated in the derivation of the keyword and the checking method of the access authorization.
  4. 8
    The method as defined in claim 5 further characterized in that a packet for initiating the establishment of a connection also transmits information signals requesting specific services, which after an identification of the respective subscriber terminal, are accepted as parameters for the specific services.
  5. 9
    Circuit apparatus for implementing a method of authorizing access to a signal processing system characterized in that the signal processing system (SVS) has a memory configuration (SWS) with a number of ·.·»,* storage cells corresponding to a number of peripheral units seeking access to the signal processing system, the memory configuration for the purpose of storing keywords allocated to the peripheral units (TE, BS) seeking access such that a first register KR) is provided for buffering a code » 0 ’ ’·· number transmitted by one of the peripheral units, and a second register «·· ·* (HR) is provided for buffering the identification data pertaining to the respective code number, a combinatorial circuit (VS) being linked to said y-e.es iS-Ve/S -rVffHtorod (KR, IIR) and the memory configuration (SWS), the combinatorial ,,,, circuit for combining the code numbers and the identification data 5 pertaining thereto transmitted by the two registers with the keywords corresponding to the respective code numbers. , ,, 10. A method for authorizing access to a signed processing system substantially as described herein with reference to Fig. 4 or Figs. 1,2 and 3 of the drawings. ,, ,, 11. Apparatus for authorizing access to a signal processing system *· 4 t * ' substantially as described herein with reference to Fig. 4 or Figs. 1,2 e r -v \ ‘ ·' and 3 of the drawings.