Controllable effective resistance circuits

Disclosed is a circuit providing a controllable effective resistance which comprises of transistor means that provides current at an input node responsive to an input voltage at the input node. The transistor means is coupled to a settable current source which operates to control the effective value of the controllable effective resistance. The invention also includes a filter which employs the controllable effective resistance to vary the breakpoint frequency of the filter. Also, a phase-locked loop apparatus employing the filter is disclosed.