Partitioned content addressable memory device

A CAM device having a plurality of CAM blocks is partitioned into a number of individually searchable partitions, where each partition may include one or more CAM blocks of the CAM device. In one embodiment, each CAM block is connected to a block select circuit that stores a class code indicating what class or type of data is stored in the block. The same class code may be stored in any number of block select circuits to define a partition as including the corresponding number of CAM blocks. During compare operations between a comparand word and data stored in the CAM device, a search code provided to the block select circuits is compared to the class codes to selectively enable or disable the CAM blocks for the compare operation. In some embodiments, the block select circuits may be used to disable defective CAM blocks. In such embodiments, address translation logic is used to translate addresses in defective CAM blocks to addresses in non-defective CAM blocks, and a main priority encoder is used to dynamically assign priority between the CAM blocks.