Method and system for maximizing dram memory bandwidth

The invention claims a system and method for maximized DRAM memory bandwidth. The system comprises an multiple data unit multiple buffers, and buffer coupling's line, a choosing cache storing data unit, and buffer logic circuit, a according to a storage for data buffer units prompter are visits multiple storage media. The system for data unit, according to data unit at least part of a indices, according to the direction and buffer, for storing the data unit; and data storage device in cache of the selection, according to the positioning schedule storage medium access, from cache for selecting readout unit, and visits the storage medium.