Method and apparatus for error correction according to erase counts of a solid-state memory
Abstract
The invention's embodiment referring to a fastening solid storage at least one block method and apparatus for erase counting. According to storage area associate's erase counting to position to the middle of a solid memory reading the error of data. Some embodiments, a according to a wherein the data storage area associate's erase counting to position is in the error correction operation one or more: ()) and a and/or a mode; (II) welded with a sign light weight the weight decoder (mode) and/or heavy a weight (mode) and/or the quick decoder (mode) and/or the buffer decoder (mode) by, error(iii) ensurring mode conversion and/or error correction attempt resource, budget(iv) ensurring soft Bits's; the numberAnd (v) and decoding bus width intensity.
Term
2.6 yearsleft in the term
Expires 6 May 2029.
- Priority
- Filed
- Granted
- Today
- Expires
2 priority claims, no other members on record
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 7506508 | United States of America | P | |
| 2009051856 | International Bureau of the World Intellectual Property Organization (WIPO) | W |
Numbers
- Application
- 9769687
Titles2
- German
- VERFAHREN UND VORRICHTUNG ZUR FEHLERKORREKTUR NACH DER LÖSCHANZAHL EINES FESTKÖRPERSPEICHERS
- English
- METHOD AND DEVICE FOR ERROR CORRECTION AFTER THE CLEARANCE NUMBER OF A SOLID BODY STORAGE
Classification
- CPC, 1
- G06F11/1068
- IPC, 2
- G06F11 00
- G06F11 10